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From: Kishon Vijay Abraham I <kishon@ti.com>
To: Joao Pinto <Joao.Pinto@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, linux-arm-kernel@axis.com
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	Jesper Nilsson <jesper.nilsson@axis.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	Gabriele Paoloni <gabriele.paoloni@huawei.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	nsekhar@ti.com, Zhou Wang <wangzhou1@hisilicon.com>,
	Murali Karicheri <m-karicheri2@ti.com>,
	Niklas Cassel <niklas.cassel@axis.com>,
	Lucas Stach <l.stach@pengutronix.de>
Subject: Re: [PATCH v2 5/7] PCI: dwc: all: Modify dbi accessors to access data of 4/2/1 bytes
Date: Tue, 7 Mar 2017 16:53:50 +0530	[thread overview]
Message-ID: <58BE9846.5090903@ti.com> (raw)
In-Reply-To: <090d9947-8003-4608-5e3a-92f62f90eda6@synopsys.com>



On Tuesday 07 March 2017 04:48 PM, Joao Pinto wrote:
> Às 9:52 AM de 3/7/2017, Kishon Vijay Abraham I escreveu:
>> Previously dbi accessors can be used to access data of size 4
>> bytes. But there might be situations (like accessing
>> MSI_MESSAGE_CONTROL in order to set/get the number of required
>> MSI interrupts in EP mode) where dbi accessors must
>> be used to access data of size 2. This is in preparation for
>> adding endpoint mode support to designware driver.
>>
>> Cc: Jingoo Han <jingoohan1@gmail.com>
>> Cc: Richard Zhu <hongxing.zhu@nxp.com>
>> Cc: Lucas Stach <l.stach@pengutronix.de>
>> Cc: Murali Karicheri <m-karicheri2@ti.com>
>> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
>> Cc: Niklas Cassel <niklas.cassel@axis.com>
>> Cc: Jesper Nilsson <jesper.nilsson@axis.com>
>> Cc: Joao Pinto <Joao.Pinto@synopsys.com>
>> Cc: Zhou Wang <wangzhou1@hisilicon.com>
>> Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>>  drivers/pci/dwc/Kconfig                |   18 ++++----
>>  drivers/pci/dwc/pci-dra7xx.c           |    8 ++--
>>  drivers/pci/dwc/pci-exynos.c           |   16 +++----
>>  drivers/pci/dwc/pci-imx6.c             |   54 +++++++++++-----------
>>  drivers/pci/dwc/pci-keystone-dw.c      |   13 +++---
>>  drivers/pci/dwc/pcie-armada8k.c        |   38 ++++++++--------
>>  drivers/pci/dwc/pcie-artpec6.c         |    6 +--
>>  drivers/pci/dwc/pcie-designware-host.c |   18 ++++----
>>  drivers/pci/dwc/pcie-designware.c      |   77 +++++++++++++++++++-------------
>>  drivers/pci/dwc/pcie-designware.h      |   14 +++---
>>  drivers/pci/dwc/pcie-hisi.c            |   14 +++---
>>  11 files changed, 147 insertions(+), 129 deletions(-)
>>
>> diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig
>> index dfb8a69..cb3d5d0 100644
>> --- a/drivers/pci/dwc/Kconfig
>> +++ b/drivers/pci/dwc/Kconfig
>> @@ -36,7 +36,7 @@ config PCIE_DW_PLAT
>>  config PCI_EXYNOS
>>  	bool "Samsung Exynos PCIe controller"
>>  	depends on PCI
>> -	depends on SOC_EXYNOS5440
>> +	depends on SOC_EXYNOS5440 || COMPILE_TEST
> 
> Kishon, I have the idea that Bjorn suggested some time ago not to use
> COMPILE_TEST, because there were some problems in some drivers that needed
> specific arch stuff.

sigh.. this spilled through from my testing. This Kconfig changes was
un-intentional.

Thanks
Kishon

WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Joao Pinto <Joao.Pinto@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>, <linux-pci@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-samsung-soc@vger.kernel.org>, <linux-arm-kernel@axis.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	Jesper Nilsson <jesper.nilsson@axis.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	Gabriele Paoloni <gabriele.paoloni@huawei.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	nsekhar@ti.com, Zhou Wang <wangzhou1@hisilicon.com>,
	Murali Karicheri <m-karicheri2@ti.com>,
	Niklas Cassel <niklas.cassel@axis.com>,
	Lucas Stach <l.stach@pengutronix.de>
Subject: Re: [PATCH v2 5/7] PCI: dwc: all: Modify dbi accessors to access data of 4/2/1 bytes
Date: Tue, 7 Mar 2017 16:53:50 +0530	[thread overview]
Message-ID: <58BE9846.5090903@ti.com> (raw)
In-Reply-To: <090d9947-8003-4608-5e3a-92f62f90eda6@synopsys.com>



On Tuesday 07 March 2017 04:48 PM, Joao Pinto wrote:
> =C0s 9:52 AM de 3/7/2017, Kishon Vijay Abraham I escreveu:
>> Previously dbi accessors can be used to access data of size 4
>> bytes. But there might be situations (like accessing
>> MSI_MESSAGE_CONTROL in order to set/get the number of required
>> MSI interrupts in EP mode) where dbi accessors must
>> be used to access data of size 2. This is in preparation for
>> adding endpoint mode support to designware driver.
>>
>> Cc: Jingoo Han <jingoohan1@gmail.com>
>> Cc: Richard Zhu <hongxing.zhu@nxp.com>
>> Cc: Lucas Stach <l.stach@pengutronix.de>
>> Cc: Murali Karicheri <m-karicheri2@ti.com>
>> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
>> Cc: Niklas Cassel <niklas.cassel@axis.com>
>> Cc: Jesper Nilsson <jesper.nilsson@axis.com>
>> Cc: Joao Pinto <Joao.Pinto@synopsys.com>
>> Cc: Zhou Wang <wangzhou1@hisilicon.com>
>> Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>>  drivers/pci/dwc/Kconfig                |   18 ++++----
>>  drivers/pci/dwc/pci-dra7xx.c           |    8 ++--
>>  drivers/pci/dwc/pci-exynos.c           |   16 +++----
>>  drivers/pci/dwc/pci-imx6.c             |   54 +++++++++++-----------
>>  drivers/pci/dwc/pci-keystone-dw.c      |   13 +++---
>>  drivers/pci/dwc/pcie-armada8k.c        |   38 ++++++++--------
>>  drivers/pci/dwc/pcie-artpec6.c         |    6 +--
>>  drivers/pci/dwc/pcie-designware-host.c |   18 ++++----
>>  drivers/pci/dwc/pcie-designware.c      |   77 +++++++++++++++++++------=
-------
>>  drivers/pci/dwc/pcie-designware.h      |   14 +++---
>>  drivers/pci/dwc/pcie-hisi.c            |   14 +++---
>>  11 files changed, 147 insertions(+), 129 deletions(-)
>>
>> diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig
>> index dfb8a69..cb3d5d0 100644
>> --- a/drivers/pci/dwc/Kconfig
>> +++ b/drivers/pci/dwc/Kconfig
>> @@ -36,7 +36,7 @@ config PCIE_DW_PLAT
>>  config PCI_EXYNOS
>>  	bool "Samsung Exynos PCIe controller"
>>  	depends on PCI
>> -	depends on SOC_EXYNOS5440
>> +	depends on SOC_EXYNOS5440 || COMPILE_TEST
> =

> Kishon, I have the idea that Bjorn suggested some time ago not to use
> COMPILE_TEST, because there were some problems in some drivers that needed
> specific arch stuff.

sigh.. this spilled through from my testing. This Kconfig changes was
un-intentional.

Thanks
Kishon

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: kishon@ti.com (Kishon Vijay Abraham I)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 5/7] PCI: dwc: all: Modify dbi accessors to access data of 4/2/1 bytes
Date: Tue, 7 Mar 2017 16:53:50 +0530	[thread overview]
Message-ID: <58BE9846.5090903@ti.com> (raw)
In-Reply-To: <090d9947-8003-4608-5e3a-92f62f90eda6@synopsys.com>



On Tuesday 07 March 2017 04:48 PM, Joao Pinto wrote:
> ?s 9:52 AM de 3/7/2017, Kishon Vijay Abraham I escreveu:
>> Previously dbi accessors can be used to access data of size 4
>> bytes. But there might be situations (like accessing
>> MSI_MESSAGE_CONTROL in order to set/get the number of required
>> MSI interrupts in EP mode) where dbi accessors must
>> be used to access data of size 2. This is in preparation for
>> adding endpoint mode support to designware driver.
>>
>> Cc: Jingoo Han <jingoohan1@gmail.com>
>> Cc: Richard Zhu <hongxing.zhu@nxp.com>
>> Cc: Lucas Stach <l.stach@pengutronix.de>
>> Cc: Murali Karicheri <m-karicheri2@ti.com>
>> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
>> Cc: Niklas Cassel <niklas.cassel@axis.com>
>> Cc: Jesper Nilsson <jesper.nilsson@axis.com>
>> Cc: Joao Pinto <Joao.Pinto@synopsys.com>
>> Cc: Zhou Wang <wangzhou1@hisilicon.com>
>> Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>>  drivers/pci/dwc/Kconfig                |   18 ++++----
>>  drivers/pci/dwc/pci-dra7xx.c           |    8 ++--
>>  drivers/pci/dwc/pci-exynos.c           |   16 +++----
>>  drivers/pci/dwc/pci-imx6.c             |   54 +++++++++++-----------
>>  drivers/pci/dwc/pci-keystone-dw.c      |   13 +++---
>>  drivers/pci/dwc/pcie-armada8k.c        |   38 ++++++++--------
>>  drivers/pci/dwc/pcie-artpec6.c         |    6 +--
>>  drivers/pci/dwc/pcie-designware-host.c |   18 ++++----
>>  drivers/pci/dwc/pcie-designware.c      |   77 +++++++++++++++++++-------------
>>  drivers/pci/dwc/pcie-designware.h      |   14 +++---
>>  drivers/pci/dwc/pcie-hisi.c            |   14 +++---
>>  11 files changed, 147 insertions(+), 129 deletions(-)
>>
>> diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig
>> index dfb8a69..cb3d5d0 100644
>> --- a/drivers/pci/dwc/Kconfig
>> +++ b/drivers/pci/dwc/Kconfig
>> @@ -36,7 +36,7 @@ config PCIE_DW_PLAT
>>  config PCI_EXYNOS
>>  	bool "Samsung Exynos PCIe controller"
>>  	depends on PCI
>> -	depends on SOC_EXYNOS5440
>> +	depends on SOC_EXYNOS5440 || COMPILE_TEST
> 
> Kishon, I have the idea that Bjorn suggested some time ago not to use
> COMPILE_TEST, because there were some problems in some drivers that needed
> specific arch stuff.

sigh.. this spilled through from my testing. This Kconfig changes was
un-intentional.

Thanks
Kishon

WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Joao Pinto <Joao.Pinto@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>, <linux-pci@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-samsung-soc@vger.kernel.org>, <linux-arm-kernel@axis.com>
Cc: <nsekhar@ti.com>, Jingoo Han <jingoohan1@gmail.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	Lucas Stach <l.stach@pengutronix.de>,
	Murali Karicheri <m-karicheri2@ti.com>,
	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	Niklas Cassel <niklas.cassel@axis.com>,
	Jesper Nilsson <jesper.nilsson@axis.com>,
	Zhou Wang <wangzhou1@hisilicon.com>,
	Gabriele Paoloni <gabriele.paoloni@huawei.com>
Subject: Re: [PATCH v2 5/7] PCI: dwc: all: Modify dbi accessors to access data of 4/2/1 bytes
Date: Tue, 7 Mar 2017 16:53:50 +0530	[thread overview]
Message-ID: <58BE9846.5090903@ti.com> (raw)
In-Reply-To: <090d9947-8003-4608-5e3a-92f62f90eda6@synopsys.com>



On Tuesday 07 March 2017 04:48 PM, Joao Pinto wrote:
> Às 9:52 AM de 3/7/2017, Kishon Vijay Abraham I escreveu:
>> Previously dbi accessors can be used to access data of size 4
>> bytes. But there might be situations (like accessing
>> MSI_MESSAGE_CONTROL in order to set/get the number of required
>> MSI interrupts in EP mode) where dbi accessors must
>> be used to access data of size 2. This is in preparation for
>> adding endpoint mode support to designware driver.
>>
>> Cc: Jingoo Han <jingoohan1@gmail.com>
>> Cc: Richard Zhu <hongxing.zhu@nxp.com>
>> Cc: Lucas Stach <l.stach@pengutronix.de>
>> Cc: Murali Karicheri <m-karicheri2@ti.com>
>> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
>> Cc: Niklas Cassel <niklas.cassel@axis.com>
>> Cc: Jesper Nilsson <jesper.nilsson@axis.com>
>> Cc: Joao Pinto <Joao.Pinto@synopsys.com>
>> Cc: Zhou Wang <wangzhou1@hisilicon.com>
>> Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>>  drivers/pci/dwc/Kconfig                |   18 ++++----
>>  drivers/pci/dwc/pci-dra7xx.c           |    8 ++--
>>  drivers/pci/dwc/pci-exynos.c           |   16 +++----
>>  drivers/pci/dwc/pci-imx6.c             |   54 +++++++++++-----------
>>  drivers/pci/dwc/pci-keystone-dw.c      |   13 +++---
>>  drivers/pci/dwc/pcie-armada8k.c        |   38 ++++++++--------
>>  drivers/pci/dwc/pcie-artpec6.c         |    6 +--
>>  drivers/pci/dwc/pcie-designware-host.c |   18 ++++----
>>  drivers/pci/dwc/pcie-designware.c      |   77 +++++++++++++++++++-------------
>>  drivers/pci/dwc/pcie-designware.h      |   14 +++---
>>  drivers/pci/dwc/pcie-hisi.c            |   14 +++---
>>  11 files changed, 147 insertions(+), 129 deletions(-)
>>
>> diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig
>> index dfb8a69..cb3d5d0 100644
>> --- a/drivers/pci/dwc/Kconfig
>> +++ b/drivers/pci/dwc/Kconfig
>> @@ -36,7 +36,7 @@ config PCIE_DW_PLAT
>>  config PCI_EXYNOS
>>  	bool "Samsung Exynos PCIe controller"
>>  	depends on PCI
>> -	depends on SOC_EXYNOS5440
>> +	depends on SOC_EXYNOS5440 || COMPILE_TEST
> 
> Kishon, I have the idea that Bjorn suggested some time ago not to use
> COMPILE_TEST, because there were some problems in some drivers that needed
> specific arch stuff.

sigh.. this spilled through from my testing. This Kconfig changes was
un-intentional.

Thanks
Kishon

  reply	other threads:[~2017-03-07 11:23 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-07  9:52 [PATCH v2 0/7] PCI: dwc: miscellaneous fixes and cleanups Kishon Vijay Abraham I
2017-03-07  9:52 ` Kishon Vijay Abraham I
2017-03-07  9:52 ` Kishon Vijay Abraham I
2017-03-07  9:52 ` Kishon Vijay Abraham I
2017-03-07  9:52 ` [PATCH v2 1/7] PCI: dwc: designware: Add new *ops* for cpu addr fixup Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07 11:11   ` Joao Pinto
2017-03-07 11:11     ` Joao Pinto
2017-03-07 11:11     ` Joao Pinto
2017-03-07 11:11     ` Joao Pinto
2017-03-07  9:52 ` [PATCH v2 2/7] PCI: dwc: dra7xx: Populate cpu_addr_fixup ops Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07 11:12   ` Joao Pinto
2017-03-07 11:12     ` Joao Pinto
2017-03-07 11:12     ` Joao Pinto
2017-03-07 11:12     ` Joao Pinto
2017-03-07  9:52 ` [PATCH v2 3/7] PCI: dwc: artpec6: " Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07 11:12   ` Joao Pinto
2017-03-07 11:12     ` Joao Pinto
2017-03-07 11:12     ` Joao Pinto
2017-03-07 11:12     ` Joao Pinto
2017-03-07  9:52 ` [PATCH v2 4/7] PCI: dwc: all: Modify dbi accessors to take dbi_base as argument Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07 11:34   ` Joao Pinto
2017-03-07 11:34     ` Joao Pinto
2017-03-07 11:34     ` Joao Pinto
2017-03-07  9:52 ` [PATCH v2 5/7] PCI: dwc: all: Modify dbi accessors to access data of 4/2/1 bytes Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07 11:18   ` Joao Pinto
2017-03-07 11:18     ` Joao Pinto
2017-03-07 11:18     ` Joao Pinto
2017-03-07 11:18     ` Joao Pinto
2017-03-07 11:23     ` Kishon Vijay Abraham I [this message]
2017-03-07 11:23       ` Kishon Vijay Abraham I
2017-03-07 11:23       ` Kishon Vijay Abraham I
2017-03-07 11:23       ` Kishon Vijay Abraham I
2017-03-07  9:52 ` [PATCH v2 6/7] PCI: dwc: designware: Modify _unroll() to _ob_unroll() Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52 ` [PATCH v2 7/7] PCI: dwc: dra7xx: Push request_irq call to the bottom of probe Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I
2017-03-07  9:52   ` Kishon Vijay Abraham I

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