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From: Wei Xu <xuwei5@hisilicon.com>
To: Leo Yan <leo.yan@linaro.org>, Rob Herring <robh+dt@kernel.org>,
	"Mark Rutland" <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Zhangfei Gao <zhangfei.gao@linaro.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-clk@vger.kernel.org>, Guodong Xu <guodong.xu@linaro.org>,
	"Haojian Zhuang" <haojian.zhuang@linaro.org>
Subject: Re: [PATCH v3 2/2] arm64: dts: add sp804 timer node for Hi3660
Date: Thu, 15 Jun 2017 21:00:58 +0100	[thread overview]
Message-ID: <5942E77A.8080500@hisilicon.com> (raw)
In-Reply-To: <1495428748-11153-3-git-send-email-leo.yan@linaro.org>

Hi Leo,

On 2017/5/22 5:52, Leo Yan wrote:
> The Hi3660 SoC comes with the sp804 timer in addition to the
> architecture timers. These ones are shutdown when reaching a deep idle
> states and a backup timer is needed. The sp804 belongs to another power
> domain and can fulfill the purpose of replacing temporarily an
> architecture timer when the CPU is idle.
> 
> Describe it in the device tree, so it can be enabled at boot time.
> 
> Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
> ---
>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index 138fcba..f75c792 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -173,6 +173,17 @@
>  			#clock-cells = <1>;
>  		};
>  
> +		dual_timer0: timer@fff14000 {
> +			compatible = "arm,sp804", "arm,primecell";
> +			reg = <0x0 0xfff14000 0x0 0x1000>;
> +			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&crg_ctrl HI3660_OSC32K>,
> +				 <&crg_ctrl HI3660_OSC32K>,
> +				 <&crg_ctrl HI3660_OSC32K>;
> +			clock-names = "timer1", "timer2", "apb_pclk";
> +		};
> +
>  		ufs: ufs@ff3b0000 {
>  			compatible = "jedec,ufs-1.1", "hisilicon,hi3660-ufs";
>  			reg = <0x0 0xff3b0000 0x0 0x1000>, /* 0: HCI standard */
> 

Since the dts part is not depended on the driver and Guodong has put this into another
patch set[1], I will pick up that one.
Thanks!

[1]: https://lkml.org/lkml/2017/6/14/1049

BR,
Wei

WARNING: multiple messages have this Message-ID (diff)
From: xuwei5@hisilicon.com (Wei Xu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 2/2] arm64: dts: add sp804 timer node for Hi3660
Date: Thu, 15 Jun 2017 21:00:58 +0100	[thread overview]
Message-ID: <5942E77A.8080500@hisilicon.com> (raw)
In-Reply-To: <1495428748-11153-3-git-send-email-leo.yan@linaro.org>

Hi Leo,

On 2017/5/22 5:52, Leo Yan wrote:
> The Hi3660 SoC comes with the sp804 timer in addition to the
> architecture timers. These ones are shutdown when reaching a deep idle
> states and a backup timer is needed. The sp804 belongs to another power
> domain and can fulfill the purpose of replacing temporarily an
> architecture timer when the CPU is idle.
> 
> Describe it in the device tree, so it can be enabled at boot time.
> 
> Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
> ---
>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index 138fcba..f75c792 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -173,6 +173,17 @@
>  			#clock-cells = <1>;
>  		};
>  
> +		dual_timer0: timer at fff14000 {
> +			compatible = "arm,sp804", "arm,primecell";
> +			reg = <0x0 0xfff14000 0x0 0x1000>;
> +			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&crg_ctrl HI3660_OSC32K>,
> +				 <&crg_ctrl HI3660_OSC32K>,
> +				 <&crg_ctrl HI3660_OSC32K>;
> +			clock-names = "timer1", "timer2", "apb_pclk";
> +		};
> +
>  		ufs: ufs at ff3b0000 {
>  			compatible = "jedec,ufs-1.1", "hisilicon,hi3660-ufs";
>  			reg = <0x0 0xff3b0000 0x0 0x1000>, /* 0: HCI standard */
> 

Since the dts part is not depended on the driver and Guodong has put this into another
patch set[1], I will pick up that one.
Thanks!

[1]: https://lkml.org/lkml/2017/6/14/1049

BR,
Wei

WARNING: multiple messages have this Message-ID (diff)
From: Wei Xu <xuwei5@hisilicon.com>
To: Leo Yan <leo.yan@linaro.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Zhangfei Gao <zhangfei.gao@linaro.org>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	Guodong Xu <guodong.xu@linaro.org>,
	Haojian Zhuang <haojian.zhuang@linaro.org>
Subject: Re: [PATCH v3 2/2] arm64: dts: add sp804 timer node for Hi3660
Date: Thu, 15 Jun 2017 21:00:58 +0100	[thread overview]
Message-ID: <5942E77A.8080500@hisilicon.com> (raw)
In-Reply-To: <1495428748-11153-3-git-send-email-leo.yan@linaro.org>

Hi Leo,

On 2017/5/22 5:52, Leo Yan wrote:
> The Hi3660 SoC comes with the sp804 timer in addition to the
> architecture timers. These ones are shutdown when reaching a deep idle
> states and a backup timer is needed. The sp804 belongs to another power
> domain and can fulfill the purpose of replacing temporarily an
> architecture timer when the CPU is idle.
> 
> Describe it in the device tree, so it can be enabled at boot time.
> 
> Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
> ---
>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index 138fcba..f75c792 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -173,6 +173,17 @@
>  			#clock-cells = <1>;
>  		};
>  
> +		dual_timer0: timer@fff14000 {
> +			compatible = "arm,sp804", "arm,primecell";
> +			reg = <0x0 0xfff14000 0x0 0x1000>;
> +			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&crg_ctrl HI3660_OSC32K>,
> +				 <&crg_ctrl HI3660_OSC32K>,
> +				 <&crg_ctrl HI3660_OSC32K>;
> +			clock-names = "timer1", "timer2", "apb_pclk";
> +		};
> +
>  		ufs: ufs@ff3b0000 {
>  			compatible = "jedec,ufs-1.1", "hisilicon,hi3660-ufs";
>  			reg = <0x0 0xff3b0000 0x0 0x1000>, /* 0: HCI standard */
> 

Since the dts part is not depended on the driver and Guodong has put this into another
patch set[1], I will pick up that one.
Thanks!

[1]: https://lkml.org/lkml/2017/6/14/1049

BR,
Wei


  reply	other threads:[~2017-06-15 20:00 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-22  4:52 [PATCH v3 0/2] Hi3660: enable sp804 timer Leo Yan
2017-05-22  4:52 ` Leo Yan
2017-05-22  4:52 ` [PATCH v3 1/2] clk: Hi3660: register fixed_rate_clks with CLK_OF_DECLARE_DRIVER Leo Yan
2017-05-22  4:52   ` Leo Yan
2017-06-19 23:36   ` Stephen Boyd
2017-06-19 23:36     ` Stephen Boyd
2017-06-19 23:36     ` Stephen Boyd
2017-06-20  0:09     ` Leo Yan
2017-06-20  0:09       ` Leo Yan
2017-06-20  0:09       ` Leo Yan
2017-05-22  4:52 ` [PATCH v3 2/2] arm64: dts: add sp804 timer node for Hi3660 Leo Yan
2017-05-22  4:52   ` Leo Yan
2017-06-15 20:00   ` Wei Xu [this message]
2017-06-15 20:00     ` Wei Xu
2017-06-15 20:00     ` Wei Xu
2017-06-15 23:59     ` Leo Yan
2017-06-15 23:59       ` Leo Yan
2017-06-15 23:59       ` Leo Yan

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