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* [PATCH v6 0/7] Add RAS virtualization support for SEA/SEI notification type in KVM
@ 2017-08-28 10:38 ` Dongjiu Geng
  0 siblings, 0 replies; 178+ messages in thread
From: Dongjiu Geng @ 2017-08-28 10:38 UTC (permalink / raw)
  To: christoffer.dall, marc.zyngier, rkrcmar, linux, catalin.marinas,
	will.deacon, lenb, robert.moore, lv.zheng, mark.rutland,
	james.morse, xiexiuqi, cov, david.daney, suzuki.poulose, stefan,
	Dave.Martin, kristina.martsenko, wangkefeng.wang, tbaicar,
	ard.biesheuvel, mingo, bp, shiju.jose, zjzhang, linux-arm-kernel,
	kvmarm, kvm, linux-kernel, linux-acpi, devel, mst, john.garry,
	jonathan.cameron, shameerali.kolot
  Cc: zhengqiang10, wuquanming, huangshaoyu, linuxarm, gengdongjiu

In the firmware-first RAS solution, corrupt data is detected in a
memory location when guest OS application software executing at EL0
or guest OS kernel El1 software are reading from the memory. The
memory node records errors in an error record accessible using
system registers.

Because SCR_EL3.EA is 1, then CPU will trap to El3 firmware, EL3
firmware records the error to APEI table through reading system
register.

Because the error was taken from a lower Exception level, if the
exception is SEA/SEI and HCR_EL2.TEA/HCR_EL2.AMO is 1, firmware
sets ESR_EL2/FAR_EL2 to fake a exception trap to EL2, then
transfers to hypervisor.

For the synchronous external abort(SEA), Hypervisor calls the
ghes_handle_memory_failure() to deal with this error,
ghes_handle_memory_failure() function reads the APEI table and 
callls memory_failure() to decide whether it needs to deliver
SIGBUS signal to user space, the advantage of using SIGBUS signal
to notify user space is that it can be compatible with Non-Kvm users.

For the SError Interrupt(SEI),KVM firstly classified the error.
Not call memory_failure() to handle it. Because the error address recorded
by APEI is not accurated, so can not identify the address to hwpoison
memory. If the SError error comes from guest user mode and is not propagated,
then signal user space to handle it, otherwise, directly injects virtual
SError, or panic if the error is fatal. when user space handles the error,
it will specify syndrome for the injected virtual SError. This syndrome value
is set to the VSESR_EL2. VSESR_EL2 is a new ARMv8.2 RAS extensions register
which provides the syndrome value reported to software on taking a virtual
SError interrupt exception.

Dongjiu Geng (5):
  acpi: apei: remove the unused code
  arm64: kvm: support user space to query RAS extension feature
  arm64: kvm: route synchronous external abort exceptions to el2
  KVM: arm64: allow get exception information from userspace
  arm64: kvm: handle SEI notification and pass the virtual syndrome

James Morse (1):
  KVM: arm64: Save ESR_EL2 on guest SError

Xie XiuQi (1):
  arm64: cpufeature: Detect CPU RAS Extentions

 arch/arm/include/asm/kvm_host.h      |  2 ++
 arch/arm/kvm/guest.c                 |  9 ++++++
 arch/arm64/Kconfig                   | 16 +++++++++++
 arch/arm64/include/asm/barrier.h     |  1 +
 arch/arm64/include/asm/cpucaps.h     |  3 +-
 arch/arm64/include/asm/esr.h         | 11 +++++++
 arch/arm64/include/asm/kvm_arm.h     |  2 ++
 arch/arm64/include/asm/kvm_emulate.h | 17 +++++++++++
 arch/arm64/include/asm/kvm_host.h    |  2 ++
 arch/arm64/include/asm/sysreg.h      |  5 ++++
 arch/arm64/include/asm/system_misc.h |  1 +
 arch/arm64/include/uapi/asm/kvm.h    |  5 ++++
 arch/arm64/kernel/cpufeature.c       | 13 +++++++++
 arch/arm64/kernel/process.c          |  3 ++
 arch/arm64/kvm/guest.c               | 50 ++++++++++++++++++++++++++++++++
 arch/arm64/kvm/handle_exit.c         | 56 ++++++++++++++++++++++++++++++++----
 arch/arm64/kvm/hyp/switch.c          | 29 +++++++++++++++++--
 arch/arm64/kvm/reset.c               |  3 ++
 arch/arm64/mm/fault.c                | 34 ++++++++++++++++++++++
 drivers/acpi/apei/ghes.c             | 14 ---------
 include/uapi/linux/kvm.h             |  3 ++
 virt/kvm/arm/arm.c                   |  7 +++++
 22 files changed, 263 insertions(+), 23 deletions(-)

-- 
2.14.1

^ permalink raw reply	[flat|nested] 178+ messages in thread
* Re: [Devel] [PATCH v6 0/7] Add RAS virtualization support for SEA/SEI notification type in KVM
  2017-09-04 11:10     ` gengdongjiu
  (?)
  (?)
@ 2017-09-07 16:32 ` James Morse
  -1 siblings, 0 replies; 178+ messages in thread
From: James Morse @ 2017-09-07 16:32 UTC (permalink / raw)
  To: devel

[-- Attachment #1: Type: text/plain, Size: 7383 bytes --]

Hi gengdongjiu,

(I've re-ordered some of the hunks here:)

On 04/09/17 12:10, gengdongjiu wrote:
> On 2017/9/1 1:43, James Morse wrote:
>> On 28/08/17 11:38, Dongjiu Geng wrote:
>>> Not call memory_failure() to handle it. Because the error address recorded
>>> by APEI is not accurated, so can not identify the address to hwpoison
>>> memory.
>>
>> This looks like a firmware bug, what address do you get in your CPER
>> records? It should be a physical address.

> No, not firmware bug. At least in the armv8.0 CPU and huawei's armv8.2 CPU,
> the architecture decided it is not accurate, this abort is asynchronous not
> synchronous.

This is going to be a problem. (I'm chasing Achin to find out when this is
allowed to happen and what we're expected to do about it!)

I hope this isn't the default behaviour, but only happens in exceptionally rare
circumstances.


>> To report a memory-error you must have an address.
> maybe we can not get the accurate error address, can you get it in your armv8
> platform?

I only have software-models, they only generate the errors you tell them to.


I think I see why you're taking this approach with the series, the scenario is:
1. Firmware takes an SError due to a bad memory location from guest EL0.
2. The CPU doesn't provide the address of the memory location.

You want to confine this error as much as possible, in particular to the context
it came from (e.g. guest EL0). CPU context isn't something the CPER records can
describe (they describe failures in system components), hence your hybrid
{kernel,firmware}-first code.

I don't think its safe to kill guest-EL0 and hope this confined the error.

If the affected page of guest memory has never been written to by the guest, the
host will map in the global zero-page, (made read-only at stage2). If the
corruption is in this page it affects the host kernel, guests and user-space
processes. Just because the error came from guest-EL0 doesn't mean
kernel/hypervisor memory isn't affected.

This doesn't just affect that one page: KSM may have merged every copy of every
guest user-space's libc, which has subsequently become corrupt. The first
guest-EL0 to step in this triggers the fault, but it affects all the guests.
With the address all the guests can fix this error, and KSM will re-merge the
pages. Without the address every user-space process in every guest will
eventually be killed.

We aren't even guaranteed that the access that caused the fault came from your
guest EL0. The fault may be in the page tables belonging to the guest kernel,
even worse they may belong to they hypervisor's stage2 page tables.

(Thanks to Mark and Robin for these examples)


I think in this scenario your firmware should describe a memory-error with an
unknown address. (i.e. don't set the 'physical address valid' bit in CPER's
'Table 275 Memory Error Record'). When Linux gets one of these, it should
panic(): We know some memory is corrupt, we don't know where it is.


>> User-space may be signalled by the memory_failure() helper, and user-space >>
may choose to notify the guest about the memory-failure, but this would be a
>> new error.

> For the SError, it is asynchronous abort. so it is not better to call
> memory_failure() helper, because the error address is not accurate.
> memory_failure() will offline or poison the address, but the address is not
> accurate. so it is dangerous

By 'not accurate' do you mean the CPU provides an address, and its wrong.
(surely this is a CPU bug), or just no address is provided. (i.e. the
ERR<n>ADDR.AI 'address incorrect' bit is set).


>>> Because the error was taken from a lower Exception level, if the
>>> exception is SEA/SEI and HCR_EL2.TEA/HCR_EL2.AMO is 1, firmware
>>> sets ESR_EL2/FAR_EL2 to fake a exception trap to EL2, then
>>> transfers to hypervisor.
>>
>> What happens if you took an SError from EL2 and EL2 has PSTATE.A set masking
>> SError? (this is very common today: all kernel code runs like this).

> Firstly, the guest OS usually runs in the El1 or El0, not El2.
> if El2 happens an SError, it will trap to EL3 firmware even though the PSTATE.A is set.
> Because the PSTATE.A can not mask it if the SError is trapped to EL3.

Sure, we agree that from the CPU's view when SCR_EL3.EA is set physical-SError
can't be masked when executing any EL below EL3.

My question was about the 'firmware sets ESR_EL2/FAR_EL2 to fake an exception
trap to EL2' step. While EL3 can take the physical-SError at any time the
normal-world is running, it can't always deliver a fake-SError to EL2, because
EL2 believes it has masked physical-SError.

With the SError rework this should only be masked while we are in entry.S
preparing to handle an exception, receiving an unexpected asynchronous exception
at this point would overwrite ELR/ESR, meaning we could never handle the
original exception.


>> What happens if the hypervisor then executes an ESB with PSTATE.A set? It
>> expects to see any pending SError deferred and its syndrome written to DISR_EL1,
>> but this register is RAZ/WI when you set SCR_EL3.EA. '4.4.2' of [0]

> From my understand, if the SCR_EL3.EA is set, the Abort can not mask, it always happen and
> take to EL3, DISR_El1 can not record the syndrome. DISR_El1 is only recorded when
> the External Abort is masked, but when SCR_EL3.EA is set, the pstate.A can not mask the Error.

But once EL3 wants to notify EL2, and EL2 believes it has SError masked, (even
if the CPU knows its going route physical-SError to EL3) what do you do?

(The best I can think of is that if firmware has to deliver a RAS Error as a
fake-SError, and the target exception-level has SError masked, then firmware
should reboot normal-world and deliver the error via the BERT. To support
NOTIFY_SEI the OS should aim to mask SError as little as possible.)


>>> For the synchronous external abort(SEA), Hypervisor calls the
>>> ghes_handle_memory_failure() to deal with this error,
>>> ghes_handle_memory_failure() function reads the APEI table and 
>>> callls memory_failure() to decide whether it needs to deliver
>>> SIGBUS signal to user space, the advantage of using SIGBUS signal
>>> to notify user space is that it can be compatible with Non-Kvm users.
>>>
>>> For the SError Interrupt(SEI),KVM firstly classified the error.
>>
>> KVM can't parse the CPER records, nor does it know where to look to find them.
>> KVM should call out to the APEI code so the host kernel can handle the error.

> KVM does not parse the CPER records, I mean KVM classified the error according to the esr_el2.AET.

Decoding the AET bits in KVM is stub code for systems without firmware-first.
This will eventually be a call-out to some arm64 arch code to decode the RAS ERR
records and do kernel-first handling.

All the GHES notification methods mean 'go read the CPER records'. The CPER
records then contain all the information, including severities. The SError ESR
value should be irrelevant if the host supports firmware-first.

Without firmware-first or kernel-first we decode the SError ESR to know whether
or not to panic(). This is the minimum-work to avoid data corruption while Linux
only supports firmware-first and the platform expects kernel-first.



Thanks,

James


^ permalink raw reply	[flat|nested] 178+ messages in thread
* Re: [Devel] [PATCH v6 5/7] arm64: kvm: route synchronous external abort exceptions to el2
  2017-09-07 16:31     ` James Morse
                   ` (2 preceding siblings ...)
  (?)
@ 2017-09-13  8:12 ` gengdongjiu
  -1 siblings, 0 replies; 178+ messages in thread
From: gengdongjiu @ 2017-09-13  8:12 UTC (permalink / raw)
  To: devel

[-- Attachment #1: Type: text/plain, Size: 1944 bytes --]



On 2017/9/8 0:31, James Morse wrote:
> Hi Dongjiu Geng,
> 
> On 28/08/17 11:38, Dongjiu Geng wrote:
>> ARMv8.2 adds a new bit HCR_EL2.TEA which controls to
>> route synchronous external aborts to EL2, and adds a
>> trap control bit HCR_EL2.TERR which controls to
>> trap all Non-secure EL1&0 error record accesses to EL2.
>>
>> This patch enables the two bits for the guest OS.
>> when an synchronous abort is generated in the guest OS,
> 
>> it will trap to EL3 firmware, EL3 firmware will check the
>> HCR_EL2.TEA value to decide to jump to hypervisor or host
>> OS.
> 
> (This is what you are using this for, the patch has nothing to do with EL3.)

No, EL3 will check the HCR_EL2.TEA to decide to jump to hypervisor or host kernel.


> 
> 
>> Enabling HCR_EL2.TERR makes error record access
>> from guest trap to EL2.
> 
> 
> KVM already handles external aborts from lower exception levels, no more work
> needs doing for TEA.
when SCR_EL3.EA is set, TEA will not workable, El3 only check its value to decide to hypervisor or EL1 host kernel.

> 
> What happens when a guest access the RAS-Error-Record registers?
it will trap to EL2 kvm

> 
> Before we can set HCR_EL2.TERR I think we need to add some minimal emulation for
> the registers it traps. Most of them should be RAZ/WI, so it should be
> straightforward. (I think KVMs default is to emulate an undef for unknown traps).

if KVM default handling is to emulate an undef for unknown traps, how about we use its default way? because no one access
the ERR RAS register in the guest .

> 
> Eventually we will want to back this with a page of memory that lets
> Qemu/kvmtool configure what the guest can see. (i.e. the emulated machine's
> errors for kernel-first handling.)
I think emulate it to an undef for unknown traps can be enough, no one access the ERR register in the guest.

> 
> 
> Thanks,
> 
> James
> 
> .
> 


^ permalink raw reply	[flat|nested] 178+ messages in thread
* Re: [PATCH v6 5/7] arm64: kvm: route synchronous external abort exceptions to el2
@ 2017-10-17 15:22 ` gengdongjiu
  0 siblings, 0 replies; 178+ messages in thread
From: gengdongjiu @ 2017-10-17 15:22 UTC (permalink / raw)
  To: James Morse
  Cc: Wangkefeng (Kevin), kvm@vger.kernel.org, david.daney@cavium.com,
	catalin.marinas@arm.com, tbaicar@codeaurora.org,
	will.deacon@arm.com, Linuxarm, robert.moore@intel.com,
	lv.zheng@intel.com, zjzhang@codeaurora.org, mingo@kernel.org,
	stefan@hello-penguin.com, linux@armlinux.org.uk,
	kvmarm@lists.cs.columbia.edu, linux-acpi@vger.kernel.org,
	Huangshaoyu, huangdaode, bp@suse.de, Dave.Martin@arm.com

Hi James,

> Hi gengdongjiu,
> 
> On 14/09/17 12:12, gengdongjiu wrote:
> > On 2017/9/8 0:31, James Morse wrote:
> >> KVM already handles external aborts from lower exception levels, no
> >> more work needs doing for TEA.
> > If it is firmware first solution, that is SCR_EL3.EA=1, all SError
> > interrupt and synchronous External Abort exceptions are taken to EL3, so EL3 firmware will handle it, KVM no needs to handle it.
> >
> > HCR_EL3.TEA is only for EL3 to check its value to decide to jump to hypervisor or kernel.
> >
> >>
> >> What happens when a guest access the RAS-Error-Record registers?
> >>
> >> Before we can set HCR_EL2.TERR I think we need to add some minimal
> >> emulation for the registers it traps. Most of them should be RAZ/WI,
> >> so it should be straightforward. (I think KVMs default is to emulate an undef for unknown traps).
> 
> > Today I added the support to do some minimal emulation for
> > RAS-Error-Record registers, thanks for the good suggestion.
> 
> Where can I find this patch?
> I'd like to repost it as part of the SError_rework/RAS/IESB series: this is one of the bits KVM needs but I didn't touch as it looks like your
> updated version of this patch should cover it.

I have updated my series patches to a new version, and have sent it out, you can find it. Thank you very much.

> 
> 
> Thanks,
> 
> James

^ permalink raw reply	[flat|nested] 178+ messages in thread
end of thread, other threads:[~2017-10-19  7:51 UTC | newest]

Thread overview: 178+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-08-28 10:38 [PATCH v6 0/7] Add RAS virtualization support for SEA/SEI notification type in KVM Dongjiu Geng
2017-08-28 10:38 ` Dongjiu Geng
2017-08-28 10:38 ` Dongjiu Geng
2017-08-28 10:38 ` Dongjiu Geng
2017-08-28 10:38 ` [PATCH v6 1/7] arm64: cpufeature: Detect CPU RAS Extentions Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-31 17:44   ` James Morse
2017-08-31 17:44     ` James Morse
2017-08-31 17:44     ` James Morse
2017-09-04 11:20     ` gengdongjiu
2017-09-04 11:20       ` gengdongjiu
2017-09-04 11:20       ` gengdongjiu
2017-09-04 11:20       ` gengdongjiu
2017-08-28 10:38 ` [PATCH v6 2/7] KVM: arm64: Save ESR_EL2 on guest SError Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38 ` [PATCH v6 3/7] acpi: apei: remove the unused code Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-31 17:50   ` James Morse
2017-08-31 17:50     ` James Morse
2017-08-31 17:50     ` James Morse
2017-09-04 11:43     ` gengdongjiu
2017-09-04 11:43       ` gengdongjiu
2017-09-04 11:43       ` gengdongjiu
2017-09-04 11:43       ` gengdongjiu
2017-09-08 18:17       ` [Devel] " James Morse
2017-09-08 18:17         ` James Morse
2017-09-08 18:17         ` James Morse
2017-09-08 18:17         ` James Morse
2017-09-11 12:04         ` [Devel] " gengdongjiu
2017-09-11 12:04           ` gengdongjiu
2017-09-11 12:04           ` gengdongjiu
2017-09-11 12:04           ` gengdongjiu
2017-09-11 12:04           ` gengdongjiu
2017-09-14 12:35           ` James Morse
2017-09-14 12:35             ` James Morse
2017-09-14 12:35             ` James Morse
2017-09-14 12:51             ` gengdongjiu
2017-09-14 12:51               ` gengdongjiu
2017-09-14 12:51               ` gengdongjiu
2017-09-14 12:51               ` gengdongjiu
2017-08-28 10:38 ` [PATCH v6 4/7] arm64: kvm: support user space to query RAS extension feature Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-31 18:04   ` James Morse
2017-08-31 18:04     ` James Morse
2017-08-31 18:04     ` James Morse
2017-09-05  7:18     ` gengdongjiu
2017-09-05  7:18       ` gengdongjiu
2017-09-05  7:18       ` gengdongjiu
2017-09-07 16:31       ` [Devel] " James Morse
2017-09-07 16:31         ` James Morse
2017-09-07 16:31         ` James Morse
2017-09-07 16:31         ` James Morse
2017-09-08 14:34         ` 答复: " gengdongjiu
2017-09-08 14:34           ` gengdongjiu
2017-09-08 14:34           ` gengdongjiu
2017-09-08 15:03           ` Peter Maydell
2017-09-08 15:03             ` Peter Maydell
2017-09-08 15:03             ` Peter Maydell
2017-09-14 12:34             ` James Morse
2017-09-14 12:34               ` James Morse
2017-09-14 12:34               ` James Morse
2017-09-08 17:36         ` [Devel] " gengdongjiu
2017-09-08 17:36           ` gengdongjiu
2017-09-08 17:36           ` gengdongjiu
2017-09-08 17:36           ` gengdongjiu
2017-09-14 12:38           ` James Morse
2017-09-14 12:38             ` James Morse
2017-09-14 12:38             ` James Morse
2017-08-28 10:38 ` [PATCH v6 5/7] arm64: kvm: route synchronous external abort exceptions to el2 Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-09-07 16:31   ` [Devel] " James Morse
2017-09-07 16:31     ` James Morse
2017-09-07 16:31     ` James Morse
2017-09-07 16:31     ` James Morse
2017-09-14 11:12     ` gengdongjiu
2017-09-14 11:12       ` gengdongjiu
2017-09-14 11:12       ` gengdongjiu
2017-09-14 11:12       ` gengdongjiu
2017-09-14 12:36       ` James Morse
2017-09-14 12:36         ` James Morse
2017-09-14 12:36         ` James Morse
2017-10-16 11:44       ` James Morse
2017-10-16 11:44         ` James Morse
2017-10-16 11:44         ` James Morse
2017-10-16 13:44         ` gengdongjiu
2017-10-16 13:44           ` gengdongjiu
2017-10-16 13:44           ` gengdongjiu
2017-08-28 10:38 ` [PATCH v6 6/7] KVM: arm64: allow get exception information from userspace Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-09-07 16:30   ` [Devel] " James Morse
2017-09-07 16:30     ` James Morse
2017-09-07 16:30     ` James Morse
2017-09-07 16:30     ` James Morse
2017-09-13  7:32     ` [Devel] " gengdongjiu
2017-09-13  7:32       ` gengdongjiu
2017-09-13  7:32       ` gengdongjiu
2017-09-13  7:32       ` gengdongjiu
2017-09-13  7:32       ` gengdongjiu
2017-09-14 13:00       ` James Morse
2017-09-14 13:00         ` James Morse
2017-09-14 13:00         ` James Morse
2017-09-18 13:36         ` gengdongjiu
2017-09-18 13:36           ` gengdongjiu
2017-09-18 13:36           ` gengdongjiu
2017-09-18 13:36           ` gengdongjiu
2017-09-22 16:39           ` James Morse
2017-09-22 16:39             ` James Morse
2017-09-22 16:39             ` James Morse
2017-09-25 15:13             ` 答复: " gengdongjiu
2017-09-25 15:13               ` gengdongjiu
2017-09-25 15:13               ` gengdongjiu
2017-10-06 16:46               ` James Morse
2017-10-06 16:46                 ` James Morse
2017-10-06 16:46                 ` James Morse
2017-10-19  5:48                 ` gengdongjiu
2017-10-19  5:48                   ` gengdongjiu
2017-10-19  5:48                   ` gengdongjiu
2017-09-21  7:55         ` gengdongjiu
2017-09-21  7:55           ` gengdongjiu
2017-09-21  7:55           ` gengdongjiu
2017-09-21  7:55           ` gengdongjiu
2017-09-22 16:51           ` James Morse
2017-09-22 16:51             ` James Morse
2017-09-22 16:51             ` James Morse
2017-09-27 11:07             ` gengdongjiu
2017-09-27 11:07               ` gengdongjiu
2017-09-27 11:07               ` gengdongjiu
2017-09-27 11:07               ` gengdongjiu
2017-09-27 15:37               ` gengdongjiu
2017-09-27 15:37                 ` gengdongjiu
2017-09-27 15:37                 ` gengdongjiu
2017-10-06 17:31               ` James Morse
2017-10-06 17:31                 ` James Morse
2017-10-06 17:31                 ` James Morse
2017-10-19  7:49                 ` gengdongjiu
2017-10-19  7:49                   ` gengdongjiu
2017-10-19  7:49                   ` gengdongjiu
2017-10-19  7:49                   ` gengdongjiu
2017-08-28 10:38 ` [PATCH v6 7/7] arm64: kvm: handle SEI notification and pass the virtual syndrome Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-28 10:38   ` Dongjiu Geng
2017-08-31 17:43 ` [PATCH v6 0/7] Add RAS virtualization support for SEA/SEI notification type in KVM James Morse
2017-08-31 17:43   ` James Morse
2017-08-31 17:43   ` James Morse
2017-09-04 11:10   ` gengdongjiu
2017-09-04 11:10     ` gengdongjiu
2017-09-04 11:10     ` gengdongjiu
2017-09-04 11:10     ` gengdongjiu
2017-09-06 11:19 ` Peter Maydell
2017-09-06 11:19   ` Peter Maydell
2017-09-06 11:19   ` Peter Maydell
2017-09-06 11:29   ` gengdongjiu
2017-09-06 11:29     ` gengdongjiu
2017-09-06 11:29     ` gengdongjiu
  -- strict thread matches above, loose matches on Subject: below --
2017-09-07 16:32 [Devel] " James Morse
2017-09-07 16:32 ` James Morse
2017-09-07 16:32 ` James Morse
2017-09-07 16:32 ` James Morse
2017-09-13  8:12 [Devel] [PATCH v6 5/7] arm64: kvm: route synchronous external abort exceptions to el2 gengdongjiu
2017-09-13  8:12 ` gengdongjiu
2017-09-13  8:12 ` gengdongjiu
2017-09-13  8:12 ` gengdongjiu
2017-09-13  8:12 ` gengdongjiu
2017-10-17 15:22 gengdongjiu
2017-10-17 15:22 ` gengdongjiu

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