From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Chris Packham <chris.packham@alliedtelesis.co.nz>,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
catalin.marinas@arm.com, will@kernel.org, andrew@lunn.ch,
gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com,
kostap@marvell.com, robert.marko@sartura.hr
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 1/3] dt-bindings: marvell: Document the AC5/AC5X compatibles
Date: Wed, 11 May 2022 18:34:03 +0200 [thread overview]
Message-ID: <5c498985-64bb-b8ba-3e77-9cdb36dd1f16@linaro.org> (raw)
In-Reply-To: <20220510231002.1160798-2-chris.packham@alliedtelesis.co.nz>
On 11/05/2022 01:10, Chris Packham wrote:
> Describe the compatible properties for the Marvell Alleycat5/5X switches
> with integrated CPUs.
>
> Alleycat5:
> * 98DX2538: 24x1G + 2x10G + 2x10G Stack
> * 98DX2535: 24x1G + 4x1G Stack
> * 98DX2532: 8x1G + 2x10G + 2x1G Stack
> * 98DX2531: 8x1G + 4x1G Stack
> * 98DX2528: 24x1G + 2x10G + 2x10G Stack
> * 98DX2525: 24x1G + 4x1G Stack
> * 98DX2522: 8x1G + 2x10G + 2x1G Stack
> * 98DX2521: 8x1G + 4x1G Stack
> * 98DX2518: 24x1G + 2x10G + 2x10G Stack
> * 98DX2515: 24x1G + 4x1G Stack
> * 98DX2512: 8x1G + 2x10G + 2x1G Stack
> * 98DX2511: 8x1G + 4x1G Stack
>
> Alleycat5X:
> * 98DX3500: 24x1G + 6x25G
> * 98DX3501: 16x1G + 6x10G
> * 98DX3510: 48x1G + 6x25G
> * 98DX3520: 24x2.5G + 6x25G
> * 98DX3530: 48x2.5G + 6x25G
> * 98DX3540: 12x5G/6x10G + 6x25G
> * 98DX3550: 24x5G/12x10G + 6x25G
>
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
>
> Notes:
> Changes in v6:
> - New
>
> .../bindings/arm/marvell/armada-98dx2530.yaml | 27 +++++++++++++++++++
> 1 file changed, 27 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-98dx2530.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-98dx2530.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-98dx2530.yaml
> new file mode 100644
> index 000000000000..6d9185baf0c5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/marvell/armada-98dx2530.yaml
> @@ -0,0 +1,27 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/marvell/armada-98dx2530.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Marvell Alleycat5/5X Platforms
> +
> +maintainers:
> + - Chris Packham <chris.packham@alliedtelesis.co.nz>
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + oneOf:
> +
> + - description: Alleycat5 (98DX25xx)
> + items:
> + - const: marvell,ac5
This is confusing and does not look correct. The DTS calls AC5 a SoC and
you cannot have SoC alone. It's unusable without a SoM or board.
> +
> + - description: Alleycat5X (98DX35xx)
> + items:
> + - const: marvell,ac5x
> + - const: marvell,ac5
This entry looks correct except ac5x once is called a SoC and once a
RD-AC5X board.
It cannot be both. Probably you need third compatible, assuming AC5x is
a flavor of AC5.
items:
- enum:
- marvell,rd-ac5x
- const: marvell,ac5x
- const: marvell,ac5
> +
> +additionalProperties: true
Best regards,
Krzysztof
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Chris Packham <chris.packham@alliedtelesis.co.nz>,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
catalin.marinas@arm.com, will@kernel.org, andrew@lunn.ch,
gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com,
kostap@marvell.com, robert.marko@sartura.hr
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 1/3] dt-bindings: marvell: Document the AC5/AC5X compatibles
Date: Wed, 11 May 2022 18:34:03 +0200 [thread overview]
Message-ID: <5c498985-64bb-b8ba-3e77-9cdb36dd1f16@linaro.org> (raw)
In-Reply-To: <20220510231002.1160798-2-chris.packham@alliedtelesis.co.nz>
On 11/05/2022 01:10, Chris Packham wrote:
> Describe the compatible properties for the Marvell Alleycat5/5X switches
> with integrated CPUs.
>
> Alleycat5:
> * 98DX2538: 24x1G + 2x10G + 2x10G Stack
> * 98DX2535: 24x1G + 4x1G Stack
> * 98DX2532: 8x1G + 2x10G + 2x1G Stack
> * 98DX2531: 8x1G + 4x1G Stack
> * 98DX2528: 24x1G + 2x10G + 2x10G Stack
> * 98DX2525: 24x1G + 4x1G Stack
> * 98DX2522: 8x1G + 2x10G + 2x1G Stack
> * 98DX2521: 8x1G + 4x1G Stack
> * 98DX2518: 24x1G + 2x10G + 2x10G Stack
> * 98DX2515: 24x1G + 4x1G Stack
> * 98DX2512: 8x1G + 2x10G + 2x1G Stack
> * 98DX2511: 8x1G + 4x1G Stack
>
> Alleycat5X:
> * 98DX3500: 24x1G + 6x25G
> * 98DX3501: 16x1G + 6x10G
> * 98DX3510: 48x1G + 6x25G
> * 98DX3520: 24x2.5G + 6x25G
> * 98DX3530: 48x2.5G + 6x25G
> * 98DX3540: 12x5G/6x10G + 6x25G
> * 98DX3550: 24x5G/12x10G + 6x25G
>
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
>
> Notes:
> Changes in v6:
> - New
>
> .../bindings/arm/marvell/armada-98dx2530.yaml | 27 +++++++++++++++++++
> 1 file changed, 27 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-98dx2530.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-98dx2530.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-98dx2530.yaml
> new file mode 100644
> index 000000000000..6d9185baf0c5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/marvell/armada-98dx2530.yaml
> @@ -0,0 +1,27 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/marvell/armada-98dx2530.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Marvell Alleycat5/5X Platforms
> +
> +maintainers:
> + - Chris Packham <chris.packham@alliedtelesis.co.nz>
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + oneOf:
> +
> + - description: Alleycat5 (98DX25xx)
> + items:
> + - const: marvell,ac5
This is confusing and does not look correct. The DTS calls AC5 a SoC and
you cannot have SoC alone. It's unusable without a SoM or board.
> +
> + - description: Alleycat5X (98DX35xx)
> + items:
> + - const: marvell,ac5x
> + - const: marvell,ac5
This entry looks correct except ac5x once is called a SoC and once a
RD-AC5X board.
It cannot be both. Probably you need third compatible, assuming AC5x is
a flavor of AC5.
items:
- enum:
- marvell,rd-ac5x
- const: marvell,ac5x
- const: marvell,ac5
> +
> +additionalProperties: true
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-05-11 16:35 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-10 23:09 [PATCH v6 0/3] arm64: mvebu: Support for Marvell 98DX2530 (and variants) Chris Packham
2022-05-10 23:09 ` Chris Packham
2022-05-10 23:10 ` [PATCH v6 1/3] dt-bindings: marvell: Document the AC5/AC5X compatibles Chris Packham
2022-05-10 23:10 ` Chris Packham
2022-05-11 16:34 ` Krzysztof Kozlowski [this message]
2022-05-11 16:34 ` Krzysztof Kozlowski
2022-05-12 1:20 ` Chris Packham
2022-05-12 1:20 ` Chris Packham
2022-05-12 1:51 ` Chris Packham
2022-05-12 1:51 ` Chris Packham
2022-05-12 14:45 ` Krzysztof Kozlowski
2022-05-12 14:45 ` Krzysztof Kozlowski
2022-05-12 10:10 ` Krzysztof Kozlowski
2022-05-12 10:10 ` Krzysztof Kozlowski
2022-05-11 17:02 ` Andrew Lunn
2022-05-11 17:02 ` Andrew Lunn
2022-05-11 23:14 ` Chris Packham
2022-05-11 23:14 ` Chris Packham
2022-05-12 0:27 ` Andrew Lunn
2022-05-12 0:27 ` Andrew Lunn
2022-05-12 0:38 ` Chris Packham
2022-05-12 0:38 ` Chris Packham
2022-05-12 0:45 ` Andrew Lunn
2022-05-12 0:45 ` Andrew Lunn
2022-05-12 0:54 ` Chris Packham
2022-05-12 0:54 ` Chris Packham
2022-05-10 23:10 ` [PATCH v6 2/3] arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board Chris Packham
2022-05-10 23:10 ` Chris Packham
2022-05-11 16:38 ` Krzysztof Kozlowski
2022-05-11 16:38 ` Krzysztof Kozlowski
2022-05-11 23:49 ` Chris Packham
2022-05-11 23:49 ` Chris Packham
2022-05-12 14:45 ` Krzysztof Kozlowski
2022-05-12 14:45 ` Krzysztof Kozlowski
2022-05-10 23:10 ` [PATCH v6 3/3] arm64: marvell: enable the 98DX2530 pinctrl driver Chris Packham
2022-05-10 23:10 ` Chris Packham
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