From: Andrew Lunn <andrew@lunn.ch>
To: Chris Packham <Chris.Packham@alliedtelesis.co.nz>
Cc: "robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
"will@kernel.org" <will@kernel.org>,
"gregory.clement@bootlin.com" <gregory.clement@bootlin.com>,
"sebastian.hesselbarth@gmail.com"
<sebastian.hesselbarth@gmail.com>,
"kostap@marvell.com" <kostap@marvell.com>,
"robert.marko@sartura.hr" <robert.marko@sartura.hr>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v6 1/3] dt-bindings: marvell: Document the AC5/AC5X compatibles
Date: Thu, 12 May 2022 02:45:40 +0200 [thread overview]
Message-ID: <YnxYtE9dGn6BwF/8@lunn.ch> (raw)
In-Reply-To: <d9663aa1-e574-f12f-a330-79d984af107e@alliedtelesis.co.nz>
> Yes there are registers that you can read to identify the specific chip.
>
> It still might be useful to have a expected vs actual check as those ID
> values are determined by pin strapping resistors.
That i don't get? Can i turn a
* 98DX2538: 24x1G + 2x10G + 2x10G Stack
into a
* 98DX2535: 24x1G + 4x1G Stack
by strapping its pin differently?
> It could also be used
> to validate the dts (e.g. port 20 would be invalid on a 98DX3501). But
> those are considerations for further down the track.
Yes, that would be up to the switchdev driver to validate the DT based
on the ID register.
Andrew
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: Chris Packham <Chris.Packham@alliedtelesis.co.nz>
Cc: "robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
"will@kernel.org" <will@kernel.org>,
"gregory.clement@bootlin.com" <gregory.clement@bootlin.com>,
"sebastian.hesselbarth@gmail.com"
<sebastian.hesselbarth@gmail.com>,
"kostap@marvell.com" <kostap@marvell.com>,
"robert.marko@sartura.hr" <robert.marko@sartura.hr>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v6 1/3] dt-bindings: marvell: Document the AC5/AC5X compatibles
Date: Thu, 12 May 2022 02:45:40 +0200 [thread overview]
Message-ID: <YnxYtE9dGn6BwF/8@lunn.ch> (raw)
In-Reply-To: <d9663aa1-e574-f12f-a330-79d984af107e@alliedtelesis.co.nz>
> Yes there are registers that you can read to identify the specific chip.
>
> It still might be useful to have a expected vs actual check as those ID
> values are determined by pin strapping resistors.
That i don't get? Can i turn a
* 98DX2538: 24x1G + 2x10G + 2x10G Stack
into a
* 98DX2535: 24x1G + 4x1G Stack
by strapping its pin differently?
> It could also be used
> to validate the dts (e.g. port 20 would be invalid on a 98DX3501). But
> those are considerations for further down the track.
Yes, that would be up to the switchdev driver to validate the DT based
on the ID register.
Andrew
next prev parent reply other threads:[~2022-05-12 0:46 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-10 23:09 [PATCH v6 0/3] arm64: mvebu: Support for Marvell 98DX2530 (and variants) Chris Packham
2022-05-10 23:09 ` Chris Packham
2022-05-10 23:10 ` [PATCH v6 1/3] dt-bindings: marvell: Document the AC5/AC5X compatibles Chris Packham
2022-05-10 23:10 ` Chris Packham
2022-05-11 16:34 ` Krzysztof Kozlowski
2022-05-11 16:34 ` Krzysztof Kozlowski
2022-05-12 1:20 ` Chris Packham
2022-05-12 1:20 ` Chris Packham
2022-05-12 1:51 ` Chris Packham
2022-05-12 1:51 ` Chris Packham
2022-05-12 14:45 ` Krzysztof Kozlowski
2022-05-12 14:45 ` Krzysztof Kozlowski
2022-05-12 10:10 ` Krzysztof Kozlowski
2022-05-12 10:10 ` Krzysztof Kozlowski
2022-05-11 17:02 ` Andrew Lunn
2022-05-11 17:02 ` Andrew Lunn
2022-05-11 23:14 ` Chris Packham
2022-05-11 23:14 ` Chris Packham
2022-05-12 0:27 ` Andrew Lunn
2022-05-12 0:27 ` Andrew Lunn
2022-05-12 0:38 ` Chris Packham
2022-05-12 0:38 ` Chris Packham
2022-05-12 0:45 ` Andrew Lunn [this message]
2022-05-12 0:45 ` Andrew Lunn
2022-05-12 0:54 ` Chris Packham
2022-05-12 0:54 ` Chris Packham
2022-05-10 23:10 ` [PATCH v6 2/3] arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board Chris Packham
2022-05-10 23:10 ` Chris Packham
2022-05-11 16:38 ` Krzysztof Kozlowski
2022-05-11 16:38 ` Krzysztof Kozlowski
2022-05-11 23:49 ` Chris Packham
2022-05-11 23:49 ` Chris Packham
2022-05-12 14:45 ` Krzysztof Kozlowski
2022-05-12 14:45 ` Krzysztof Kozlowski
2022-05-10 23:10 ` [PATCH v6 3/3] arm64: marvell: enable the 98DX2530 pinctrl driver Chris Packham
2022-05-10 23:10 ` Chris Packham
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YnxYtE9dGn6BwF/8@lunn.ch \
--to=andrew@lunn.ch \
--cc=Chris.Packham@alliedtelesis.co.nz \
--cc=catalin.marinas@arm.com \
--cc=devicetree@vger.kernel.org \
--cc=gregory.clement@bootlin.com \
--cc=kostap@marvell.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robert.marko@sartura.hr \
--cc=robh+dt@kernel.org \
--cc=sebastian.hesselbarth@gmail.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.