From: Heinrich Schuchardt <xypron.glpk@gmx.de>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: u-boot@lists.denx.de, Simon Glass <sjg@chromium.org>,
Tom Rini <trini@konsulko.com>,
Ilias Apalodimas <ilias.apalodimas@linaro.org>
Subject: Re: [PATCH 07/16] LoongArch: lib: General routines
Date: Sun, 16 Jun 2024 13:01:46 +0200 [thread overview]
Message-ID: <630db8ca-d954-4fe7-b113-0057d5ba9563@gmx.de> (raw)
In-Reply-To: <20240522-loongarch-v1-7-1407e0b69678@flygoat.com>
On 5/22/24 17:34, Jiaxun Yang wrote:
> Add some common library routines for the architecture.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
> arch/loongarch/lib/Makefile | 7 ++++
> arch/loongarch/lib/asm-offsets.c | 66 ++++++++++++++++++++++++++++++++++++
> arch/loongarch/lib/boot.c | 14 ++++++++
> arch/loongarch/lib/cache.c | 73 ++++++++++++++++++++++++++++++++++++++++
> arch/loongarch/lib/reset.c | 14 ++++++++
> arch/loongarch/lib/setjmp.S | 52 ++++++++++++++++++++++++++++
> 6 files changed, 226 insertions(+)
>
> diff --git a/arch/loongarch/lib/Makefile b/arch/loongarch/lib/Makefile
> index 3dbed94cc624..3c17b9cd85af 100644
> --- a/arch/loongarch/lib/Makefile
> +++ b/arch/loongarch/lib/Makefile
> @@ -3,3 +3,10 @@
> # Copyright (C) 2024 Jiaxun yang <jiaxun.yang@flygoat.com>
> #
>
> +obj-$(CONFIG_CMD_GO) += boot.o
> +obj-y += cache.o
> +obj-y += interrupts.o
> +ifeq ($(CONFIG_$(SPL_)SYSRESET),)
> +obj-y += reset.o
> +endif
> +obj-y += setjmp.o
> diff --git a/arch/loongarch/lib/asm-offsets.c b/arch/loongarch/lib/asm-offsets.c
> new file mode 100644
> index 000000000000..e3f4c629b63d
> --- /dev/null
> +++ b/arch/loongarch/lib/asm-offsets.c
> @@ -0,0 +1,66 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2024 Jiaxun Yang <jiaxun.yang@flygoat.com>
> + *
> + * From arch/x86/lib/asm-offsets.c
> + *
> + * This program is used to generate definitions needed by
> + * assembly language modules.
> + */
> +
> +#include <asm/global_data.h>
> +#include <asm/ptrace.h>
> +#include <linux/kbuild.h>
> +
> +static void __used output_ptreg_defines(void)
> +{
> + COMMENT("LoongArch pt_regs offsets.");
> + OFFSET(PT_R0, pt_regs, regs[0]);
> + OFFSET(PT_R1, pt_regs, regs[1]);
> + OFFSET(PT_R2, pt_regs, regs[2]);
> + OFFSET(PT_R3, pt_regs, regs[3]);
> + OFFSET(PT_R4, pt_regs, regs[4]);
> + OFFSET(PT_R5, pt_regs, regs[5]);
> + OFFSET(PT_R6, pt_regs, regs[6]);
> + OFFSET(PT_R7, pt_regs, regs[7]);
> + OFFSET(PT_R8, pt_regs, regs[8]);
> + OFFSET(PT_R9, pt_regs, regs[9]);
> + OFFSET(PT_R10, pt_regs, regs[10]);
> + OFFSET(PT_R11, pt_regs, regs[11]);
> + OFFSET(PT_R12, pt_regs, regs[12]);
> + OFFSET(PT_R13, pt_regs, regs[13]);
> + OFFSET(PT_R14, pt_regs, regs[14]);
> + OFFSET(PT_R15, pt_regs, regs[15]);
> + OFFSET(PT_R16, pt_regs, regs[16]);
> + OFFSET(PT_R17, pt_regs, regs[17]);
> + OFFSET(PT_R18, pt_regs, regs[18]);
> + OFFSET(PT_R19, pt_regs, regs[19]);
> + OFFSET(PT_R20, pt_regs, regs[20]);
> + OFFSET(PT_R21, pt_regs, regs[21]);
> + OFFSET(PT_R22, pt_regs, regs[22]);
> + OFFSET(PT_R23, pt_regs, regs[23]);
> + OFFSET(PT_R24, pt_regs, regs[24]);
> + OFFSET(PT_R25, pt_regs, regs[25]);
> + OFFSET(PT_R26, pt_regs, regs[26]);
> + OFFSET(PT_R27, pt_regs, regs[27]);
> + OFFSET(PT_R28, pt_regs, regs[28]);
> + OFFSET(PT_R29, pt_regs, regs[29]);
> + OFFSET(PT_R30, pt_regs, regs[30]);
> + OFFSET(PT_R31, pt_regs, regs[31]);
> + OFFSET(PT_CRMD, pt_regs, csr_crmd);
> + OFFSET(PT_PRMD, pt_regs, csr_prmd);
> + OFFSET(PT_EUEN, pt_regs, csr_euen);
> + OFFSET(PT_ECFG, pt_regs, csr_ecfg);
> + OFFSET(PT_ESTAT, pt_regs, csr_estat);
> + OFFSET(PT_ERA, pt_regs, csr_era);
> + OFFSET(PT_BVADDR, pt_regs, csr_badvaddr);
> + OFFSET(PT_ORIG_A0, pt_regs, orig_a0);
> + DEFINE(PT_SIZE, sizeof(struct pt_regs));
> + BLANK();
> +}
> +
> +int main(void)
> +{
> + output_ptreg_defines();
> + return 0;
> +}
> diff --git a/arch/loongarch/lib/boot.c b/arch/loongarch/lib/boot.c
> new file mode 100644
> index 000000000000..327be16bb59f
> --- /dev/null
> +++ b/arch/loongarch/lib/boot.c
> @@ -0,0 +1,14 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2024 Jiaxun Yang <jiaxun.yang@flygoat.com>
> + */
> +
> +#include <asm/u-boot.h>
> +
> +unsigned long do_go_exec(ulong (*entry)(int, char * const []),
> + int argc, char *const argv[])
> +{
> + cleanup_before_linux();
> +
> + return entry(argc, argv);
> +}
> diff --git a/arch/loongarch/lib/cache.c b/arch/loongarch/lib/cache.c
> new file mode 100644
> index 000000000000..54566edef8a3
> --- /dev/null
> +++ b/arch/loongarch/lib/cache.c
> @@ -0,0 +1,73 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2024 Jiaxun Yang <jiaxun.yang@flygoat.com>
> + */
> +
> +#include <cpu_func.h>
> +#include <asm/cache.h>
> +#include <asm/loongarch.h>
> +
> +void invalidate_icache_all(void)
> +{
> + asm volatile ("\tibar 0\n"::);
According to
https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#_dbar
this is not invalidating the instruction cache.
After loading an image into memory and before executing it we must
invalidate the instruction cache to ensure that the newly loaded code is
executed.
I guess you want to use CACOP here.
> +}
> +
> +__weak void flush_dcache_all(void)
In cmd/cache.c we have another __weak implementation. How is the linke:w
meant to know which one to use?
I guess we need to fix cmd/cache.c. But that is beyond the scope of this
series.
> +{
> + asm volatile ("\tdbar 0\n"::);
CACOP?
Best regards
Heinrich
> +}
> +
> +__weak void flush_dcache_range(unsigned long start, unsigned long end)
> +{
> + /* Placeholder */
> + flush_dcache_all();
> +}
> +
> +__weak void invalidate_icache_range(unsigned long start, unsigned long end)
> +{
> + /* LoongArch mandatory hardware I-Cache coherence */
> + invalidate_icache_all();
> +}
> +
> +__weak void invalidate_dcache_range(unsigned long start, unsigned long end)
> +{
> + /* Placeholder */
> + flush_dcache_all();
> +}
> +
> +__weak void cache_flush(void)
> +{
> + /* Placeholder */
> + flush_dcache_all();
> +}
> +
> +__weak void cache_invalidate(void)
> +{
> + /* Placeholder */
> + flush_dcache_all();
> +}
> +
> +__weak void flush_cache(unsigned long addr, unsigned long size)
> +{
> + cache_flush();
> +}
> +
> +__weak void dcache_enable(void)
> +{
> +}
> +
> +__weak void dcache_disable(void)
> +{
> +}
> +
> +__weak int dcache_status(void)
> +{
> + return 0;
> +}
> +
> +__weak void enable_caches(void)
> +{
> + cache_invalidate();
> + /* Enable cache for direct address translation mode */
> + csr_xchg64(1 << CSR_CRMD_DACM_SHIFT, CSR_CRMD_DACM, LOONGARCH_CSR_CRMD);
> +}
> diff --git a/arch/loongarch/lib/reset.c b/arch/loongarch/lib/reset.c
> new file mode 100644
> index 000000000000..ddf29ee41d95
> --- /dev/null
> +++ b/arch/loongarch/lib/reset.c
> @@ -0,0 +1,14 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2024 Jiaxun Yang <jiaxun.yang@flygoat.com>
> + */
> +
> +#include <command.h>
> +#include <cpu_func.h>
> +
> +int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
> +{
> + reset_cpu();
> +
> + return 0;
> +}
> diff --git a/arch/loongarch/lib/setjmp.S b/arch/loongarch/lib/setjmp.S
> new file mode 100644
> index 000000000000..12981d0013fa
> --- /dev/null
> +++ b/arch/loongarch/lib/setjmp.S
> @@ -0,0 +1,52 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2024 Jiaxun Yang <jiaxun.yang@flygoat.com>
> + */
> +
> +#include <config.h>
> +#include <asm/asm.h>
> +#include <linux/linkage.h>
> +
> +.pushsection .text.setjmp, "ax"
> +ENTRY(setjmp)
> + LONG_S s0, a0, 0
> + LONG_S s1, a0, (1 * LONGSIZE)
> + LONG_S s2, a0, (2 * LONGSIZE)
> + LONG_S s3, a0, (3 * LONGSIZE)
> + LONG_S s4, a0, (4 * LONGSIZE)
> + LONG_S s5, a0, (5 * LONGSIZE)
> + LONG_S s6, a0, (6 * LONGSIZE)
> + LONG_S s7, a0, (7 * LONGSIZE)
> + LONG_S s8, a0, (8 * LONGSIZE)
> + LONG_S fp, a0, (9 * LONGSIZE)
> + LONG_S sp, a0, (10 * LONGSIZE)
> + LONG_S ra, a0, (11 * LONGSIZE)
> +
> + move a0, zero
> + ret
> +ENDPROC(setjmp)
> +.popsection
> +
> +.pushsection .text.longjmp, "ax"
> +ENTRY(longjmp)
> + LONG_L s0, a0, 0
> + LONG_L s1, a0, (1 * LONGSIZE)
> + LONG_L s2, a0, (2 * LONGSIZE)
> + LONG_L s3, a0, (3 * LONGSIZE)
> + LONG_L s4, a0, (4 * LONGSIZE)
> + LONG_L s5, a0, (5 * LONGSIZE)
> + LONG_L s6, a0, (6 * LONGSIZE)
> + LONG_L s7, a0, (7 * LONGSIZE)
> + LONG_L s8, a0, (8 * LONGSIZE)
> + LONG_L fp, a0, (9 * LONGSIZE)
> + LONG_L sp, a0, (10 * LONGSIZE)
> + LONG_L ra, a0, (11 * LONGSIZE)
> +
> + /* Move the return value in place, but return 1 if passed 0. */
> + li.w a0, 1
> + beqz a1, 1f
> + move a0, a1
> +1:
> + jr ra
> +ENDPROC(longjmp)
> +.popsection
>
next prev parent reply other threads:[~2024-06-16 11:01 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-22 15:34 [PATCH 00/16] LoongArch initial support Jiaxun Yang
2024-05-22 15:34 ` [PATCH 01/16] lib: fdtdec: Handle multiple memory nodes Jiaxun Yang
2024-06-11 12:26 ` Heinrich Schuchardt
2024-06-11 13:47 ` Jiaxun Yang
2024-06-11 18:51 ` Simon Glass
2024-06-12 5:55 ` Heinrich Schuchardt
2024-05-22 15:34 ` [PATCH 02/16] linux/io.h: Use map_physmem to implement ioremap Jiaxun Yang
2024-05-22 15:34 ` [PATCH 03/16] image: Take entry point as an output of setup_booti Jiaxun Yang
2024-06-11 13:02 ` Heinrich Schuchardt
2024-06-11 13:29 ` Jiaxun Yang
2024-06-11 13:52 ` Tom Rini
2024-06-11 14:01 ` Jiaxun Yang
2024-06-11 14:09 ` Tom Rini
2024-05-22 15:34 ` [PATCH 04/16] elf.h Define LoongArch bits Jiaxun Yang
2024-06-16 10:34 ` Heinrich Schuchardt
2024-05-22 15:34 ` [PATCH 05/16] image: Define IH_ARCH_LOONGARCH Jiaxun Yang
2024-06-16 10:37 ` Heinrich Schuchardt
2024-05-22 15:34 ` [PATCH 06/16] LoongArch: skeleton and headers Jiaxun Yang
2024-05-23 15:15 ` Heinrich Schuchardt
2024-05-22 15:34 ` [PATCH 07/16] LoongArch: lib: General routines Jiaxun Yang
2024-06-16 11:01 ` Heinrich Schuchardt [this message]
2024-06-16 13:06 ` Jiaxun Yang
2024-06-16 16:00 ` Heinrich Schuchardt
2024-06-18 14:19 ` Jiaxun Yang
2024-05-22 15:34 ` [PATCH 08/16] LoongArch: CPU assembly routines Jiaxun Yang
2024-05-22 15:34 ` [PATCH 09/16] LoongArch: Exception handling Jiaxun Yang
2024-05-22 15:34 ` [PATCH 10/16] LoongArch: Boot Image bits Jiaxun Yang
2024-05-22 15:34 ` [PATCH 11/16] LoongArch: Generic CPU type Jiaxun Yang
2024-05-22 15:34 ` [PATCH 12/16] cpu: Add loongarch_cpu driver Jiaxun Yang
2024-05-22 15:34 ` [PATCH 13/16] timer: Add loongarch_timer driver Jiaxun Yang
2024-05-22 15:34 ` [PATCH 14/16] board: emulation: Add qemu-loongarch Jiaxun Yang
2024-05-22 15:34 ` [PATCH 15/16] efi: LoongArch: Define LoongArch bits everywhere Jiaxun Yang
2024-05-23 16:14 ` Heinrich Schuchardt
2024-05-23 16:25 ` Jiaxun Yang
2024-05-22 15:34 ` [PATCH 16/16] efi: LoongArch: Implement everything Jiaxun Yang
2024-05-23 16:26 ` Heinrich Schuchardt
2024-05-23 16:46 ` Jiaxun Yang
2024-05-23 15:25 ` [PATCH 00/16] LoongArch initial support Tom Rini
2024-05-23 15:38 ` Jiaxun Yang
2024-05-23 15:43 ` Tom Rini
2024-06-04 10:50 ` Jiaxun Yang
2024-06-04 17:09 ` Tom Rini
2024-05-23 15:47 ` Peter Robinson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=630db8ca-d954-4fe7-b113-0057d5ba9563@gmx.de \
--to=xypron.glpk@gmx.de \
--cc=ilias.apalodimas@linaro.org \
--cc=jiaxun.yang@flygoat.com \
--cc=sjg@chromium.org \
--cc=trini@konsulko.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.