From: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
To: Russell King <rmk+kernel-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
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Subject: Re: [PATCH] ARM: v7 setup function should invalidate L1 cache
Date: Tue, 19 May 2015 23:44:58 +0200 [thread overview]
Message-ID: <6452458.LAJUB33YSi@phil> (raw)
In-Reply-To: <E1Yuk8W-0001tC-IK-eh5Bv4kxaXIANfyc6IWni62ZND6+EDdj@public.gmane.org>
Hi Russell,
Am Dienstag, 19. Mai 2015, 17:12:56 schrieb Russell King:
> All ARMv5 and older CPUs invalidate their caches in the early assembly
> setup function, prior to enabling the MMU. This is because the L1
> cache should not contain any data relevant to the execution of the
> kernel at this point; all data should have been flushed out to memory.
>
> This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
> these typically do not search their caches when caching is disabled (as
> it needs to be when the MMU is disabled) so this change should be safe.
>
> ARMv7 allows there to be CPUs which search their caches while caching is
> disabled, and it's permitted that the cache is uninitialised at boot;
> for these, the architecture reference manual requires that an
> implementation specific code sequence is used immediately after reset
> to ensure that the cache is placed into a sane state. Such
> functionality is definitely outside the remit of the Linux kernel, and
> must be done by the SoC's firmware before _any_ CPU gets to the Linux
> kernel.
>
> Changing the data cache clean+invalidate to a mere invalidate allows us
> to get rid of a lot of platform specific hacks around this issue for
> their secondary CPU bringup paths - some of which were buggy.
>
> Signed-off-by: Russell King <rmk+kernel-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
Michael Niewoehner tested this on a rk3188 (Cortex-A9) and wrote in [0]
> Tested-by: Michael Niewoehner <mniewoeh-0BV18Q16miHGpFsiFCTsGXqWYbMAw+HU@public.gmane.org>
>
> Tested on Radxa Rock Pro with RK3188.
> The kernel panics on reboot I had before and also a kernel BUG when running
> "memtester 1900M" went away and the rock seems to run stable now.
I've also tested the patch on a rk3288-based board, so both supported Rockchip
ARM-cores (A9 and A12/A17) seem to run fine with this change.
Tested-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
Rockchip-specific changes
Reviewed-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
Thanks Heiko
[0] http://lists.infradead.org/pipermail/linux-rockchip/2015-May/003046.html
WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] ARM: v7 setup function should invalidate L1 cache
Date: Tue, 19 May 2015 21:44:58 +0000 [thread overview]
Message-ID: <6452458.LAJUB33YSi@phil> (raw)
In-Reply-To: <E1Yuk8W-0001tC-IK@rmk-PC.arm.linux.org.uk>
Hi Russell,
Am Dienstag, 19. Mai 2015, 17:12:56 schrieb Russell King:
> All ARMv5 and older CPUs invalidate their caches in the early assembly
> setup function, prior to enabling the MMU. This is because the L1
> cache should not contain any data relevant to the execution of the
> kernel at this point; all data should have been flushed out to memory.
>
> This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
> these typically do not search their caches when caching is disabled (as
> it needs to be when the MMU is disabled) so this change should be safe.
>
> ARMv7 allows there to be CPUs which search their caches while caching is
> disabled, and it's permitted that the cache is uninitialised at boot;
> for these, the architecture reference manual requires that an
> implementation specific code sequence is used immediately after reset
> to ensure that the cache is placed into a sane state. Such
> functionality is definitely outside the remit of the Linux kernel, and
> must be done by the SoC's firmware before _any_ CPU gets to the Linux
> kernel.
>
> Changing the data cache clean+invalidate to a mere invalidate allows us
> to get rid of a lot of platform specific hacks around this issue for
> their secondary CPU bringup paths - some of which were buggy.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Michael Niewoehner tested this on a rk3188 (Cortex-A9) and wrote in [0]
> Tested-by: Michael Niewoehner <mniewoeh@stud.hs-offenburg.de>
>
> Tested on Radxa Rock Pro with RK3188.
> The kernel panics on reboot I had before and also a kernel BUG when running
> "memtester 1900M" went away and the rock seems to run stable now.
I've also tested the patch on a rk3288-based board, so both supported Rockchip
ARM-cores (A9 and A12/A17) seem to run fine with this change.
Tested-by: Heiko Stuebner <heiko@sntech.de>
Rockchip-specific changes
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Thanks Heiko
[0] http://lists.infradead.org/pipermail/linux-rockchip/2015-May/003046.html
WARNING: multiple messages have this Message-ID (diff)
From: heiko@sntech.de (Heiko Stuebner)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: v7 setup function should invalidate L1 cache
Date: Tue, 19 May 2015 23:44:58 +0200 [thread overview]
Message-ID: <6452458.LAJUB33YSi@phil> (raw)
In-Reply-To: <E1Yuk8W-0001tC-IK@rmk-PC.arm.linux.org.uk>
Hi Russell,
Am Dienstag, 19. Mai 2015, 17:12:56 schrieb Russell King:
> All ARMv5 and older CPUs invalidate their caches in the early assembly
> setup function, prior to enabling the MMU. This is because the L1
> cache should not contain any data relevant to the execution of the
> kernel at this point; all data should have been flushed out to memory.
>
> This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
> these typically do not search their caches when caching is disabled (as
> it needs to be when the MMU is disabled) so this change should be safe.
>
> ARMv7 allows there to be CPUs which search their caches while caching is
> disabled, and it's permitted that the cache is uninitialised at boot;
> for these, the architecture reference manual requires that an
> implementation specific code sequence is used immediately after reset
> to ensure that the cache is placed into a sane state. Such
> functionality is definitely outside the remit of the Linux kernel, and
> must be done by the SoC's firmware before _any_ CPU gets to the Linux
> kernel.
>
> Changing the data cache clean+invalidate to a mere invalidate allows us
> to get rid of a lot of platform specific hacks around this issue for
> their secondary CPU bringup paths - some of which were buggy.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Michael Niewoehner tested this on a rk3188 (Cortex-A9) and wrote in [0]
> Tested-by: Michael Niewoehner <mniewoeh@stud.hs-offenburg.de>
>
> Tested on Radxa Rock Pro with RK3188.
> The kernel panics on reboot I had before and also a kernel BUG when running
> "memtester 1900M" went away and the rock seems to run stable now.
I've also tested the patch on a rk3288-based board, so both supported Rockchip
ARM-cores (A9 and A12/A17) seem to run fine with this change.
Tested-by: Heiko Stuebner <heiko@sntech.de>
Rockchip-specific changes
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Thanks Heiko
[0] http://lists.infradead.org/pipermail/linux-rockchip/2015-May/003046.html
next prev parent reply other threads:[~2015-05-19 21:44 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-19 16:12 [PATCH] ARM: v7 setup function should invalidate L1 cache Russell King
2015-05-19 16:12 ` Russell King
[not found] ` <E1Yuk8W-0001tC-IK-eh5Bv4kxaXIANfyc6IWni62ZND6+EDdj@public.gmane.org>
2015-05-19 21:44 ` Heiko Stuebner [this message]
2015-05-19 21:44 ` Heiko Stuebner
2015-05-19 21:44 ` Heiko Stuebner
2015-05-19 21:55 ` Arnd Bergmann
2015-05-19 21:55 ` Arnd Bergmann
2015-05-19 21:55 ` Arnd Bergmann
2015-05-19 22:07 ` Russell King - ARM Linux
2015-05-19 22:07 ` Russell King - ARM Linux
2015-05-19 22:07 ` Russell King - ARM Linux
[not found] ` <20150519220721.GK2067-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2015-05-19 22:18 ` Arnd Bergmann
2015-05-19 22:18 ` Arnd Bergmann
2015-05-19 22:18 ` Arnd Bergmann
2015-05-19 22:32 ` Russell King - ARM Linux
2015-05-19 22:32 ` Russell King - ARM Linux
2015-05-19 22:32 ` Russell King - ARM Linux
2015-05-20 18:54 ` Dinh Nguyen
2015-05-20 18:54 ` Dinh Nguyen
2015-05-20 18:54 ` Dinh Nguyen
2015-05-21 2:08 ` Shawn Guo
2015-05-21 2:08 ` Shawn Guo
2015-05-21 2:08 ` Shawn Guo
2015-05-22 7:36 ` Geert Uytterhoeven
2015-05-22 7:36 ` Geert Uytterhoeven
2015-05-22 7:36 ` Geert Uytterhoeven
2015-06-01 10:41 ` Geert Uytterhoeven
2015-06-01 10:41 ` Geert Uytterhoeven
2015-06-01 10:41 ` Geert Uytterhoeven
2015-06-01 10:53 ` Russell King - ARM Linux
2015-06-01 10:53 ` Russell King - ARM Linux
2015-06-01 10:53 ` Russell King - ARM Linux
2015-06-01 11:50 ` Geert Uytterhoeven
2015-06-01 11:50 ` Geert Uytterhoeven
2015-06-01 11:50 ` Geert Uytterhoeven
[not found] ` <CAMuHMdUXCy+87-pwLiJ7ynaM1AeFq0f7R3sJ4prdE3QN09z++w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-06-17 20:35 ` Dinh Nguyen
2015-06-17 20:35 ` Dinh Nguyen
2015-06-17 20:35 ` Dinh Nguyen
2015-06-17 21:30 ` Russell King - ARM Linux
2015-06-17 21:30 ` Russell King - ARM Linux
2015-06-17 21:30 ` Russell King - ARM Linux
[not found] ` <20150617213006.GC7557-l+eeeJia6m9vn6HldHNs0ANdhmdF6hFW@public.gmane.org>
2015-06-17 22:12 ` Dinh Nguyen
2015-06-17 22:12 ` Dinh Nguyen
2015-06-17 22:12 ` Dinh Nguyen
[not found] ` <5581F0DD.60408-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-06-17 22:31 ` Dinh Nguyen
2015-06-17 22:31 ` Dinh Nguyen
2015-06-17 22:31 ` Dinh Nguyen
[not found] ` <5581F542.708-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-06-17 22:51 ` Russell King - ARM Linux
2015-06-17 22:51 ` Russell King - ARM Linux
2015-06-17 22:51 ` Russell King - ARM Linux
2015-05-22 10:45 ` Michal Simek
2015-05-22 10:45 ` Michal Simek
2015-05-22 10:45 ` Michal Simek
2015-06-01 10:21 ` Wei Xu
2015-06-01 10:21 ` Wei Xu
2015-06-01 10:21 ` Wei Xu
2015-05-19 22:01 ` Florian Fainelli
2015-05-19 22:01 ` Florian Fainelli
2015-05-19 22:01 ` Florian Fainelli
2015-05-20 22:48 ` Sebastian Hesselbarth
2015-05-20 22:48 ` Sebastian Hesselbarth
2015-05-20 22:48 ` Sebastian Hesselbarth
2015-05-21 8:30 ` Thierry Reding
2015-05-21 8:30 ` Thierry Reding
2015-05-21 8:30 ` Thierry Reding
2015-07-08 1:17 ` [PATCH] ARM: BCM63xx: Remove custom secondary_startup function Florian Fainelli
2015-07-12 1:34 ` Florian Fainelli
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