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From: Christian Marangi <ansuelsmth@gmail.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Lee Jones <lee@kernel.org>,
	Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Lorenzo Bianconi <lorenzo@kernel.org>,
	Daniel Danzberger <dd@embedd.com>, Arnd Bergmann <arnd@arndb.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Nikita Shubin <nikita.shubin@maquefel.me>,
	Guo Ren <guoren@kernel.org>, Yangyu Chen <cyy@cyyself.name>,
	Ben Hutchings <ben@decadent.org.uk>, Felix Fietkau <nbd@nbd.name>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-phy@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-usb@vger.kernel.org,
	upstream@airoha.com
Subject: Re: [PATCH 04/13] dt-bindings: soc: airoha: add Documentation for Airoha AN7581 SCU SSR
Date: Mon, 10 Mar 2025 11:33:41 +0100	[thread overview]
Message-ID: <67cec007.170a0220.37245a.99cd@mx.google.com> (raw)
In-Reply-To: <20250310-aromatic-chihuahua-of-priority-4ee73b@krzk-bin>

On Mon, Mar 10, 2025 at 09:00:40AM +0100, Krzysztof Kozlowski wrote:
> On Sun, Mar 09, 2025 at 02:29:35PM +0100, Christian Marangi wrote:
> > The Airoha AN7581 SoC have in the SCU register space particular
> > address that control how some peripheral are configured.
> > 
> > These are toggeled in the System Status Register and are used to
> > toggle Serdes port for USB 3.0 mode or HSGMII, USB 3.0 mode or PCIe2
> > or setup port for PCIe mode or Ethrnet mode (HSGMII/USXGMII).
> > 
> > Modes are mutually exclusive and selecting one mode cause the
> > other feature to not work (example a mode in USB 3.0 cause PCIe
> > port 2 to not work) This depends also on what is physically
> > connected to the Hardware and needs to correctly reflect the
> > System Status Register bits.
> > 
> > Special care is needed for PCIe port 0 in 2 line mode that
> > requires both WiFi1 and WiFi2 Serdes port set to PCIe0 2 Line
> > mode.
> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > ---
> >  .../soc/airoha/airoha,an7581-scu-ssr.yaml     | 106 ++++++++++++++++++
> >  MAINTAINERS                                   |   1 +
> >  2 files changed, 107 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/soc/airoha/airoha,an7581-scu-ssr.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/soc/airoha/airoha,an7581-scu-ssr.yaml b/Documentation/devicetree/bindings/soc/airoha/airoha,an7581-scu-ssr.yaml
> > new file mode 100644
> > index 000000000000..4bbf6e3b79a4
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/airoha/airoha,an7581-scu-ssr.yaml
> > @@ -0,0 +1,106 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/soc/airoha/airoha,an7581-scu-ssr.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Airoha AN7581 SCU System Status Register
> > +
> > +maintainers:
> > +  - Christian Marangi <ansuelsmth@gmail.com>
> > +
> > +description: >
> > +  The Airoha AN7581 SoC have in the SCU register space particular
> > +  address that control how some peripheral are configured.
> > +
> > +  These are toggeled in the System Status Register and are used to
> > +  toggle Serdes port for USB 3.0 mode or HSGMII, USB 3.0 mode or PCIe2
> > +  or setup port for PCIe mode or Ethrnet mode (HSGMII/USXGMII).
> 
> typo, Ethernet
> 
> > +
> > +  Modes are mutually exclusive and selecting one mode cause the
> > +  other feature to not work (example a mode in USB 3.0 cause PCIe
> > +  port 2 to not work) This depends also on what is physically
> > +  connected to the Hardware and needs to correctly reflect the
> > +  System Status Register bits.
> > +
> > +  Special care is needed for PCIe port 0 in 2 line mode that
> > +  requires both WiFi1 and WiFi2 Serdes port set to PCIe0 2 Line
> > +  mode.
> > +
> > +properties:
> > +  compatible:
> > +    const: airoha,an7581-scu-ssr
> 
> That's not a separate device, but part of the SCU.
>

More comments on this in the MFD patch.

> But more important - such definition of choice of serial engines is
> really not flexible, not reabable and not helping integrating into DTS.
> Are you going to grow this for next chip airoha,serdes-wifi20, then
> airoha,serdes-wifi21, 22... ? And then how the if:then: would look like?
> 
> Assuming you do not have here child-parent relationship, like usually
> for serial engines, so then this should be somehow list of devices
> (strings) you want to run.
> 

You are right, string is more flexible and I don't need the include
file.

-- 
	Ansuel


WARNING: multiple messages have this Message-ID (diff)
From: Christian Marangi <ansuelsmth@gmail.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Lee Jones <lee@kernel.org>,
	Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Lorenzo Bianconi <lorenzo@kernel.org>,
	Daniel Danzberger <dd@embedd.com>, Arnd Bergmann <arnd@arndb.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Nikita Shubin <nikita.shubin@maquefel.me>,
	Guo Ren <guoren@kernel.org>, Yangyu Chen <cyy@cyyself.name>,
	Ben Hutchings <ben@decadent.org.uk>, Felix Fietkau <nbd@nbd.name>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-phy@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-usb@vger.kernel.org,
	upstream@airoha.com
Subject: Re: [PATCH 04/13] dt-bindings: soc: airoha: add Documentation for Airoha AN7581 SCU SSR
Date: Mon, 10 Mar 2025 11:33:41 +0100	[thread overview]
Message-ID: <67cec007.170a0220.37245a.99cd@mx.google.com> (raw)
In-Reply-To: <20250310-aromatic-chihuahua-of-priority-4ee73b@krzk-bin>

On Mon, Mar 10, 2025 at 09:00:40AM +0100, Krzysztof Kozlowski wrote:
> On Sun, Mar 09, 2025 at 02:29:35PM +0100, Christian Marangi wrote:
> > The Airoha AN7581 SoC have in the SCU register space particular
> > address that control how some peripheral are configured.
> > 
> > These are toggeled in the System Status Register and are used to
> > toggle Serdes port for USB 3.0 mode or HSGMII, USB 3.0 mode or PCIe2
> > or setup port for PCIe mode or Ethrnet mode (HSGMII/USXGMII).
> > 
> > Modes are mutually exclusive and selecting one mode cause the
> > other feature to not work (example a mode in USB 3.0 cause PCIe
> > port 2 to not work) This depends also on what is physically
> > connected to the Hardware and needs to correctly reflect the
> > System Status Register bits.
> > 
> > Special care is needed for PCIe port 0 in 2 line mode that
> > requires both WiFi1 and WiFi2 Serdes port set to PCIe0 2 Line
> > mode.
> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > ---
> >  .../soc/airoha/airoha,an7581-scu-ssr.yaml     | 106 ++++++++++++++++++
> >  MAINTAINERS                                   |   1 +
> >  2 files changed, 107 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/soc/airoha/airoha,an7581-scu-ssr.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/soc/airoha/airoha,an7581-scu-ssr.yaml b/Documentation/devicetree/bindings/soc/airoha/airoha,an7581-scu-ssr.yaml
> > new file mode 100644
> > index 000000000000..4bbf6e3b79a4
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/airoha/airoha,an7581-scu-ssr.yaml
> > @@ -0,0 +1,106 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/soc/airoha/airoha,an7581-scu-ssr.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Airoha AN7581 SCU System Status Register
> > +
> > +maintainers:
> > +  - Christian Marangi <ansuelsmth@gmail.com>
> > +
> > +description: >
> > +  The Airoha AN7581 SoC have in the SCU register space particular
> > +  address that control how some peripheral are configured.
> > +
> > +  These are toggeled in the System Status Register and are used to
> > +  toggle Serdes port for USB 3.0 mode or HSGMII, USB 3.0 mode or PCIe2
> > +  or setup port for PCIe mode or Ethrnet mode (HSGMII/USXGMII).
> 
> typo, Ethernet
> 
> > +
> > +  Modes are mutually exclusive and selecting one mode cause the
> > +  other feature to not work (example a mode in USB 3.0 cause PCIe
> > +  port 2 to not work) This depends also on what is physically
> > +  connected to the Hardware and needs to correctly reflect the
> > +  System Status Register bits.
> > +
> > +  Special care is needed for PCIe port 0 in 2 line mode that
> > +  requires both WiFi1 and WiFi2 Serdes port set to PCIe0 2 Line
> > +  mode.
> > +
> > +properties:
> > +  compatible:
> > +    const: airoha,an7581-scu-ssr
> 
> That's not a separate device, but part of the SCU.
>

More comments on this in the MFD patch.

> But more important - such definition of choice of serial engines is
> really not flexible, not reabable and not helping integrating into DTS.
> Are you going to grow this for next chip airoha,serdes-wifi20, then
> airoha,serdes-wifi21, 22... ? And then how the if:then: would look like?
> 
> Assuming you do not have here child-parent relationship, like usually
> for serial engines, so then this should be somehow list of devices
> (strings) you want to run.
> 

You are right, string is more flexible and I don't need the include
file.

-- 
	Ansuel

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  reply	other threads:[~2025-03-10 10:39 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-09 13:29 [PATCH 00/13] airoha: en7581: clk cleanup + USB support Christian Marangi
2025-03-09 13:29 ` Christian Marangi
2025-03-09 13:29 ` [PATCH 01/13] clk: en7523: convert driver to regmap API Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-09 13:29 ` [PATCH 02/13] clk: en7523: generalize register clocks function Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-09 13:29 ` [PATCH 03/13] dt-bindings: soc: airoha: add SCU SSR Serdes port binding Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-10  7:54   ` Krzysztof Kozlowski
2025-03-10  7:54     ` Krzysztof Kozlowski
2025-03-10 10:30     ` Christian Marangi
2025-03-10 10:30       ` Christian Marangi
2025-03-09 13:29 ` [PATCH 04/13] dt-bindings: soc: airoha: add Documentation for Airoha AN7581 SCU SSR Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-10  8:00   ` Krzysztof Kozlowski
2025-03-10  8:00     ` Krzysztof Kozlowski
2025-03-10 10:33     ` Christian Marangi [this message]
2025-03-10 10:33       ` Christian Marangi
2025-03-09 13:29 ` [PATCH 05/13] dt-bindings: mfd: add Documentation for Airoha EN7581 SCU Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-09 14:49   ` Rob Herring (Arm)
2025-03-09 14:49     ` Rob Herring (Arm)
2025-03-10  8:01   ` Krzysztof Kozlowski
2025-03-10  8:01     ` Krzysztof Kozlowski
2025-03-10  9:21   ` Krzysztof Kozlowski
2025-03-10  9:21     ` Krzysztof Kozlowski
2025-03-10 10:47     ` Christian Marangi
2025-03-10 10:47       ` Christian Marangi
2025-03-10 11:41       ` Krzysztof Kozlowski
2025-03-10 11:41         ` Krzysztof Kozlowski
2025-03-11 19:09         ` Christian Marangi
2025-03-11 19:09           ` Christian Marangi
2025-03-16 17:11           ` Krzysztof Kozlowski
2025-03-16 17:11             ` Krzysztof Kozlowski
2025-03-09 13:29 ` [PATCH 06/13] dt-bindings: clock: airoha: make reg optional for Airoha EN7581 Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-10  8:06   ` Krzysztof Kozlowski
2025-03-10  8:06     ` Krzysztof Kozlowski
2025-03-09 13:29 ` [PATCH 07/13] clk: en7523: support getting regmap from parent node for EN7581 Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-09 13:29 ` [PATCH 08/13] soc: airoha: add support for configuring SCU SSR Serdes port Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-09 13:29 ` [PATCH 09/13] dt-bindings: phy: Add documentation for Airoha AN7581 USB PHY Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-09 15:50   ` kernel test robot
2025-03-09 15:50     ` kernel test robot
2025-03-10 16:34   ` Krzysztof Kozlowski
2025-03-10 16:34     ` Krzysztof Kozlowski
2025-03-11 18:51     ` Christian Marangi
2025-03-11 18:51       ` Christian Marangi
2025-03-16 17:01       ` Krzysztof Kozlowski
2025-03-16 17:01         ` Krzysztof Kozlowski
2025-03-18 11:31         ` Christian Marangi
2025-03-18 11:31           ` Christian Marangi
2025-03-19  7:39           ` Krzysztof Kozlowski
2025-03-19  7:39             ` Krzysztof Kozlowski
2025-03-09 13:29 ` [PATCH 10/13] phy: airoha: Add support " Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-11 11:40   ` Vinod Koul
2025-03-11 11:40     ` Vinod Koul
2025-03-11 11:42     ` Vinod Koul
2025-03-11 11:42       ` Vinod Koul
2025-03-11 18:09       ` Christian Marangi
2025-03-11 18:09         ` Christian Marangi
2025-03-09 13:29 ` [PATCH 11/13] usb: host: add ARCH_AIROHA in XHCI MTK dependency Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-09 13:29 ` [PATCH 12/13] arm64: dts: airoha: en7581: convert SCU clock node to MFD implementation Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-10  8:06   ` Krzysztof Kozlowski
2025-03-10  8:06     ` Krzysztof Kozlowski
2025-03-09 13:29 ` [PATCH 13/13] arm64: dts: airoha: en7581: add USB and SCU SSR nodes Christian Marangi
2025-03-09 13:29   ` Christian Marangi
2025-03-10 14:36 ` [PATCH 00/13] airoha: en7581: clk cleanup + USB support Rob Herring (Arm)
2025-03-10 14:36   ` Rob Herring (Arm)

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