* [PATCH 1/2] linux/sizes.h: add SZ_8G for 1GB RAM size
@ 2025-07-16 7:37 Christian Marangi
2025-07-16 7:37 ` [PATCH 2/2] airoha: rework RAM size handling to support multiple " Christian Marangi
2025-07-16 11:47 ` [PATCH 1/2] linux/sizes.h: add SZ_8G for 1GB " Bryan Brattlof
0 siblings, 2 replies; 4+ messages in thread
From: Christian Marangi @ 2025-07-16 7:37 UTC (permalink / raw)
To: Tom Rini, Ryder Lee, Weijie Gao, Chunfeng Yun,
GSS_MTK_Uboot_upstream, Christian Marangi, u-boot
Add additional macro to handle a 1GB RAM size in 8Gb.
Drop the redundant entry from the Mediatek arch.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
arch/arm/mach-mediatek/mt7988/init.c | 2 --
include/linux/sizes.h | 1 +
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-mediatek/mt7988/init.c b/arch/arm/mach-mediatek/mt7988/init.c
index 2efc8c6a88f..2b6f38983af 100644
--- a/arch/arm/mach-mediatek/mt7988/init.c
+++ b/arch/arm/mach-mediatek/mt7988/init.c
@@ -12,8 +12,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#define SZ_8G _AC(0x200000000, ULL)
-
int dram_init(void)
{
int ret;
diff --git a/include/linux/sizes.h b/include/linux/sizes.h
index fbde0bc7e88..35a23d714b7 100644
--- a/include/linux/sizes.h
+++ b/include/linux/sizes.h
@@ -47,5 +47,6 @@
#define SZ_2G 0x80000000
#define SZ_4G _AC(0x100000000, ULL)
+#define SZ_8G _AC(0x200000000, ULL)
#endif /* __LINUX_SIZES_H__ */
--
2.48.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] airoha: rework RAM size handling to support multiple RAM size
2025-07-16 7:37 [PATCH 1/2] linux/sizes.h: add SZ_8G for 1GB RAM size Christian Marangi
@ 2025-07-16 7:37 ` Christian Marangi
2025-07-22 19:00 ` Christian Marangi
2025-07-16 11:47 ` [PATCH 1/2] linux/sizes.h: add SZ_8G for 1GB " Bryan Brattlof
1 sibling, 1 reply; 4+ messages in thread
From: Christian Marangi @ 2025-07-16 7:37 UTC (permalink / raw)
To: Tom Rini, Ryder Lee, Weijie Gao, Chunfeng Yun,
GSS_MTK_Uboot_upstream, Christian Marangi, u-boot
There are multiple version of the same reference board with different
RAM size and it's not enough to base the RAM size entirely from DT. To
better support it use the get_ram_size way to scan for the actual RAM
size of Airoha SoC and increase the size of the memory map.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
arch/arm/mach-airoha/an7581/init.c | 22 ++++++++++++++++++----
arch/arm/mach-airoha/an7583/init.c | 22 ++++++++++++++++++----
2 files changed, 36 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-airoha/an7581/init.c b/arch/arm/mach-airoha/an7581/init.c
index cefe9c6db9e..caf1006b22b 100644
--- a/arch/arm/mach-airoha/an7581/init.c
+++ b/arch/arm/mach-airoha/an7581/init.c
@@ -3,8 +3,11 @@
#include <fdtdec.h>
#include <init.h>
#include <asm/armv8/mmu.h>
+#include <asm/global_data.h>
#include <asm/system.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int print_cpuinfo(void)
{
printf("CPU: Airoha AN7581\n");
@@ -13,12 +16,23 @@ int print_cpuinfo(void)
int dram_init(void)
{
- return fdtdec_setup_mem_size_base();
+ int ret;
+
+ ret = fdtdec_setup_mem_size_base();
+ if (ret)
+ return ret;
+
+ gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_8G);
+
+ return 0;
}
int dram_init_banksize(void)
{
- return fdtdec_setup_memory_banksize();
+ gd->bd->bi_dram[0].start = gd->ram_base;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+
+ return 0;
}
void reset_cpu(ulong addr)
@@ -31,12 +45,12 @@ static struct mm_region an7581_mem_map[] = {
/* DDR */
.virt = 0x80000000UL,
.phys = 0x80000000UL,
- .size = 0x80000000UL,
+ .size = 0x200000000ULL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
}, {
.virt = 0x00000000UL,
.phys = 0x00000000UL,
- .size = 0x20000000UL,
+ .size = 0x40000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
diff --git a/arch/arm/mach-airoha/an7583/init.c b/arch/arm/mach-airoha/an7583/init.c
index 77c29290331..c00837b4234 100644
--- a/arch/arm/mach-airoha/an7583/init.c
+++ b/arch/arm/mach-airoha/an7583/init.c
@@ -4,6 +4,9 @@
#include <init.h>
#include <asm/armv8/mmu.h>
#include <asm/system.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
int print_cpuinfo(void)
{
@@ -13,12 +16,23 @@ int print_cpuinfo(void)
int dram_init(void)
{
- return fdtdec_setup_mem_size_base();
+ int ret;
+
+ ret = fdtdec_setup_mem_size_base();
+ if (ret)
+ return ret;
+
+ gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_8G);
+
+ return 0;
}
int dram_init_banksize(void)
{
- return fdtdec_setup_memory_banksize();
+ gd->bd->bi_dram[0].start = gd->ram_base;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+
+ return 0;
}
void reset_cpu(ulong addr)
@@ -31,12 +45,12 @@ static struct mm_region an7583_mem_map[] = {
/* DDR */
.virt = 0x80000000UL,
.phys = 0x80000000UL,
- .size = 0x80000000UL,
+ .size = 0x200000000ULL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
}, {
.virt = 0x00000000UL,
.phys = 0x00000000UL,
- .size = 0x20000000UL,
+ .size = 0x40000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
--
2.48.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] linux/sizes.h: add SZ_8G for 1GB RAM size
2025-07-16 7:37 [PATCH 1/2] linux/sizes.h: add SZ_8G for 1GB RAM size Christian Marangi
2025-07-16 7:37 ` [PATCH 2/2] airoha: rework RAM size handling to support multiple " Christian Marangi
@ 2025-07-16 11:47 ` Bryan Brattlof
1 sibling, 0 replies; 4+ messages in thread
From: Bryan Brattlof @ 2025-07-16 11:47 UTC (permalink / raw)
To: Christian Marangi
Cc: Tom Rini, Ryder Lee, Weijie Gao, Chunfeng Yun,
GSS_MTK_Uboot_upstream, u-boot
On July 16, 2025 thus sayeth Christian Marangi:
> Add additional macro to handle a 1GB RAM size in 8Gb.
>
> Drop the redundant entry from the Mediatek arch.
>
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> ---
> arch/arm/mach-mediatek/mt7988/init.c | 2 --
> include/linux/sizes.h | 1 +
> 2 files changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-mediatek/mt7988/init.c b/arch/arm/mach-mediatek/mt7988/init.c
> index 2efc8c6a88f..2b6f38983af 100644
> --- a/arch/arm/mach-mediatek/mt7988/init.c
> +++ b/arch/arm/mach-mediatek/mt7988/init.c
> @@ -12,8 +12,6 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> -#define SZ_8G _AC(0x200000000, ULL)
> -
> int dram_init(void)
> {
> int ret;
> diff --git a/include/linux/sizes.h b/include/linux/sizes.h
> index fbde0bc7e88..35a23d714b7 100644
> --- a/include/linux/sizes.h
> +++ b/include/linux/sizes.h
> @@ -47,5 +47,6 @@
> #define SZ_2G 0x80000000
>
> #define SZ_4G _AC(0x100000000, ULL)
> +#define SZ_8G _AC(0x200000000, ULL)
Should we just copy over linux/sizes.h from the kernel? It seems like
we're missing more than just SZ_8G from them
~Bryan
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] airoha: rework RAM size handling to support multiple RAM size
2025-07-16 7:37 ` [PATCH 2/2] airoha: rework RAM size handling to support multiple " Christian Marangi
@ 2025-07-22 19:00 ` Christian Marangi
0 siblings, 0 replies; 4+ messages in thread
From: Christian Marangi @ 2025-07-22 19:00 UTC (permalink / raw)
To: Tom Rini, Ryder Lee, Weijie Gao, Chunfeng Yun,
GSS_MTK_Uboot_upstream, u-boot
On Wed, Jul 16, 2025 at 09:37:08AM +0200, Christian Marangi wrote:
> There are multiple version of the same reference board with different
> RAM size and it's not enough to base the RAM size entirely from DT. To
> better support it use the get_ram_size way to scan for the actual RAM
> size of Airoha SoC and increase the size of the memory map.
>
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Sorry ignore this as it was sent by mistake, I resent a new version of
the same patch that actually apply and build.
> ---
> arch/arm/mach-airoha/an7581/init.c | 22 ++++++++++++++++++----
> arch/arm/mach-airoha/an7583/init.c | 22 ++++++++++++++++++----
> 2 files changed, 36 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/mach-airoha/an7581/init.c b/arch/arm/mach-airoha/an7581/init.c
> index cefe9c6db9e..caf1006b22b 100644
> --- a/arch/arm/mach-airoha/an7581/init.c
> +++ b/arch/arm/mach-airoha/an7581/init.c
> @@ -3,8 +3,11 @@
> #include <fdtdec.h>
> #include <init.h>
> #include <asm/armv8/mmu.h>
> +#include <asm/global_data.h>
> #include <asm/system.h>
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
> int print_cpuinfo(void)
> {
> printf("CPU: Airoha AN7581\n");
> @@ -13,12 +16,23 @@ int print_cpuinfo(void)
>
> int dram_init(void)
> {
> - return fdtdec_setup_mem_size_base();
> + int ret;
> +
> + ret = fdtdec_setup_mem_size_base();
> + if (ret)
> + return ret;
> +
> + gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_8G);
> +
> + return 0;
> }
>
> int dram_init_banksize(void)
> {
> - return fdtdec_setup_memory_banksize();
> + gd->bd->bi_dram[0].start = gd->ram_base;
> + gd->bd->bi_dram[0].size = gd->ram_size;
> +
> + return 0;
> }
>
> void reset_cpu(ulong addr)
> @@ -31,12 +45,12 @@ static struct mm_region an7581_mem_map[] = {
> /* DDR */
> .virt = 0x80000000UL,
> .phys = 0x80000000UL,
> - .size = 0x80000000UL,
> + .size = 0x200000000ULL,
> .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
> }, {
> .virt = 0x00000000UL,
> .phys = 0x00000000UL,
> - .size = 0x20000000UL,
> + .size = 0x40000000UL,
> .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> PTE_BLOCK_NON_SHARE |
> PTE_BLOCK_PXN | PTE_BLOCK_UXN
> diff --git a/arch/arm/mach-airoha/an7583/init.c b/arch/arm/mach-airoha/an7583/init.c
> index 77c29290331..c00837b4234 100644
> --- a/arch/arm/mach-airoha/an7583/init.c
> +++ b/arch/arm/mach-airoha/an7583/init.c
> @@ -4,6 +4,9 @@
> #include <init.h>
> #include <asm/armv8/mmu.h>
> #include <asm/system.h>
> +#include <asm/global_data.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
>
> int print_cpuinfo(void)
> {
> @@ -13,12 +16,23 @@ int print_cpuinfo(void)
>
> int dram_init(void)
> {
> - return fdtdec_setup_mem_size_base();
> + int ret;
> +
> + ret = fdtdec_setup_mem_size_base();
> + if (ret)
> + return ret;
> +
> + gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_8G);
> +
> + return 0;
> }
>
> int dram_init_banksize(void)
> {
> - return fdtdec_setup_memory_banksize();
> + gd->bd->bi_dram[0].start = gd->ram_base;
> + gd->bd->bi_dram[0].size = gd->ram_size;
> +
> + return 0;
> }
>
> void reset_cpu(ulong addr)
> @@ -31,12 +45,12 @@ static struct mm_region an7583_mem_map[] = {
> /* DDR */
> .virt = 0x80000000UL,
> .phys = 0x80000000UL,
> - .size = 0x80000000UL,
> + .size = 0x200000000ULL,
> .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
> }, {
> .virt = 0x00000000UL,
> .phys = 0x00000000UL,
> - .size = 0x20000000UL,
> + .size = 0x40000000UL,
> .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> PTE_BLOCK_NON_SHARE |
> PTE_BLOCK_PXN | PTE_BLOCK_UXN
> --
> 2.48.1
>
--
Ansuel
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2025-07-22 19:00 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2025-07-16 7:37 [PATCH 1/2] linux/sizes.h: add SZ_8G for 1GB RAM size Christian Marangi
2025-07-16 7:37 ` [PATCH 2/2] airoha: rework RAM size handling to support multiple " Christian Marangi
2025-07-22 19:00 ` Christian Marangi
2025-07-16 11:47 ` [PATCH 1/2] linux/sizes.h: add SZ_8G for 1GB " Bryan Brattlof
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