Re: [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use only freq bits for falling back to requested freq

[Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>]

On 04/03/2023 01:27, Ashutosh Dixit wrote:
> On newer generations, the GEN12_RPSTAT1 register contains more than freq
> information, e.g. see GEN12_VOLTAGE_MASK. Therefore use only the freq bits
> to decide whether to fall back to requested freq.

Could you find an appropriate Fixes: tag please? If it can affects a 
platform out of force probe then cc: stable to.

CI is not catching the problem?

> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_pmu.c | 6 ++----
>   1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 52531ab28c5f..f0a1e36915b8 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -393,10 +393,8 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
>   		 * case we assume the system is running at the intended
>   		 * frequency. Fortunately, the read should rarely fail!
>   		 */
> -		val = intel_rps_read_rpstat_fw(rps);
> -		if (val)
> -			val = intel_rps_get_cagf(rps, val);
> -		else
> +		val = intel_rps_get_cagf(rps, intel_rps_read_rpstat_fw(rps));

Will this work with gen5_invert_freq as called by intel_rps_get_cagf?

Regards,

Tvrtko

> +		if (!val)
>   			val = rps->cur_freq;
>   
>   		add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT],