Re: [DISCUSSION] Hexagon code inside kernel

[cotulla@yandex.ua]

> šI might be confused, but I believe that this is actually very common;
> šthe difference is that the so-called 'hardware MMU''s are actually
> šjust nanocode burned into a ROM that's on the cpu chip die. šIts
> šinvisible to the user. FWIW some deprecated instructions are also
> šemulated this way: they fault to a handler. You can hide a lot of
> šstuff this way. The powerpc does this, they learned it from the
> šmainframe 370/390 architecture, which abuses this (did you really
> šthink the 'startio' instruction, which behaves like a DMA device
> šdriver, was actually a single cycle hardware instruction?)
>
> šThe hexagon doesn't have a (self-loading) ROM, so the mini-VM has to
> šbe loaded at boot.
>

I mean that Hexagon has a simular thing like MIPS. 
Unlike ARM hardware does not fetch page table entries from RAM, it's using standalone TLB entries.
In ARM they are also present but usually ever low level code doesn't work with them, low level code works with page tables in the RAM.


-Cotulla