* [PATCH] ARM64: dts: meson-gx: Add missing L2 cache node
@ 2016-10-05 13:53 ` Neil Armstrong
0 siblings, 0 replies; 8+ messages in thread
From: Neil Armstrong @ 2016-10-05 13:53 UTC (permalink / raw)
To: khilman, carlo
Cc: Neil Armstrong, linux-kernel, linux-arm-kernel, linux-amlogic,
devicetree
In order to remove the boot warning :
[ 2.290933] Unable to detect cache hierarchy from DT for CPU 0
And add missing L2 cache hierarchy information, add a simple l2 cache node
and reference it from the A53 cpu nodes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 0737056..a6cd953 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -64,6 +64,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
+ next-level-cache = <&l2>;
};
cpu1: cpu@1 {
@@ -71,6 +72,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
+ next-level-cache = <&l2>;
};
cpu2: cpu@2 {
@@ -78,6 +80,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
+ next-level-cache = <&l2>;
};
cpu3: cpu@3 {
@@ -85,6 +88,11 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
+ next-level-cache = <&l2>;
+ };
+
+ l2: l2-cache0 {
+ compatible = "cache";
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH] ARM64: dts: meson-gx: Add missing L2 cache node
@ 2016-10-05 13:53 ` Neil Armstrong
0 siblings, 0 replies; 8+ messages in thread
From: Neil Armstrong @ 2016-10-05 13:53 UTC (permalink / raw)
To: khilman-rdvid1DuHRBWk0Htik3J/w, carlo-KA+7E9HrN00dnm+yROfE0A
Cc: Neil Armstrong, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
In order to remove the boot warning :
[ 2.290933] Unable to detect cache hierarchy from DT for CPU 0
And add missing L2 cache hierarchy information, add a simple l2 cache node
and reference it from the A53 cpu nodes.
Signed-off-by: Neil Armstrong <narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
---
arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 0737056..a6cd953 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -64,6 +64,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
+ next-level-cache = <&l2>;
};
cpu1: cpu@1 {
@@ -71,6 +72,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
+ next-level-cache = <&l2>;
};
cpu2: cpu@2 {
@@ -78,6 +80,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
+ next-level-cache = <&l2>;
};
cpu3: cpu@3 {
@@ -85,6 +88,11 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
+ next-level-cache = <&l2>;
+ };
+
+ l2: l2-cache0 {
+ compatible = "cache";
};
};
--
1.9.1
--
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH] ARM64: dts: meson-gx: Add missing L2 cache node
@ 2016-10-05 13:53 ` Neil Armstrong
0 siblings, 0 replies; 8+ messages in thread
From: Neil Armstrong @ 2016-10-05 13:53 UTC (permalink / raw)
To: linux-arm-kernel
In order to remove the boot warning :
[ 2.290933] Unable to detect cache hierarchy from DT for CPU 0
And add missing L2 cache hierarchy information, add a simple l2 cache node
and reference it from the A53 cpu nodes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 0737056..a6cd953 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -64,6 +64,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
+ next-level-cache = <&l2>;
};
cpu1: cpu at 1 {
@@ -71,6 +72,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
+ next-level-cache = <&l2>;
};
cpu2: cpu at 2 {
@@ -78,6 +80,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
+ next-level-cache = <&l2>;
};
cpu3: cpu at 3 {
@@ -85,6 +88,11 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
+ next-level-cache = <&l2>;
+ };
+
+ l2: l2-cache0 {
+ compatible = "cache";
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH] ARM64: dts: meson-gx: Add missing L2 cache node
2016-10-05 13:53 ` Neil Armstrong
(?)
(?)
@ 2016-10-07 14:43 ` Kevin Hilman
-1 siblings, 0 replies; 8+ messages in thread
From: Kevin Hilman @ 2016-10-07 14:43 UTC (permalink / raw)
To: linus-amlogic
Neil Armstrong <narmstrong@baylibre.com> writes:
> In order to remove the boot warning :
> [ 2.290933] Unable to detect cache hierarchy from DT for CPU 0
> And add missing L2 cache hierarchy information, add a simple l2 cache node
> and reference it from the A53 cpu nodes.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Applied to v4.10/dt64.
Kevin
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] ARM64: dts: meson-gx: Add missing L2 cache node
@ 2016-10-07 14:43 ` Kevin Hilman
0 siblings, 0 replies; 8+ messages in thread
From: Kevin Hilman @ 2016-10-07 14:43 UTC (permalink / raw)
To: Neil Armstrong
Cc: carlo, linux-kernel, linux-arm-kernel, linux-amlogic, devicetree
Neil Armstrong <narmstrong@baylibre.com> writes:
> In order to remove the boot warning :
> [ 2.290933] Unable to detect cache hierarchy from DT for CPU 0
> And add missing L2 cache hierarchy information, add a simple l2 cache node
> and reference it from the A53 cpu nodes.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Applied to v4.10/dt64.
Kevin
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] ARM64: dts: meson-gx: Add missing L2 cache node
@ 2016-10-07 14:43 ` Kevin Hilman
0 siblings, 0 replies; 8+ messages in thread
From: Kevin Hilman @ 2016-10-07 14:43 UTC (permalink / raw)
To: Neil Armstrong
Cc: carlo, linux-amlogic, linux-kernel, linux-arm-kernel, devicetree
Neil Armstrong <narmstrong@baylibre.com> writes:
> In order to remove the boot warning :
> [ 2.290933] Unable to detect cache hierarchy from DT for CPU 0
> And add missing L2 cache hierarchy information, add a simple l2 cache node
> and reference it from the A53 cpu nodes.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Applied to v4.10/dt64.
Kevin
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH] ARM64: dts: meson-gx: Add missing L2 cache node
@ 2016-10-07 14:43 ` Kevin Hilman
0 siblings, 0 replies; 8+ messages in thread
From: Kevin Hilman @ 2016-10-07 14:43 UTC (permalink / raw)
To: linux-arm-kernel
Neil Armstrong <narmstrong@baylibre.com> writes:
> In order to remove the boot warning :
> [ 2.290933] Unable to detect cache hierarchy from DT for CPU 0
> And add missing L2 cache hierarchy information, add a simple l2 cache node
> and reference it from the A53 cpu nodes.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Applied to v4.10/dt64.
Kevin
^ permalink raw reply [flat|nested] 8+ messages in thread