All of lore.kernel.org
 help / color / mirror / Atom feed
From: khilman@baylibre.com (Kevin Hilman)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v3 2/2] ARM64: dts: meson-axg: enable ethernet for A113D S400 board
Date: Fri, 15 Dec 2017 11:31:36 -0800	[thread overview]
Message-ID: <7hind7949z.fsf@baylibre.com> (raw)
In-Reply-To: <20171215021014.231308-3-yixun.lan@amlogic.com> (Yixun Lan's message of "Fri, 15 Dec 2017 10:10:14 +0800")

Yixun Lan <yixun.lan@amlogic.com> writes:

> This is tested in the S400 dev board which use a RTL8211F PHY,
> and the pins connect to the 'eth_rgmii_y_pins' group.
>
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
> index 70eca1f8736a..b8c4f1913d28 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
> @@ -20,3 +20,10 @@
>  &uart_AO {
>  	status = "okay";
>  };
> +
> +&ethmac {
> +	status = "okay";
> +	phy-mode = "rgmii";
> +	pinctrl-0 = <&eth_rgmii_y_pins>;
> +	pinctrl-names = "default";
> +};

Minor nit: we try to keep these sorted alphabetically.  Can you move
this above the uart_A0 one?

Note: if PATCH 1/1 had applied cleanly, I would have fixed this up
myself and not required a respin.

Kevin

WARNING: multiple messages have this Message-ID (diff)
From: khilman@baylibre.com (Kevin Hilman)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 2/2] ARM64: dts: meson-axg: enable ethernet for A113D S400 board
Date: Fri, 15 Dec 2017 11:31:36 -0800	[thread overview]
Message-ID: <7hind7949z.fsf@baylibre.com> (raw)
In-Reply-To: <20171215021014.231308-3-yixun.lan@amlogic.com> (Yixun Lan's message of "Fri, 15 Dec 2017 10:10:14 +0800")

Yixun Lan <yixun.lan@amlogic.com> writes:

> This is tested in the S400 dev board which use a RTL8211F PHY,
> and the pins connect to the 'eth_rgmii_y_pins' group.
>
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
> index 70eca1f8736a..b8c4f1913d28 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
> @@ -20,3 +20,10 @@
>  &uart_AO {
>  	status = "okay";
>  };
> +
> +&ethmac {
> +	status = "okay";
> +	phy-mode = "rgmii";
> +	pinctrl-0 = <&eth_rgmii_y_pins>;
> +	pinctrl-names = "default";
> +};

Minor nit: we try to keep these sorted alphabetically.  Can you move
this above the uart_A0 one?

Note: if PATCH 1/1 had applied cleanly, I would have fixed this up
myself and not required a respin.

Kevin

WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman@baylibre.com>
To: Yixun Lan <yixun.lan@amlogic.com>
Cc: devicetree@vger.kernel.org,
	Neil Armstrong <narmstrong@baylibre.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Giuseppe Cavallaro <peppe.cavallaro@st.com>,
	Alexandre Torgue <alexandre.torgue@st.com>,
	Carlo Caione <carlo@caione.org>,
	linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [PATCH v3 2/2] ARM64: dts: meson-axg: enable ethernet for A113D S400 board
Date: Fri, 15 Dec 2017 11:31:36 -0800	[thread overview]
Message-ID: <7hind7949z.fsf@baylibre.com> (raw)
In-Reply-To: <20171215021014.231308-3-yixun.lan@amlogic.com> (Yixun Lan's message of "Fri, 15 Dec 2017 10:10:14 +0800")

Yixun Lan <yixun.lan@amlogic.com> writes:

> This is tested in the S400 dev board which use a RTL8211F PHY,
> and the pins connect to the 'eth_rgmii_y_pins' group.
>
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
> index 70eca1f8736a..b8c4f1913d28 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
> @@ -20,3 +20,10 @@
>  &uart_AO {
>  	status = "okay";
>  };
> +
> +&ethmac {
> +	status = "okay";
> +	phy-mode = "rgmii";
> +	pinctrl-0 = <&eth_rgmii_y_pins>;
> +	pinctrl-names = "default";
> +};

Minor nit: we try to keep these sorted alphabetically.  Can you move
this above the uart_A0 one?

Note: if PATCH 1/1 had applied cleanly, I would have fixed this up
myself and not required a respin.

Kevin

WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman@baylibre.com>
To: Yixun Lan <yixun.lan@amlogic.com>
Cc: <devicetree@vger.kernel.org>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Giuseppe Cavallaro <peppe.cavallaro@st.com>,
	Alexandre Torgue <alexandre.torgue@st.com>,
	Carlo Caione <carlo@caione.org>,
	<linux-amlogic@lists.infradead.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <netdev@vger.kernel.org>
Subject: Re: [PATCH v3 2/2] ARM64: dts: meson-axg: enable ethernet for A113D S400 board
Date: Fri, 15 Dec 2017 11:31:36 -0800	[thread overview]
Message-ID: <7hind7949z.fsf@baylibre.com> (raw)
In-Reply-To: <20171215021014.231308-3-yixun.lan@amlogic.com> (Yixun Lan's message of "Fri, 15 Dec 2017 10:10:14 +0800")

Yixun Lan <yixun.lan@amlogic.com> writes:

> This is tested in the S400 dev board which use a RTL8211F PHY,
> and the pins connect to the 'eth_rgmii_y_pins' group.
>
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
> index 70eca1f8736a..b8c4f1913d28 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
> @@ -20,3 +20,10 @@
>  &uart_AO {
>  	status = "okay";
>  };
> +
> +&ethmac {
> +	status = "okay";
> +	phy-mode = "rgmii";
> +	pinctrl-0 = <&eth_rgmii_y_pins>;
> +	pinctrl-names = "default";
> +};

Minor nit: we try to keep these sorted alphabetically.  Can you move
this above the uart_A0 one?

Note: if PATCH 1/1 had applied cleanly, I would have fixed this up
myself and not required a respin.

Kevin

  reply	other threads:[~2017-12-15 19:31 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-15  2:10 [PATCH v3 0/2] Add ethernet support for Meson-AXG SoC Yixun Lan
2017-12-15  2:10 ` Yixun Lan
2017-12-15  2:10 ` Yixun Lan
2017-12-15  2:10 ` Yixun Lan
2017-12-15  2:10 ` Yixun Lan
2017-12-15  2:10 ` [PATCH v3 1/2] ARM64: dts: meson-axg: add ethernet mac controller Yixun Lan
2017-12-15  2:10   ` Yixun Lan
2017-12-15  2:10   ` Yixun Lan
2017-12-15  2:10   ` Yixun Lan
2017-12-15 19:29   ` Kevin Hilman
2017-12-15 19:29     ` Kevin Hilman
2017-12-15 19:29     ` Kevin Hilman
2017-12-15 19:29     ` Kevin Hilman
2017-12-15 19:29     ` Kevin Hilman
2017-12-16  3:38     ` Yixun Lan
2017-12-16  3:38       ` Yixun Lan
2017-12-16  3:38       ` Yixun Lan
2017-12-16  3:38       ` Yixun Lan
2017-12-15  2:10 ` [PATCH v3 2/2] ARM64: dts: meson-axg: enable ethernet for A113D S400 board Yixun Lan
2017-12-15  2:10   ` Yixun Lan
2017-12-15  2:10   ` Yixun Lan
2017-12-15  2:10   ` Yixun Lan
2017-12-15  2:10   ` Yixun Lan
2017-12-15 19:31   ` Kevin Hilman [this message]
2017-12-15 19:31     ` Kevin Hilman
2017-12-15 19:31     ` Kevin Hilman
2017-12-15 19:31     ` Kevin Hilman

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=7hind7949z.fsf@baylibre.com \
    --to=khilman@baylibre.com \
    --cc=linus-amlogic@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.