From: JeeHeng Sia <jeeheng.sia@starfivetech.com>
To: Leyfoon Tan <leyfoon.tan@starfivetech.com>,
"kernel@esmil.dk" <kernel@esmil.dk>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"krzk@kernel.org" <krzk@kernel.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
"palmer@dabbelt.com" <palmer@dabbelt.com>,
"aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
"daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"conor@kernel.org" <conor@kernel.org>,
"anup@brainfault.org" <anup@brainfault.org>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"jirislaby@kernel.org" <jirislaby@kernel.org>,
"michal.simek@amd.com" <michal.simek@amd.com>,
Michael Zhu <michael.zhu@starfivetech.com>,
"drew@beagleboard.org" <drew@beagleboard.org>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree
Date: Fri, 1 Dec 2023 01:34:10 +0000 [thread overview]
Message-ID: <823f1c9a43aa4ded919b05f5a96f036b@EXMBX066.cuchost.com> (raw)
In-Reply-To: <21e2d194efee4bb6b870735e6fe2d65c@EXMBX061.cuchost.com>
> -----Original Message-----
> From: Leyfoon Tan <leyfoon.tan@starfivetech.com>
> Sent: Friday, December 1, 2023 1:58 AM
> To: JeeHeng Sia <jeeheng.sia@starfivetech.com>; kernel@esmil.dk; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> krzk@kernel.org; conor+dt@kernel.org; paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu;
> daniel.lezcano@linaro.org; tglx@linutronix.de; conor@kernel.org; anup@brainfault.org; gregkh@linuxfoundation.org;
> jirislaby@kernel.org; michal.simek@amd.com; Michael Zhu <michael.zhu@starfivetech.com>; drew@beagleboard.org
> Cc: devicetree@vger.kernel.org; linux-riscv@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: RE: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree
>
>
>
> -----Original Message-----
> From: JeeHeng Sia <jeeheng.sia@starfivetech.com>
> Sent: Wednesday, November 29, 2023 2:01 PM
> To: kernel@esmil.dk; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; krzk@kernel.org; conor+dt@kernel.org;
> paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu; daniel.lezcano@linaro.org; tglx@linutronix.de;
> conor@kernel.org; anup@brainfault.org; gregkh@linuxfoundation.org; jirislaby@kernel.org; michal.simek@amd.com; Michael Zhu
> <michael.zhu@starfivetech.com>; drew@beagleboard.org
> Cc: devicetree@vger.kernel.org; linux-riscv@lists.infradead.org; linux-kernel@vger.kernel.org; JeeHeng Sia
> <jeeheng.sia@starfivetech.com>; Leyfoon Tan <leyfoon.tan@starfivetech.com>
> Subject: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree
>
> Add initial device tree for the StarFive JH8100 RISC-V SoC.
>
> Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
> Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
> ---
> arch/riscv/boot/dts/starfive/Makefile | 1 +
> arch/riscv/boot/dts/starfive/jh8100-evb.dts | 28 ++
> arch/riscv/boot/dts/starfive/jh8100.dtsi | 378 ++++++++++++++++++++
> 3 files changed, 407 insertions(+)
> create mode 100644 arch/riscv/boot/dts/starfive/jh8100-evb.dts
> create mode 100644 arch/riscv/boot/dts/starfive/jh8100.dtsi
>
> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> index 0141504c0f5c..fbb0dc619102 100644
> --- a/arch/riscv/boot/dts/starfive/Makefile
> +++ b/arch/riscv/boot/dts/starfive/Makefile
> @@ -10,3 +10,4 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
>
> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
> +dtb-$(CONFIG_ARCH_STARFIVE) += jh8100-evb.dtb
> Add empty line before this.
Ok, I can add an empty line here to distinguish between the platforms.
>
> [....]
>
> Regards
> Ley Foon
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: JeeHeng Sia <jeeheng.sia@starfivetech.com>
To: Leyfoon Tan <leyfoon.tan@starfivetech.com>,
"kernel@esmil.dk" <kernel@esmil.dk>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"krzk@kernel.org" <krzk@kernel.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
"palmer@dabbelt.com" <palmer@dabbelt.com>,
"aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
"daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"conor@kernel.org" <conor@kernel.org>,
"anup@brainfault.org" <anup@brainfault.org>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"jirislaby@kernel.org" <jirislaby@kernel.org>,
"michal.simek@amd.com" <michal.simek@amd.com>,
Michael Zhu <michael.zhu@starfivetech.com>,
"drew@beagleboard.org" <drew@beagleboard.org>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree
Date: Fri, 1 Dec 2023 01:34:10 +0000 [thread overview]
Message-ID: <823f1c9a43aa4ded919b05f5a96f036b@EXMBX066.cuchost.com> (raw)
In-Reply-To: <21e2d194efee4bb6b870735e6fe2d65c@EXMBX061.cuchost.com>
> -----Original Message-----
> From: Leyfoon Tan <leyfoon.tan@starfivetech.com>
> Sent: Friday, December 1, 2023 1:58 AM
> To: JeeHeng Sia <jeeheng.sia@starfivetech.com>; kernel@esmil.dk; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> krzk@kernel.org; conor+dt@kernel.org; paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu;
> daniel.lezcano@linaro.org; tglx@linutronix.de; conor@kernel.org; anup@brainfault.org; gregkh@linuxfoundation.org;
> jirislaby@kernel.org; michal.simek@amd.com; Michael Zhu <michael.zhu@starfivetech.com>; drew@beagleboard.org
> Cc: devicetree@vger.kernel.org; linux-riscv@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: RE: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree
>
>
>
> -----Original Message-----
> From: JeeHeng Sia <jeeheng.sia@starfivetech.com>
> Sent: Wednesday, November 29, 2023 2:01 PM
> To: kernel@esmil.dk; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; krzk@kernel.org; conor+dt@kernel.org;
> paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu; daniel.lezcano@linaro.org; tglx@linutronix.de;
> conor@kernel.org; anup@brainfault.org; gregkh@linuxfoundation.org; jirislaby@kernel.org; michal.simek@amd.com; Michael Zhu
> <michael.zhu@starfivetech.com>; drew@beagleboard.org
> Cc: devicetree@vger.kernel.org; linux-riscv@lists.infradead.org; linux-kernel@vger.kernel.org; JeeHeng Sia
> <jeeheng.sia@starfivetech.com>; Leyfoon Tan <leyfoon.tan@starfivetech.com>
> Subject: [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree
>
> Add initial device tree for the StarFive JH8100 RISC-V SoC.
>
> Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
> Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
> ---
> arch/riscv/boot/dts/starfive/Makefile | 1 +
> arch/riscv/boot/dts/starfive/jh8100-evb.dts | 28 ++
> arch/riscv/boot/dts/starfive/jh8100.dtsi | 378 ++++++++++++++++++++
> 3 files changed, 407 insertions(+)
> create mode 100644 arch/riscv/boot/dts/starfive/jh8100-evb.dts
> create mode 100644 arch/riscv/boot/dts/starfive/jh8100.dtsi
>
> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> index 0141504c0f5c..fbb0dc619102 100644
> --- a/arch/riscv/boot/dts/starfive/Makefile
> +++ b/arch/riscv/boot/dts/starfive/Makefile
> @@ -10,3 +10,4 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
>
> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
> +dtb-$(CONFIG_ARCH_STARFIVE) += jh8100-evb.dtb
> Add empty line before this.
Ok, I can add an empty line here to distinguish between the platforms.
>
> [....]
>
> Regards
> Ley Foon
next prev parent reply other threads:[~2023-12-01 1:34 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-29 6:00 [PATCH v2 0/6] Initial device tree support for StarFive JH8100 SoC Sia Jee Heng
2023-11-29 6:00 ` Sia Jee Heng
2023-11-29 6:00 ` [PATCH v2 1/6] dt-bindings: riscv: Add StarFive Dubhe compatibles Sia Jee Heng
2023-11-29 6:00 ` Sia Jee Heng
2023-11-29 14:45 ` Conor Dooley
2023-11-29 14:45 ` Conor Dooley
2023-11-30 6:04 ` JeeHeng Sia
2023-11-30 6:04 ` JeeHeng Sia
2023-11-30 15:08 ` Conor Dooley
2023-11-30 15:08 ` Conor Dooley
2023-11-29 6:00 ` [PATCH v2 2/6] dt-bindings: riscv: Add StarFive JH8100 SoC Sia Jee Heng
2023-11-29 6:00 ` Sia Jee Heng
2023-11-29 8:26 ` Krzysztof Kozlowski
2023-11-29 8:26 ` Krzysztof Kozlowski
2023-11-29 10:35 ` JeeHeng Sia
2023-11-29 10:35 ` JeeHeng Sia
2023-11-29 14:46 ` Conor Dooley
2023-11-29 14:46 ` Conor Dooley
2023-11-29 14:47 ` Conor Dooley
2023-11-29 14:47 ` Conor Dooley
2023-11-29 6:00 ` [PATCH v2 3/6] dt-bindings: timer: Add StarFive JH8100 clint Sia Jee Heng
2023-11-29 6:00 ` Sia Jee Heng
2023-11-29 14:50 ` Conor Dooley
2023-11-29 14:50 ` Conor Dooley
2023-11-29 6:00 ` [PATCH v2 4/6] dt-bindings: interrupt-controller: Add StarFive JH8100 plic Sia Jee Heng
2023-11-29 6:00 ` Sia Jee Heng
2023-11-29 14:48 ` Conor Dooley
2023-11-29 14:48 ` Conor Dooley
2023-11-29 6:00 ` [PATCH v2 5/6] dt-bindings: serial: cdns: Add new compatible string for StarFive JH8100 UART Sia Jee Heng
2023-11-29 6:00 ` Sia Jee Heng
2023-11-29 8:26 ` Krzysztof Kozlowski
2023-11-29 8:26 ` Krzysztof Kozlowski
2023-11-29 10:33 ` JeeHeng Sia
2023-11-29 10:33 ` JeeHeng Sia
2023-11-29 10:53 ` Krzysztof Kozlowski
2023-11-29 10:53 ` Krzysztof Kozlowski
2023-11-29 13:15 ` JeeHeng Sia
2023-11-29 13:15 ` JeeHeng Sia
2023-11-29 6:00 ` [PATCH v2 6/6] riscv: dts: starfive: Add initial StarFive JH8100 device tree Sia Jee Heng
2023-11-29 6:00 ` Sia Jee Heng
2023-11-30 17:58 ` Leyfoon Tan
2023-11-30 17:58 ` Leyfoon Tan
2023-12-01 1:34 ` JeeHeng Sia [this message]
2023-12-01 1:34 ` JeeHeng Sia
2023-12-01 7:02 ` [PATCH v2 0/6] Initial device tree support for StarFive JH8100 SoC JeeHeng Sia
2023-12-01 7:02 ` JeeHeng Sia
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=823f1c9a43aa4ded919b05f5a96f036b@EXMBX066.cuchost.com \
--to=jeeheng.sia@starfivetech.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=conor+dt@kernel.org \
--cc=conor@kernel.org \
--cc=daniel.lezcano@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=drew@beagleboard.org \
--cc=gregkh@linuxfoundation.org \
--cc=jirislaby@kernel.org \
--cc=kernel@esmil.dk \
--cc=krzk@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=leyfoon.tan@starfivetech.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=michael.zhu@starfivetech.com \
--cc=michal.simek@amd.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.