From: Marc Zyngier <maz@kernel.org>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH v7 12/12] KVM: arm64: Use TLBI range-based intructions for unmap
Date: Thu, 03 Aug 2023 00:28:12 +0100 [thread overview]
Message-ID: <86fs5158j7.wl-maz@kernel.org> (raw)
In-Reply-To: <CAJHc60zGzAqWw2iZwNEG_bWERXkz_io7ae-K_tf_kh6xcOBxLA@mail.gmail.com>
On Mon, 31 Jul 2023 19:26:09 +0100,
Raghavendra Rao Ananta <rananta@google.com> wrote:
>
> On Thu, Jul 27, 2023 at 6:12?AM Marc Zyngier <maz@kernel.org> wrote:
> >
> > On Sat, 22 Jul 2023 03:22:51 +0100,
> > Raghavendra Rao Ananta <rananta@google.com> wrote:
> > >
> > > The current implementation of the stage-2 unmap walker traverses
> > > the given range and, as a part of break-before-make, performs
> > > TLB invalidations with a DSB for every PTE. A multitude of this
> > > combination could cause a performance bottleneck on some systems.
> > >
> > > Hence, if the system supports FEAT_TLBIRANGE, defer the TLB
> > > invalidations until the entire walk is finished, and then
> > > use range-based instructions to invalidate the TLBs in one go.
> > > Condition deferred TLB invalidation on the system supporting FWB,
> > > as the optimization is entirely pointless when the unmap walker
> > > needs to perform CMOs.
> > >
> > > Rename stage2_put_pte() to stage2_unmap_put_pte() as the function
> > > now serves the stage-2 unmap walker specifically, rather than
> > > acting generic.
> > >
> > > Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
> > > ---
> > > arch/arm64/kvm/hyp/pgtable.c | 67 +++++++++++++++++++++++++++++++-----
> > > 1 file changed, 58 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> > > index 5ef098af1736..cf88933a2ea0 100644
> > > --- a/arch/arm64/kvm/hyp/pgtable.c
> > > +++ b/arch/arm64/kvm/hyp/pgtable.c
> > > @@ -831,16 +831,54 @@ static void stage2_make_pte(const struct kvm_pgtable_visit_ctx *ctx, kvm_pte_t n
> > > smp_store_release(ctx->ptep, new);
> > > }
> > >
> > > -static void stage2_put_pte(const struct kvm_pgtable_visit_ctx *ctx, struct kvm_s2_mmu *mmu,
> > > - struct kvm_pgtable_mm_ops *mm_ops)
> > > +struct stage2_unmap_data {
> > > + struct kvm_pgtable *pgt;
> > > + bool defer_tlb_flush_init;
> > > +};
> > > +
> > > +static bool __stage2_unmap_defer_tlb_flush(struct kvm_pgtable *pgt)
> > > +{
> > > + /*
> > > + * If FEAT_TLBIRANGE is implemented, defer the individual
> > > + * TLB invalidations until the entire walk is finished, and
> > > + * then use the range-based TLBI instructions to do the
> > > + * invalidations. Condition deferred TLB invalidation on the
> > > + * system supporting FWB, as the optimization is entirely
> > > + * pointless when the unmap walker needs to perform CMOs.
> > > + */
> > > + return system_supports_tlb_range() && stage2_has_fwb(pgt);
> > > +}
> > > +
> > > +static bool stage2_unmap_defer_tlb_flush(struct stage2_unmap_data *unmap_data)
> > > +{
> > > + bool defer_tlb_flush = __stage2_unmap_defer_tlb_flush(unmap_data->pgt);
> > > +
> > > + /*
> > > + * Since __stage2_unmap_defer_tlb_flush() is based on alternative
> > > + * patching and the TLBIs' operations behavior depend on this,
> > > + * track if there's any change in the state during the unmap sequence.
> > > + */
> > > + WARN_ON(unmap_data->defer_tlb_flush_init != defer_tlb_flush);
> > > + return defer_tlb_flush;
> >
> > I really don't understand what you're testing here. The ability to
> > defer TLB invalidation is a function of the system capabilities
> > (range+FWB) and a single flag that is only set on the host for pKVM.
> >
> > How could that change in the middle of the life of the system? if
> > further begs the question about the need for the unmap_data data
> > structure.
> >
> > It looks to me that we could simply pass the pgt pointer around and be
> > done with it. Am I missing something obvious?
> >
> From one of the previous comments [1] (used in a different context),
> I'm given to understand that since these feature checks are governed
> by alternative patching, they can potentially change (at runtime?). Is
> that not the case and I have misunderstood the idea in comment [1]
> entirely? Is it solely used for optimization purposes and set only
> once?
Alternative patching, just like the static branches used to implement
the capability stuff, is a one way street. At the point where KVM is
initialised, these configurations are set in stone, and there is no
going back.
> If that's the case, I can get rid of the WARN_ON() and unmap_data.
yes, please.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Oliver Upton <oliver.upton@linux.dev>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Huacai Chen <chenhuacai@kernel.org>,
Zenghui Yu <yuzenghui@huawei.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Jing Zhang <jingzhangos@google.com>,
Reiji Watanabe <reijiw@google.com>,
Colton Lewis <coltonlewis@google.com>,
David Matlack <dmatlack@google.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-mips@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org
Subject: Re: [PATCH v7 12/12] KVM: arm64: Use TLBI range-based intructions for unmap
Date: Thu, 03 Aug 2023 00:28:12 +0100 [thread overview]
Message-ID: <86fs5158j7.wl-maz@kernel.org> (raw)
In-Reply-To: <CAJHc60zGzAqWw2iZwNEG_bWERXkz_io7ae-K_tf_kh6xcOBxLA@mail.gmail.com>
On Mon, 31 Jul 2023 19:26:09 +0100,
Raghavendra Rao Ananta <rananta@google.com> wrote:
>
> On Thu, Jul 27, 2023 at 6:12 AM Marc Zyngier <maz@kernel.org> wrote:
> >
> > On Sat, 22 Jul 2023 03:22:51 +0100,
> > Raghavendra Rao Ananta <rananta@google.com> wrote:
> > >
> > > The current implementation of the stage-2 unmap walker traverses
> > > the given range and, as a part of break-before-make, performs
> > > TLB invalidations with a DSB for every PTE. A multitude of this
> > > combination could cause a performance bottleneck on some systems.
> > >
> > > Hence, if the system supports FEAT_TLBIRANGE, defer the TLB
> > > invalidations until the entire walk is finished, and then
> > > use range-based instructions to invalidate the TLBs in one go.
> > > Condition deferred TLB invalidation on the system supporting FWB,
> > > as the optimization is entirely pointless when the unmap walker
> > > needs to perform CMOs.
> > >
> > > Rename stage2_put_pte() to stage2_unmap_put_pte() as the function
> > > now serves the stage-2 unmap walker specifically, rather than
> > > acting generic.
> > >
> > > Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
> > > ---
> > > arch/arm64/kvm/hyp/pgtable.c | 67 +++++++++++++++++++++++++++++++-----
> > > 1 file changed, 58 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> > > index 5ef098af1736..cf88933a2ea0 100644
> > > --- a/arch/arm64/kvm/hyp/pgtable.c
> > > +++ b/arch/arm64/kvm/hyp/pgtable.c
> > > @@ -831,16 +831,54 @@ static void stage2_make_pte(const struct kvm_pgtable_visit_ctx *ctx, kvm_pte_t n
> > > smp_store_release(ctx->ptep, new);
> > > }
> > >
> > > -static void stage2_put_pte(const struct kvm_pgtable_visit_ctx *ctx, struct kvm_s2_mmu *mmu,
> > > - struct kvm_pgtable_mm_ops *mm_ops)
> > > +struct stage2_unmap_data {
> > > + struct kvm_pgtable *pgt;
> > > + bool defer_tlb_flush_init;
> > > +};
> > > +
> > > +static bool __stage2_unmap_defer_tlb_flush(struct kvm_pgtable *pgt)
> > > +{
> > > + /*
> > > + * If FEAT_TLBIRANGE is implemented, defer the individual
> > > + * TLB invalidations until the entire walk is finished, and
> > > + * then use the range-based TLBI instructions to do the
> > > + * invalidations. Condition deferred TLB invalidation on the
> > > + * system supporting FWB, as the optimization is entirely
> > > + * pointless when the unmap walker needs to perform CMOs.
> > > + */
> > > + return system_supports_tlb_range() && stage2_has_fwb(pgt);
> > > +}
> > > +
> > > +static bool stage2_unmap_defer_tlb_flush(struct stage2_unmap_data *unmap_data)
> > > +{
> > > + bool defer_tlb_flush = __stage2_unmap_defer_tlb_flush(unmap_data->pgt);
> > > +
> > > + /*
> > > + * Since __stage2_unmap_defer_tlb_flush() is based on alternative
> > > + * patching and the TLBIs' operations behavior depend on this,
> > > + * track if there's any change in the state during the unmap sequence.
> > > + */
> > > + WARN_ON(unmap_data->defer_tlb_flush_init != defer_tlb_flush);
> > > + return defer_tlb_flush;
> >
> > I really don't understand what you're testing here. The ability to
> > defer TLB invalidation is a function of the system capabilities
> > (range+FWB) and a single flag that is only set on the host for pKVM.
> >
> > How could that change in the middle of the life of the system? if
> > further begs the question about the need for the unmap_data data
> > structure.
> >
> > It looks to me that we could simply pass the pgt pointer around and be
> > done with it. Am I missing something obvious?
> >
> From one of the previous comments [1] (used in a different context),
> I'm given to understand that since these feature checks are governed
> by alternative patching, they can potentially change (at runtime?). Is
> that not the case and I have misunderstood the idea in comment [1]
> entirely? Is it solely used for optimization purposes and set only
> once?
Alternative patching, just like the static branches used to implement
the capability stuff, is a one way street. At the point where KVM is
initialised, these configurations are set in stone, and there is no
going back.
> If that's the case, I can get rid of the WARN_ON() and unmap_data.
yes, please.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Oliver Upton <oliver.upton@linux.dev>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Huacai Chen <chenhuacai@kernel.org>,
Zenghui Yu <yuzenghui@huawei.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Jing Zhang <jingzhangos@google.com>,
Reiji Watanabe <reijiw@google.com>,
Colton Lewis <coltonlewis@google.com>,
David Matlack <dmatlack@google.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-mips@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org
Subject: Re: [PATCH v7 12/12] KVM: arm64: Use TLBI range-based intructions for unmap
Date: Thu, 03 Aug 2023 00:28:12 +0100 [thread overview]
Message-ID: <86fs5158j7.wl-maz@kernel.org> (raw)
In-Reply-To: <CAJHc60zGzAqWw2iZwNEG_bWERXkz_io7ae-K_tf_kh6xcOBxLA@mail.gmail.com>
On Mon, 31 Jul 2023 19:26:09 +0100,
Raghavendra Rao Ananta <rananta@google.com> wrote:
>
> On Thu, Jul 27, 2023 at 6:12 AM Marc Zyngier <maz@kernel.org> wrote:
> >
> > On Sat, 22 Jul 2023 03:22:51 +0100,
> > Raghavendra Rao Ananta <rananta@google.com> wrote:
> > >
> > > The current implementation of the stage-2 unmap walker traverses
> > > the given range and, as a part of break-before-make, performs
> > > TLB invalidations with a DSB for every PTE. A multitude of this
> > > combination could cause a performance bottleneck on some systems.
> > >
> > > Hence, if the system supports FEAT_TLBIRANGE, defer the TLB
> > > invalidations until the entire walk is finished, and then
> > > use range-based instructions to invalidate the TLBs in one go.
> > > Condition deferred TLB invalidation on the system supporting FWB,
> > > as the optimization is entirely pointless when the unmap walker
> > > needs to perform CMOs.
> > >
> > > Rename stage2_put_pte() to stage2_unmap_put_pte() as the function
> > > now serves the stage-2 unmap walker specifically, rather than
> > > acting generic.
> > >
> > > Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
> > > ---
> > > arch/arm64/kvm/hyp/pgtable.c | 67 +++++++++++++++++++++++++++++++-----
> > > 1 file changed, 58 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> > > index 5ef098af1736..cf88933a2ea0 100644
> > > --- a/arch/arm64/kvm/hyp/pgtable.c
> > > +++ b/arch/arm64/kvm/hyp/pgtable.c
> > > @@ -831,16 +831,54 @@ static void stage2_make_pte(const struct kvm_pgtable_visit_ctx *ctx, kvm_pte_t n
> > > smp_store_release(ctx->ptep, new);
> > > }
> > >
> > > -static void stage2_put_pte(const struct kvm_pgtable_visit_ctx *ctx, struct kvm_s2_mmu *mmu,
> > > - struct kvm_pgtable_mm_ops *mm_ops)
> > > +struct stage2_unmap_data {
> > > + struct kvm_pgtable *pgt;
> > > + bool defer_tlb_flush_init;
> > > +};
> > > +
> > > +static bool __stage2_unmap_defer_tlb_flush(struct kvm_pgtable *pgt)
> > > +{
> > > + /*
> > > + * If FEAT_TLBIRANGE is implemented, defer the individual
> > > + * TLB invalidations until the entire walk is finished, and
> > > + * then use the range-based TLBI instructions to do the
> > > + * invalidations. Condition deferred TLB invalidation on the
> > > + * system supporting FWB, as the optimization is entirely
> > > + * pointless when the unmap walker needs to perform CMOs.
> > > + */
> > > + return system_supports_tlb_range() && stage2_has_fwb(pgt);
> > > +}
> > > +
> > > +static bool stage2_unmap_defer_tlb_flush(struct stage2_unmap_data *unmap_data)
> > > +{
> > > + bool defer_tlb_flush = __stage2_unmap_defer_tlb_flush(unmap_data->pgt);
> > > +
> > > + /*
> > > + * Since __stage2_unmap_defer_tlb_flush() is based on alternative
> > > + * patching and the TLBIs' operations behavior depend on this,
> > > + * track if there's any change in the state during the unmap sequence.
> > > + */
> > > + WARN_ON(unmap_data->defer_tlb_flush_init != defer_tlb_flush);
> > > + return defer_tlb_flush;
> >
> > I really don't understand what you're testing here. The ability to
> > defer TLB invalidation is a function of the system capabilities
> > (range+FWB) and a single flag that is only set on the host for pKVM.
> >
> > How could that change in the middle of the life of the system? if
> > further begs the question about the need for the unmap_data data
> > structure.
> >
> > It looks to me that we could simply pass the pgt pointer around and be
> > done with it. Am I missing something obvious?
> >
> From one of the previous comments [1] (used in a different context),
> I'm given to understand that since these feature checks are governed
> by alternative patching, they can potentially change (at runtime?). Is
> that not the case and I have misunderstood the idea in comment [1]
> entirely? Is it solely used for optimization purposes and set only
> once?
Alternative patching, just like the static branches used to implement
the capability stuff, is a one way street. At the point where KVM is
initialised, these configurations are set in stone, and there is no
going back.
> If that's the case, I can get rid of the WARN_ON() and unmap_data.
yes, please.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Oliver Upton <oliver.upton@linux.dev>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Huacai Chen <chenhuacai@kernel.org>,
Zenghui Yu <yuzenghui@huawei.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Jing Zhang <jingzhangos@google.com>,
Reiji Watanabe <reijiw@google.com>,
Colton Lewis <coltonlewis@google.com>,
David Matlack <dmatlack@google.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-mips@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org
Subject: Re: [PATCH v7 12/12] KVM: arm64: Use TLBI range-based intructions for unmap
Date: Thu, 03 Aug 2023 00:28:12 +0100 [thread overview]
Message-ID: <86fs5158j7.wl-maz@kernel.org> (raw)
In-Reply-To: <CAJHc60zGzAqWw2iZwNEG_bWERXkz_io7ae-K_tf_kh6xcOBxLA@mail.gmail.com>
On Mon, 31 Jul 2023 19:26:09 +0100,
Raghavendra Rao Ananta <rananta@google.com> wrote:
>
> On Thu, Jul 27, 2023 at 6:12 AM Marc Zyngier <maz@kernel.org> wrote:
> >
> > On Sat, 22 Jul 2023 03:22:51 +0100,
> > Raghavendra Rao Ananta <rananta@google.com> wrote:
> > >
> > > The current implementation of the stage-2 unmap walker traverses
> > > the given range and, as a part of break-before-make, performs
> > > TLB invalidations with a DSB for every PTE. A multitude of this
> > > combination could cause a performance bottleneck on some systems.
> > >
> > > Hence, if the system supports FEAT_TLBIRANGE, defer the TLB
> > > invalidations until the entire walk is finished, and then
> > > use range-based instructions to invalidate the TLBs in one go.
> > > Condition deferred TLB invalidation on the system supporting FWB,
> > > as the optimization is entirely pointless when the unmap walker
> > > needs to perform CMOs.
> > >
> > > Rename stage2_put_pte() to stage2_unmap_put_pte() as the function
> > > now serves the stage-2 unmap walker specifically, rather than
> > > acting generic.
> > >
> > > Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
> > > ---
> > > arch/arm64/kvm/hyp/pgtable.c | 67 +++++++++++++++++++++++++++++++-----
> > > 1 file changed, 58 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> > > index 5ef098af1736..cf88933a2ea0 100644
> > > --- a/arch/arm64/kvm/hyp/pgtable.c
> > > +++ b/arch/arm64/kvm/hyp/pgtable.c
> > > @@ -831,16 +831,54 @@ static void stage2_make_pte(const struct kvm_pgtable_visit_ctx *ctx, kvm_pte_t n
> > > smp_store_release(ctx->ptep, new);
> > > }
> > >
> > > -static void stage2_put_pte(const struct kvm_pgtable_visit_ctx *ctx, struct kvm_s2_mmu *mmu,
> > > - struct kvm_pgtable_mm_ops *mm_ops)
> > > +struct stage2_unmap_data {
> > > + struct kvm_pgtable *pgt;
> > > + bool defer_tlb_flush_init;
> > > +};
> > > +
> > > +static bool __stage2_unmap_defer_tlb_flush(struct kvm_pgtable *pgt)
> > > +{
> > > + /*
> > > + * If FEAT_TLBIRANGE is implemented, defer the individual
> > > + * TLB invalidations until the entire walk is finished, and
> > > + * then use the range-based TLBI instructions to do the
> > > + * invalidations. Condition deferred TLB invalidation on the
> > > + * system supporting FWB, as the optimization is entirely
> > > + * pointless when the unmap walker needs to perform CMOs.
> > > + */
> > > + return system_supports_tlb_range() && stage2_has_fwb(pgt);
> > > +}
> > > +
> > > +static bool stage2_unmap_defer_tlb_flush(struct stage2_unmap_data *unmap_data)
> > > +{
> > > + bool defer_tlb_flush = __stage2_unmap_defer_tlb_flush(unmap_data->pgt);
> > > +
> > > + /*
> > > + * Since __stage2_unmap_defer_tlb_flush() is based on alternative
> > > + * patching and the TLBIs' operations behavior depend on this,
> > > + * track if there's any change in the state during the unmap sequence.
> > > + */
> > > + WARN_ON(unmap_data->defer_tlb_flush_init != defer_tlb_flush);
> > > + return defer_tlb_flush;
> >
> > I really don't understand what you're testing here. The ability to
> > defer TLB invalidation is a function of the system capabilities
> > (range+FWB) and a single flag that is only set on the host for pKVM.
> >
> > How could that change in the middle of the life of the system? if
> > further begs the question about the need for the unmap_data data
> > structure.
> >
> > It looks to me that we could simply pass the pgt pointer around and be
> > done with it. Am I missing something obvious?
> >
> From one of the previous comments [1] (used in a different context),
> I'm given to understand that since these feature checks are governed
> by alternative patching, they can potentially change (at runtime?). Is
> that not the case and I have misunderstood the idea in comment [1]
> entirely? Is it solely used for optimization purposes and set only
> once?
Alternative patching, just like the static branches used to implement
the capability stuff, is a one way street. At the point where KVM is
initialised, these configurations are set in stone, and there is no
going back.
> If that's the case, I can get rid of the WARN_ON() and unmap_data.
yes, please.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-08-02 23:28 UTC|newest]
Thread overview: 228+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-22 2:22 [PATCH v7 00/12] KVM: arm64: Add support for FEAT_TLBIRANGE Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` [PATCH v7 01/12] KVM: Rename kvm_arch_flush_remote_tlb() to kvm_arch_flush_remote_tlbs() Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-27 10:24 ` Marc Zyngier
2023-07-27 10:24 ` Marc Zyngier
2023-07-27 10:24 ` Marc Zyngier
2023-07-27 10:24 ` Marc Zyngier
2023-07-31 17:21 ` Raghavendra Rao Ananta
2023-07-31 17:21 ` Raghavendra Rao Ananta
2023-07-31 17:21 ` Raghavendra Rao Ananta
2023-07-31 17:21 ` Raghavendra Rao Ananta
2023-07-31 21:42 ` Sean Christopherson
2023-07-31 21:42 ` Sean Christopherson
2023-07-31 21:42 ` Sean Christopherson
2023-07-31 21:42 ` Sean Christopherson
2023-08-01 0:42 ` Raghavendra Rao Ananta
2023-08-01 0:42 ` Raghavendra Rao Ananta
2023-08-01 0:42 ` Raghavendra Rao Ananta
2023-08-01 0:42 ` Raghavendra Rao Ananta
2023-08-02 15:54 ` Marc Zyngier
2023-08-02 15:54 ` Marc Zyngier
2023-08-02 15:54 ` Marc Zyngier
2023-08-02 15:54 ` Marc Zyngier
2023-08-02 16:10 ` Sean Christopherson
2023-08-02 16:10 ` Sean Christopherson
2023-08-02 16:10 ` Sean Christopherson
2023-08-02 16:10 ` Sean Christopherson
2023-08-02 23:30 ` Raghavendra Rao Ananta
2023-08-02 23:30 ` Raghavendra Rao Ananta
2023-08-02 23:30 ` Raghavendra Rao Ananta
2023-08-02 23:30 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` [PATCH v7 02/12] KVM: arm64: Use kvm_arch_flush_remote_tlbs() Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-24 9:13 ` Shaoqin Huang
2023-07-24 9:13 ` Shaoqin Huang
2023-07-24 9:13 ` Shaoqin Huang
2023-07-27 10:25 ` Marc Zyngier
2023-07-27 10:25 ` Marc Zyngier
2023-07-27 10:25 ` Marc Zyngier
2023-07-27 10:25 ` Marc Zyngier
2023-07-31 21:50 ` Sean Christopherson
2023-07-31 21:50 ` Sean Christopherson
2023-07-31 21:50 ` Sean Christopherson
2023-07-31 21:50 ` Sean Christopherson
2023-08-02 15:55 ` Marc Zyngier
2023-08-02 15:55 ` Marc Zyngier
2023-08-02 15:55 ` Marc Zyngier
2023-08-02 15:55 ` Marc Zyngier
2023-08-02 23:28 ` Raghavendra Rao Ananta
2023-08-02 23:28 ` Raghavendra Rao Ananta
2023-08-02 23:28 ` Raghavendra Rao Ananta
2023-08-02 23:28 ` Raghavendra Rao Ananta
2023-08-04 18:19 ` Raghavendra Rao Ananta
2023-08-04 18:19 ` Raghavendra Rao Ananta
2023-08-04 18:19 ` Raghavendra Rao Ananta
2023-08-04 18:19 ` Raghavendra Rao Ananta
2023-08-08 15:07 ` Sean Christopherson
2023-08-08 15:07 ` Sean Christopherson
2023-08-08 15:07 ` Sean Christopherson
2023-08-08 15:07 ` Sean Christopherson
2023-08-08 16:19 ` Raghavendra Rao Ananta
2023-08-08 16:19 ` Raghavendra Rao Ananta
2023-08-08 16:19 ` Raghavendra Rao Ananta
2023-08-08 16:19 ` Raghavendra Rao Ananta
2023-08-08 16:43 ` Marc Zyngier
2023-08-08 16:43 ` Marc Zyngier
2023-08-08 16:43 ` Marc Zyngier
2023-08-08 16:43 ` Marc Zyngier
2023-08-08 16:46 ` Raghavendra Rao Ananta
2023-08-08 16:46 ` Raghavendra Rao Ananta
2023-08-08 16:46 ` Raghavendra Rao Ananta
2023-08-08 16:46 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` [PATCH v7 03/12] KVM: Remove CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-24 9:13 ` Shaoqin Huang
2023-07-24 9:13 ` Shaoqin Huang
2023-07-24 9:13 ` Shaoqin Huang
2023-07-22 2:22 ` [PATCH v7 04/12] KVM: Allow range-based TLB invalidation from common code Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-31 21:55 ` Sean Christopherson
2023-07-31 21:55 ` Sean Christopherson
2023-07-31 21:55 ` Sean Christopherson
2023-07-31 21:55 ` Sean Christopherson
2023-08-01 0:39 ` Raghavendra Rao Ananta
2023-08-01 0:39 ` Raghavendra Rao Ananta
2023-08-01 0:39 ` Raghavendra Rao Ananta
2023-08-01 0:39 ` Raghavendra Rao Ananta
2023-08-07 4:06 ` Anup Patel
2023-08-07 4:06 ` Anup Patel
2023-08-07 4:06 ` Anup Patel
2023-08-07 4:06 ` Anup Patel
2023-07-22 2:22 ` [PATCH v7 05/12] KVM: Move kvm_arch_flush_remote_tlbs_memslot() to " Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-27 10:53 ` Marc Zyngier
2023-07-27 10:53 ` Marc Zyngier
2023-07-27 10:53 ` Marc Zyngier
2023-07-27 10:53 ` Marc Zyngier
2023-07-31 17:30 ` Raghavendra Rao Ananta
2023-07-31 17:30 ` Raghavendra Rao Ananta
2023-07-31 17:30 ` Raghavendra Rao Ananta
2023-07-31 17:30 ` Raghavendra Rao Ananta
2023-08-07 4:06 ` Anup Patel
2023-08-07 4:06 ` Anup Patel
2023-08-07 4:06 ` Anup Patel
2023-08-07 4:06 ` Anup Patel
2023-07-22 2:22 ` [PATCH v7 06/12] arm64: tlb: Refactor the core flush algorithm of __flush_tlb_range Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-27 10:58 ` Marc Zyngier
2023-07-27 10:58 ` Marc Zyngier
2023-07-27 10:58 ` Marc Zyngier
2023-07-27 10:58 ` Marc Zyngier
2023-07-31 17:36 ` Raghavendra Rao Ananta
2023-07-31 17:36 ` Raghavendra Rao Ananta
2023-07-31 17:36 ` Raghavendra Rao Ananta
2023-07-31 17:36 ` Raghavendra Rao Ananta
2023-08-02 15:58 ` Marc Zyngier
2023-08-02 15:58 ` Marc Zyngier
2023-08-02 15:58 ` Marc Zyngier
2023-08-02 15:58 ` Marc Zyngier
2023-08-02 23:31 ` Raghavendra Rao Ananta
2023-08-02 23:31 ` Raghavendra Rao Ananta
2023-08-02 23:31 ` Raghavendra Rao Ananta
2023-08-02 23:31 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` [PATCH v7 07/12] KVM: arm64: Implement __kvm_tlb_flush_vmid_range() Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-24 9:21 ` Shaoqin Huang
2023-07-24 9:21 ` Shaoqin Huang
2023-07-24 9:21 ` Shaoqin Huang
2023-07-27 12:40 ` Marc Zyngier
2023-07-27 12:40 ` Marc Zyngier
2023-07-27 12:40 ` Marc Zyngier
2023-07-27 12:40 ` Marc Zyngier
2023-07-31 17:45 ` Raghavendra Rao Ananta
2023-07-31 17:45 ` Raghavendra Rao Ananta
2023-07-31 17:45 ` Raghavendra Rao Ananta
2023-07-31 17:45 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` [PATCH v7 08/12] KVM: arm64: Define kvm_tlb_flush_vmid_range() Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-27 12:47 ` Marc Zyngier
2023-07-27 12:47 ` Marc Zyngier
2023-07-27 12:47 ` Marc Zyngier
2023-07-27 12:47 ` Marc Zyngier
2023-07-27 13:01 ` Marc Zyngier
2023-07-27 13:01 ` Marc Zyngier
2023-07-27 13:01 ` Marc Zyngier
2023-07-27 13:01 ` Marc Zyngier
2023-07-31 18:01 ` Raghavendra Rao Ananta
2023-07-31 18:01 ` Raghavendra Rao Ananta
2023-07-31 18:01 ` Raghavendra Rao Ananta
2023-07-31 18:01 ` Raghavendra Rao Ananta
2023-08-02 23:25 ` Marc Zyngier
2023-08-02 23:25 ` Marc Zyngier
2023-08-02 23:25 ` Marc Zyngier
2023-08-02 23:25 ` Marc Zyngier
2023-07-22 2:22 ` [PATCH v7 09/12] KVM: arm64: Implement kvm_arch_flush_remote_tlbs_range() Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-27 12:48 ` Marc Zyngier
2023-07-27 12:48 ` Marc Zyngier
2023-07-27 12:48 ` Marc Zyngier
2023-07-27 12:48 ` Marc Zyngier
2023-07-22 2:22 ` [PATCH v7 10/12] KVM: arm64: Flush only the memslot after write-protect Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` [PATCH v7 11/12] KVM: arm64: Invalidate the table entries upon a range Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` [PATCH v7 12/12] KVM: arm64: Use TLBI range-based intructions for unmap Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-22 2:22 ` Raghavendra Rao Ananta
2023-07-24 9:34 ` Shaoqin Huang
2023-07-24 9:34 ` Shaoqin Huang
2023-07-24 9:34 ` Shaoqin Huang
2023-07-24 16:47 ` Raghavendra Rao Ananta
2023-07-24 16:47 ` Raghavendra Rao Ananta
2023-07-24 16:47 ` Raghavendra Rao Ananta
2023-07-25 2:32 ` Shaoqin Huang
2023-07-25 2:32 ` Shaoqin Huang
2023-07-25 2:32 ` Shaoqin Huang
2023-07-25 17:23 ` Raghavendra Rao Ananta
2023-07-25 17:23 ` Raghavendra Rao Ananta
2023-07-25 17:23 ` Raghavendra Rao Ananta
2023-07-26 4:06 ` Shaoqin Huang
2023-07-26 4:06 ` Shaoqin Huang
2023-07-26 4:06 ` Shaoqin Huang
2023-07-27 13:12 ` Marc Zyngier
2023-07-27 13:12 ` Marc Zyngier
2023-07-27 13:12 ` Marc Zyngier
2023-07-27 13:12 ` Marc Zyngier
2023-07-31 18:26 ` Raghavendra Rao Ananta
2023-07-31 18:26 ` Raghavendra Rao Ananta
2023-07-31 18:26 ` Raghavendra Rao Ananta
2023-07-31 18:26 ` Raghavendra Rao Ananta
2023-08-02 23:28 ` Marc Zyngier [this message]
2023-08-02 23:28 ` Marc Zyngier
2023-08-02 23:28 ` Marc Zyngier
2023-08-02 23:28 ` Marc Zyngier
2023-08-02 23:33 ` Raghavendra Rao Ananta
2023-08-02 23:33 ` Raghavendra Rao Ananta
2023-08-02 23:33 ` Raghavendra Rao Ananta
2023-08-02 23:33 ` Raghavendra Rao Ananta
2023-07-31 21:57 ` [PATCH v7 00/12] KVM: arm64: Add support for FEAT_TLBIRANGE Sean Christopherson
2023-07-31 21:57 ` Sean Christopherson
2023-07-31 21:57 ` Sean Christopherson
2023-07-31 21:57 ` Sean Christopherson
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