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From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Will Deacon <will@kernel.org>,
	linux-kernel@vger.kernel.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	kvmarm@lists.linux.dev, kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/2] KVM: arm64: Remove use of ARM64_FEATURE_MASK()
Date: Thu, 22 Dec 2022 12:23:49 +0000	[thread overview]
Message-ID: <86h6xnbp9m.wl-maz@kernel.org> (raw)
In-Reply-To: <20221221-kvm-sysreg-cleanup-v1-2-112ddb14fb4e@kernel.org>

On Wed, 21 Dec 2022 18:06:10 +0000,
Mark Brown <broonie@kernel.org> wrote:
> 
> The KVM code makes extensive use of ARM64_FEATURE_MASK() to generate a
> mask for fields in the ID registers. This macro has the assumption that
> all feature fields are 4 bits wide but the architecture has evolved to
> add fields with other widths, such as the 1 bit fields in ID_AA64SMFR0_EL1,
> so we need to adjust the
> 
> We could fix this by making ARM64_FEATURE_MASK() use the generated macros
> that we have now but since one of these is a direct _MASK constant the
> result is something that's more verbose and less direct than just updating
> the users to directly use the generated mask macros, writing
> 
> 	#define ARM64_FEATURE_MASK(x)	(x##_MASK)
> 
> obviously looks redundant and if we look at the users updating them turns
> 
> 	val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3);
> 
> into the more direct
> 
> 	val &= ~ID_AA64PFR0_EL1_CSV3_MASK;

If the two are strictly equivalent, then let's use the former as it
results in a tiny diff.

Constantly repainting these files causes no end of conflicts when
rebasing large series (pKVM, NV...), and makes backporting of fixes
much harder than it should be. Specially considering that there is a
single occcurence of an ID register with non-4bit fields.

Just put a FIXME in the various files so that people do the repainting
as they change this code.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] KVM: arm64: Remove use of ARM64_FEATURE_MASK()
Date: Thu, 22 Dec 2022 12:23:49 +0000	[thread overview]
Message-ID: <86h6xnbp9m.wl-maz@kernel.org> (raw)
Message-ID: <20221222122349.1SfgeZQxUmkU1Um2OupufKXFW-vvPQbq2eq3eytWv2Q@z> (raw)
In-Reply-To: <20221221-kvm-sysreg-cleanup-v1-2-112ddb14fb4e@kernel.org>

On Wed, 21 Dec 2022 18:06:10 +0000,
Mark Brown <broonie@kernel.org> wrote:
> 
> The KVM code makes extensive use of ARM64_FEATURE_MASK() to generate a
> mask for fields in the ID registers. This macro has the assumption that
> all feature fields are 4 bits wide but the architecture has evolved to
> add fields with other widths, such as the 1 bit fields in ID_AA64SMFR0_EL1,
> so we need to adjust the
> 
> We could fix this by making ARM64_FEATURE_MASK() use the generated macros
> that we have now but since one of these is a direct _MASK constant the
> result is something that's more verbose and less direct than just updating
> the users to directly use the generated mask macros, writing
> 
> 	#define ARM64_FEATURE_MASK(x)	(x##_MASK)
> 
> obviously looks redundant and if we look at the users updating them turns
> 
> 	val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3);
> 
> into the more direct
> 
> 	val &= ~ID_AA64PFR0_EL1_CSV3_MASK;

If the two are strictly equivalent, then let's use the former as it
results in a tiny diff.

Constantly repainting these files causes no end of conflicts when
rebasing large series (pKVM, NV...), and makes backporting of fixes
much harder than it should be. Specially considering that there is a
single occcurence of an ID register with non-4bit fields.

Just put a FIXME in the various files so that people do the repainting
as they change this code.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] KVM: arm64: Remove use of ARM64_FEATURE_MASK()
Date: Thu, 22 Dec 2022 12:23:49 +0000	[thread overview]
Message-ID: <86h6xnbp9m.wl-maz@kernel.org> (raw)
In-Reply-To: <20221221-kvm-sysreg-cleanup-v1-2-112ddb14fb4e@kernel.org>

On Wed, 21 Dec 2022 18:06:10 +0000,
Mark Brown <broonie@kernel.org> wrote:
> 
> The KVM code makes extensive use of ARM64_FEATURE_MASK() to generate a
> mask for fields in the ID registers. This macro has the assumption that
> all feature fields are 4 bits wide but the architecture has evolved to
> add fields with other widths, such as the 1 bit fields in ID_AA64SMFR0_EL1,
> so we need to adjust the
> 
> We could fix this by making ARM64_FEATURE_MASK() use the generated macros
> that we have now but since one of these is a direct _MASK constant the
> result is something that's more verbose and less direct than just updating
> the users to directly use the generated mask macros, writing
> 
> 	#define ARM64_FEATURE_MASK(x)	(x##_MASK)
> 
> obviously looks redundant and if we look at the users updating them turns
> 
> 	val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3);
> 
> into the more direct
> 
> 	val &= ~ID_AA64PFR0_EL1_CSV3_MASK;

If the two are strictly equivalent, then let's use the former as it
results in a tiny diff.

Constantly repainting these files causes no end of conflicts when
rebasing large series (pKVM, NV...), and makes backporting of fixes
much harder than it should be. Specially considering that there is a
single occcurence of an ID register with non-4bit fields.

Just put a FIXME in the various files so that people do the repainting
as they change this code.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-12-22 12:23 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-21 18:06 [PATCH 0/2] KVM: arm64: syreg cleanups/fixes Mark Brown
2022-12-21 18:06 ` Mark Brown
2022-12-21 18:06 ` Mark Brown
2022-12-21 18:06 ` [PATCH 1/2] KVM: arm64: Convert non-GIC code to SYS_FIELD_{GET,PREP} Mark Brown
2022-12-21 18:06   ` Mark Brown
2022-12-21 18:06   ` Mark Brown
2022-12-21 18:06 ` [PATCH 2/2] KVM: arm64: Remove use of ARM64_FEATURE_MASK() Mark Brown
2022-12-21 18:06   ` Mark Brown
2022-12-21 18:06   ` Mark Brown
2022-12-22 12:23   ` Marc Zyngier [this message]
2022-12-22 12:23     ` Marc Zyngier
2022-12-22 12:23     ` Marc Zyngier
2022-12-22 12:34     ` Mark Brown
2022-12-22 12:34       ` Mark Brown
2022-12-22 12:34       ` Mark Brown

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