From: Marc Zyngier <marc.zyngier@arm.com>
To: Jintack Lim <jintack@cs.columbia.edu>
Cc: kvm@vger.kernel.org, catalin.marinas@arm.com,
will.deacon@arm.com, linux@armlinux.org.uk,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, andre.przywara@arm.com,
pbonzini@redhat.com, kvmarm@lists.cs.columbia.edu
Subject: Re: [RFC v2 10/10] KVM: arm/arm64: Emulate the EL1 phys timer register access
Date: Sun, 29 Jan 2017 15:44:35 +0000 [thread overview]
Message-ID: <86lgtt98gs.fsf@arm.com> (raw)
In-Reply-To: <1485479100-4966-11-git-send-email-jintack@cs.columbia.edu> (Jintack Lim's message of "Thu, 26 Jan 2017 20:05:00 -0500")
On Fri, Jan 27 2017 at 01:05:00 AM, Jintack Lim <jintack@cs.columbia.edu> wrote:
> Emulate read and write operations to CNTP_TVAL, CNTP_CVAL and CNTP_CTL.
> Now VMs are able to use the EL1 physical timer.
>
> Signed-off-by: Jintack Lim <jintack@cs.columbia.edu>
> ---
> arch/arm64/kvm/sys_regs.c | 32 +++++++++++++++++++++++++++++---
> include/kvm/arm_arch_timer.h | 2 ++
> virt/kvm/arm/arch_timer.c | 2 +-
> 3 files changed, 32 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index fd9e747..adf009f 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -824,7 +824,14 @@ static bool access_cntp_tval(struct kvm_vcpu *vcpu,
> struct sys_reg_params *p,
> const struct sys_reg_desc *r)
> {
> - kvm_inject_undefined(vcpu);
> + struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
> + u64 now = kvm_phys_timer_read();
> +
> + if (p->is_write)
> + ptimer->cnt_cval = p->regval + now;
> + else
> + p->regval = ptimer->cnt_cval - now;
> +
> return true;
> }
>
> @@ -832,7 +839,20 @@ static bool access_cntp_ctl(struct kvm_vcpu *vcpu,
> struct sys_reg_params *p,
> const struct sys_reg_desc *r)
> {
> - kvm_inject_undefined(vcpu);
> + struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
> +
> + if (p->is_write) {
> + /* ISTATUS bit is read-only */
> + ptimer->cnt_ctl = p->regval & ~ARCH_TIMER_CTRL_IT_STAT;
> + } else {
> + u64 now = kvm_phys_timer_read();
> +
> + p->regval = ptimer->cnt_ctl;
> + /* Set ISTATUS bit if it's expired */
> + if (ptimer->cnt_cval <= now)
> + p->regval |= ARCH_TIMER_CTRL_IT_STAT;
> + }
Shouldn't we take the ENABLE bit into account? The ARMv8 ARM version I
have at hand (version h) seems to indicate that we should, but we should
check with the latest and greatest...
> +
> return true;
> }
>
> @@ -840,7 +860,13 @@ static bool access_cntp_cval(struct kvm_vcpu *vcpu,
> struct sys_reg_params *p,
> const struct sys_reg_desc *r)
> {
> - kvm_inject_undefined(vcpu);
> + struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
> +
> + if (p->is_write)
> + ptimer->cnt_cval = p->regval;
> + else
> + p->regval = ptimer->cnt_cval;
> +
> return true;
> }
>
> diff --git a/include/kvm/arm_arch_timer.h b/include/kvm/arm_arch_timer.h
> index a364593..fec99f2 100644
> --- a/include/kvm/arm_arch_timer.h
> +++ b/include/kvm/arm_arch_timer.h
> @@ -74,6 +74,8 @@ bool kvm_timer_should_fire(struct kvm_vcpu *vcpu,
> void kvm_timer_schedule(struct kvm_vcpu *vcpu);
> void kvm_timer_unschedule(struct kvm_vcpu *vcpu);
>
> +u64 kvm_phys_timer_read(void);
> +
> void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu);
>
> void kvm_timer_init_vhe(void);
> diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
> index b366bb2..9eec063 100644
> --- a/virt/kvm/arm/arch_timer.c
> +++ b/virt/kvm/arm/arch_timer.c
> @@ -40,7 +40,7 @@ void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu)
> vcpu_vtimer(vcpu)->active_cleared_last = false;
> }
>
> -static u64 kvm_phys_timer_read(void)
> +u64 kvm_phys_timer_read(void)
> {
> return timecounter->cc->read(timecounter->cc);
> }
Thanks,
M.
--
Jazz is not dead. It just smells funny.
WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC v2 10/10] KVM: arm/arm64: Emulate the EL1 phys timer register access
Date: Sun, 29 Jan 2017 15:44:35 +0000 [thread overview]
Message-ID: <86lgtt98gs.fsf@arm.com> (raw)
In-Reply-To: <1485479100-4966-11-git-send-email-jintack@cs.columbia.edu> (Jintack Lim's message of "Thu, 26 Jan 2017 20:05:00 -0500")
On Fri, Jan 27 2017 at 01:05:00 AM, Jintack Lim <jintack@cs.columbia.edu> wrote:
> Emulate read and write operations to CNTP_TVAL, CNTP_CVAL and CNTP_CTL.
> Now VMs are able to use the EL1 physical timer.
>
> Signed-off-by: Jintack Lim <jintack@cs.columbia.edu>
> ---
> arch/arm64/kvm/sys_regs.c | 32 +++++++++++++++++++++++++++++---
> include/kvm/arm_arch_timer.h | 2 ++
> virt/kvm/arm/arch_timer.c | 2 +-
> 3 files changed, 32 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index fd9e747..adf009f 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -824,7 +824,14 @@ static bool access_cntp_tval(struct kvm_vcpu *vcpu,
> struct sys_reg_params *p,
> const struct sys_reg_desc *r)
> {
> - kvm_inject_undefined(vcpu);
> + struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
> + u64 now = kvm_phys_timer_read();
> +
> + if (p->is_write)
> + ptimer->cnt_cval = p->regval + now;
> + else
> + p->regval = ptimer->cnt_cval - now;
> +
> return true;
> }
>
> @@ -832,7 +839,20 @@ static bool access_cntp_ctl(struct kvm_vcpu *vcpu,
> struct sys_reg_params *p,
> const struct sys_reg_desc *r)
> {
> - kvm_inject_undefined(vcpu);
> + struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
> +
> + if (p->is_write) {
> + /* ISTATUS bit is read-only */
> + ptimer->cnt_ctl = p->regval & ~ARCH_TIMER_CTRL_IT_STAT;
> + } else {
> + u64 now = kvm_phys_timer_read();
> +
> + p->regval = ptimer->cnt_ctl;
> + /* Set ISTATUS bit if it's expired */
> + if (ptimer->cnt_cval <= now)
> + p->regval |= ARCH_TIMER_CTRL_IT_STAT;
> + }
Shouldn't we take the ENABLE bit into account? The ARMv8 ARM version I
have at hand (version h) seems to indicate that we should, but we should
check with the latest and greatest...
> +
> return true;
> }
>
> @@ -840,7 +860,13 @@ static bool access_cntp_cval(struct kvm_vcpu *vcpu,
> struct sys_reg_params *p,
> const struct sys_reg_desc *r)
> {
> - kvm_inject_undefined(vcpu);
> + struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
> +
> + if (p->is_write)
> + ptimer->cnt_cval = p->regval;
> + else
> + p->regval = ptimer->cnt_cval;
> +
> return true;
> }
>
> diff --git a/include/kvm/arm_arch_timer.h b/include/kvm/arm_arch_timer.h
> index a364593..fec99f2 100644
> --- a/include/kvm/arm_arch_timer.h
> +++ b/include/kvm/arm_arch_timer.h
> @@ -74,6 +74,8 @@ bool kvm_timer_should_fire(struct kvm_vcpu *vcpu,
> void kvm_timer_schedule(struct kvm_vcpu *vcpu);
> void kvm_timer_unschedule(struct kvm_vcpu *vcpu);
>
> +u64 kvm_phys_timer_read(void);
> +
> void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu);
>
> void kvm_timer_init_vhe(void);
> diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
> index b366bb2..9eec063 100644
> --- a/virt/kvm/arm/arch_timer.c
> +++ b/virt/kvm/arm/arch_timer.c
> @@ -40,7 +40,7 @@ void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu)
> vcpu_vtimer(vcpu)->active_cleared_last = false;
> }
>
> -static u64 kvm_phys_timer_read(void)
> +u64 kvm_phys_timer_read(void)
> {
> return timecounter->cc->read(timecounter->cc);
> }
Thanks,
M.
--
Jazz is not dead. It just smells funny.
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <marc.zyngier@arm.com>
To: Jintack Lim <jintack@cs.columbia.edu>
Cc: <pbonzini@redhat.com>, <rkrcmar@redhat.com>,
<christoffer.dall@linaro.org>, <linux@armlinux.org.uk>,
<catalin.marinas@arm.com>, <will.deacon@arm.com>,
<andre.przywara@arm.com>, <kvm@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<kvmarm@lists.cs.columbia.edu>, <linux-kernel@vger.kernel.org>
Subject: Re: [RFC v2 10/10] KVM: arm/arm64: Emulate the EL1 phys timer register access
Date: Sun, 29 Jan 2017 15:44:35 +0000 [thread overview]
Message-ID: <86lgtt98gs.fsf@arm.com> (raw)
In-Reply-To: <1485479100-4966-11-git-send-email-jintack@cs.columbia.edu> (Jintack Lim's message of "Thu, 26 Jan 2017 20:05:00 -0500")
On Fri, Jan 27 2017 at 01:05:00 AM, Jintack Lim <jintack@cs.columbia.edu> wrote:
> Emulate read and write operations to CNTP_TVAL, CNTP_CVAL and CNTP_CTL.
> Now VMs are able to use the EL1 physical timer.
>
> Signed-off-by: Jintack Lim <jintack@cs.columbia.edu>
> ---
> arch/arm64/kvm/sys_regs.c | 32 +++++++++++++++++++++++++++++---
> include/kvm/arm_arch_timer.h | 2 ++
> virt/kvm/arm/arch_timer.c | 2 +-
> 3 files changed, 32 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index fd9e747..adf009f 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -824,7 +824,14 @@ static bool access_cntp_tval(struct kvm_vcpu *vcpu,
> struct sys_reg_params *p,
> const struct sys_reg_desc *r)
> {
> - kvm_inject_undefined(vcpu);
> + struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
> + u64 now = kvm_phys_timer_read();
> +
> + if (p->is_write)
> + ptimer->cnt_cval = p->regval + now;
> + else
> + p->regval = ptimer->cnt_cval - now;
> +
> return true;
> }
>
> @@ -832,7 +839,20 @@ static bool access_cntp_ctl(struct kvm_vcpu *vcpu,
> struct sys_reg_params *p,
> const struct sys_reg_desc *r)
> {
> - kvm_inject_undefined(vcpu);
> + struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
> +
> + if (p->is_write) {
> + /* ISTATUS bit is read-only */
> + ptimer->cnt_ctl = p->regval & ~ARCH_TIMER_CTRL_IT_STAT;
> + } else {
> + u64 now = kvm_phys_timer_read();
> +
> + p->regval = ptimer->cnt_ctl;
> + /* Set ISTATUS bit if it's expired */
> + if (ptimer->cnt_cval <= now)
> + p->regval |= ARCH_TIMER_CTRL_IT_STAT;
> + }
Shouldn't we take the ENABLE bit into account? The ARMv8 ARM version I
have at hand (version h) seems to indicate that we should, but we should
check with the latest and greatest...
> +
> return true;
> }
>
> @@ -840,7 +860,13 @@ static bool access_cntp_cval(struct kvm_vcpu *vcpu,
> struct sys_reg_params *p,
> const struct sys_reg_desc *r)
> {
> - kvm_inject_undefined(vcpu);
> + struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
> +
> + if (p->is_write)
> + ptimer->cnt_cval = p->regval;
> + else
> + p->regval = ptimer->cnt_cval;
> +
> return true;
> }
>
> diff --git a/include/kvm/arm_arch_timer.h b/include/kvm/arm_arch_timer.h
> index a364593..fec99f2 100644
> --- a/include/kvm/arm_arch_timer.h
> +++ b/include/kvm/arm_arch_timer.h
> @@ -74,6 +74,8 @@ bool kvm_timer_should_fire(struct kvm_vcpu *vcpu,
> void kvm_timer_schedule(struct kvm_vcpu *vcpu);
> void kvm_timer_unschedule(struct kvm_vcpu *vcpu);
>
> +u64 kvm_phys_timer_read(void);
> +
> void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu);
>
> void kvm_timer_init_vhe(void);
> diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
> index b366bb2..9eec063 100644
> --- a/virt/kvm/arm/arch_timer.c
> +++ b/virt/kvm/arm/arch_timer.c
> @@ -40,7 +40,7 @@ void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu)
> vcpu_vtimer(vcpu)->active_cleared_last = false;
> }
>
> -static u64 kvm_phys_timer_read(void)
> +u64 kvm_phys_timer_read(void)
> {
> return timecounter->cc->read(timecounter->cc);
> }
Thanks,
M.
--
Jazz is not dead. It just smells funny.
next prev parent reply other threads:[~2017-01-29 15:45 UTC|newest]
Thread overview: 127+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-27 1:04 [RFC v2 00/10] Provide the EL1 physical timer to the VM Jintack Lim
2017-01-27 1:04 ` Jintack Lim
2017-01-27 1:04 ` [RFC v2 01/10] KVM: arm/arm64: Abstract virtual timer context into separate structure Jintack Lim
2017-01-27 1:04 ` Jintack Lim
2017-01-29 11:44 ` Marc Zyngier
2017-01-29 11:44 ` Marc Zyngier
2017-01-29 11:44 ` Marc Zyngier
2017-01-27 1:04 ` [RFC v2 02/10] KVM: arm/arm64: Move cntvoff to each timer context Jintack Lim
2017-01-27 1:04 ` Jintack Lim
2017-01-29 11:54 ` Marc Zyngier
2017-01-29 11:54 ` Marc Zyngier
2017-01-29 11:54 ` Marc Zyngier
2017-01-30 14:45 ` Christoffer Dall
2017-01-30 14:45 ` Christoffer Dall
2017-01-30 14:45 ` Christoffer Dall
2017-01-30 14:51 ` Marc Zyngier
2017-01-30 14:51 ` Marc Zyngier
2017-01-30 14:51 ` Marc Zyngier
2017-01-30 17:40 ` Jintack Lim
2017-01-30 17:40 ` Jintack Lim
2017-01-30 17:40 ` Jintack Lim
2017-01-30 17:58 ` Jintack Lim
2017-01-30 17:58 ` Jintack Lim
2017-01-30 17:58 ` Jintack Lim
2017-01-30 18:05 ` Marc Zyngier
2017-01-30 18:05 ` Marc Zyngier
2017-01-30 18:05 ` Marc Zyngier
2017-01-30 18:45 ` Jintack Lim
2017-01-30 18:45 ` Jintack Lim
2017-01-27 1:04 ` [RFC v2 03/10] KVM: arm/arm64: Decouple kvm timer functions from virtual timer Jintack Lim
2017-01-27 1:04 ` Jintack Lim
2017-01-29 12:01 ` Marc Zyngier
2017-01-29 12:01 ` Marc Zyngier
2017-01-29 12:01 ` Marc Zyngier
2017-01-30 17:17 ` Jintack Lim
2017-01-30 17:17 ` Jintack Lim
2017-01-30 14:49 ` Christoffer Dall
2017-01-30 14:49 ` Christoffer Dall
2017-01-30 14:49 ` Christoffer Dall
2017-01-30 17:18 ` Jintack Lim
2017-01-30 17:18 ` Jintack Lim
2017-01-30 17:18 ` Jintack Lim
2017-01-27 1:04 ` [RFC v2 04/10] KVM: arm/arm64: Add the EL1 physical timer context Jintack Lim
2017-01-27 1:04 ` Jintack Lim
2017-01-27 1:04 ` [RFC v2 05/10] KVM: arm/arm64: Initialize the emulated EL1 physical timer Jintack Lim
2017-01-27 1:04 ` Jintack Lim
2017-01-29 12:07 ` Marc Zyngier
2017-01-29 12:07 ` Marc Zyngier
2017-01-29 12:07 ` Marc Zyngier
2017-01-30 14:58 ` Christoffer Dall
2017-01-30 14:58 ` Christoffer Dall
2017-01-30 14:58 ` Christoffer Dall
2017-01-30 17:44 ` Marc Zyngier
2017-01-30 17:44 ` Marc Zyngier
2017-01-30 19:04 ` Christoffer Dall
2017-01-30 19:04 ` Christoffer Dall
2017-01-30 19:04 ` Christoffer Dall
2017-02-01 10:08 ` Marc Zyngier
2017-02-01 10:08 ` Marc Zyngier
2017-02-01 10:08 ` Marc Zyngier
2017-01-27 1:04 ` [RFC v2 06/10] KVM: arm/arm64: Update the physical timer interrupt level Jintack Lim
2017-01-27 1:04 ` Jintack Lim
2017-01-29 15:21 ` Marc Zyngier
2017-01-29 15:21 ` Marc Zyngier
2017-01-29 15:21 ` Marc Zyngier
2017-01-30 15:02 ` Christoffer Dall
2017-01-30 15:02 ` Christoffer Dall
2017-01-30 17:50 ` Marc Zyngier
2017-01-30 17:50 ` Marc Zyngier
2017-01-30 17:50 ` Marc Zyngier
2017-01-30 18:41 ` Christoffer Dall
2017-01-30 18:41 ` Christoffer Dall
2017-01-30 18:48 ` Marc Zyngier
2017-01-30 18:48 ` Marc Zyngier
2017-01-30 18:48 ` Marc Zyngier
2017-01-30 19:06 ` Christoffer Dall
2017-01-30 19:06 ` Christoffer Dall
2017-01-30 19:06 ` Christoffer Dall
2017-01-31 17:00 ` Marc Zyngier
2017-01-31 17:00 ` Marc Zyngier
2017-01-31 17:00 ` Marc Zyngier
2017-02-01 8:02 ` Christoffer Dall
2017-02-01 8:02 ` Christoffer Dall
2017-02-01 8:02 ` Christoffer Dall
2017-02-01 8:04 ` Christoffer Dall
2017-02-01 8:04 ` Christoffer Dall
2017-02-01 8:04 ` Christoffer Dall
2017-02-01 8:40 ` Jintack Lim
2017-02-01 8:40 ` Jintack Lim
2017-02-01 8:40 ` Jintack Lim
2017-02-01 10:07 ` Christoffer Dall
2017-02-01 10:07 ` Christoffer Dall
2017-02-01 10:07 ` Christoffer Dall
2017-02-01 10:17 ` Marc Zyngier
2017-02-01 10:17 ` Marc Zyngier
2017-02-01 10:17 ` Marc Zyngier
2017-02-01 10:01 ` Marc Zyngier
2017-02-01 10:01 ` Marc Zyngier
2017-01-27 1:04 ` [RFC v2 07/10] KVM: arm/arm64: Set a background timer to the earliest timer expiration Jintack Lim
2017-01-27 1:04 ` Jintack Lim
2017-01-27 1:04 ` [RFC v2 08/10] KVM: arm/arm64: Set up a background timer for the physical timer emulation Jintack Lim
2017-01-27 1:04 ` Jintack Lim
2017-01-27 1:04 ` [RFC v2 09/10] KVM: arm64: Add the EL1 physical timer access handler Jintack Lim
2017-01-27 1:04 ` Jintack Lim
2017-01-27 1:05 ` [RFC v2 10/10] KVM: arm/arm64: Emulate the EL1 phys timer register access Jintack Lim
2017-01-27 1:05 ` Jintack Lim
2017-01-29 15:44 ` Marc Zyngier [this message]
2017-01-29 15:44 ` Marc Zyngier
2017-01-29 15:44 ` Marc Zyngier
2017-01-30 17:08 ` Jintack Lim
2017-01-30 17:08 ` Jintack Lim
2017-01-30 17:08 ` Jintack Lim
2017-01-30 17:26 ` Peter Maydell
2017-01-30 17:26 ` Peter Maydell
2017-01-30 17:26 ` Peter Maydell
2017-01-30 17:35 ` Marc Zyngier
2017-01-30 17:35 ` Marc Zyngier
2017-01-30 17:35 ` Marc Zyngier
2017-01-30 17:38 ` Jintack Lim
2017-01-30 17:38 ` Jintack Lim
2017-01-30 17:38 ` Jintack Lim
2017-01-29 15:55 ` [RFC v2 00/10] Provide the EL1 physical timer to the VM Marc Zyngier
2017-01-29 15:55 ` Marc Zyngier
2017-01-29 15:55 ` Marc Zyngier
2017-01-30 19:02 ` Jintack Lim
2017-01-30 19:02 ` Jintack Lim
2017-01-30 19:02 ` Jintack Lim
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