* [PATCH] drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT
@ 2012-01-26 16:18 Daniel Vetter
2012-01-26 19:42 ` Daniel Vetter
0 siblings, 1 reply; 5+ messages in thread
From: Daniel Vetter @ 2012-01-26 16:18 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter
An identical patch has been merged for i9xx_crtc_mode_set:
ommit 59df7b1771c150163e522f33c638096ab0efbf42
Author: Christian Schmidt <schmidt@digadd.de>
Date: Mon Dec 19 20:03:33 2011 +0100
drm/intel: Fix initialization if startup happens in interlaced mode [v2]
But that one neglected to fix up the ironlake+ path.
This should fix the issue reported by Alfonso Fiore where booting with
only a HDMI cable connected to his TV failed to display anything. The
issue is that the bios set up things for 1080i and used the pannel
fitter to scale up the lower progressive resolutions. We failed to
clear the interlace bit in the PIPEACONF register, resulting in havoc.
Cc: Peter Ross <pross@xvid.org>
Cc: Alfonso Fiore <alfonso.fiore@gmail.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5ba19df..dd50b47 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5967,7 +5967,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
adjusted_mode->crtc_vsync_end -= 1;
adjusted_mode->crtc_vsync_start -= 1;
} else
- pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */
+ pipeconf &= ~PIPECONF_INTERLACE_MASK; /* progressive */
I915_WRITE(HTOTAL(pipe),
(adjusted_mode->crtc_hdisplay - 1) |
--
1.7.7.5
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH] drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT
2012-01-26 16:18 [PATCH] drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT Daniel Vetter
@ 2012-01-26 19:42 ` Daniel Vetter
2012-01-28 11:07 ` Daniel Vetter
2012-01-28 15:52 ` Paulo Zanoni
0 siblings, 2 replies; 5+ messages in thread
From: Daniel Vetter @ 2012-01-26 19:42 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter
An identical patch has been merged for i9xx_crtc_mode_set:
ommit 59df7b1771c150163e522f33c638096ab0efbf42
Author: Christian Schmidt <schmidt@digadd.de>
Date: Mon Dec 19 20:03:33 2011 +0100
drm/intel: Fix initialization if startup happens in interlaced mode [v2]
But that one neglected to fix up the ironlake+ path.
This should fix the issue reported by Alfonso Fiore where booting with
only a HDMI cable connected to his TV failed to display anything. The
issue is that the bios set up things for 1080i and used the pannel
fitter to scale up the lower progressive resolutions. We failed to
clear the interlace bit in the PIPEACONF register, resulting in havoc.
v2: Be more paranoid and just unconditionally clear the field before
setting new values.
Cc: Peter Ross <pross@xvid.org>
Cc: Alfonso Fiore <alfonso.fiore@gmail.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/intel_display.c | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5ba19df..de26748 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5365,6 +5365,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
}
}
+ pipeconf &= ~PIPECONF_INTERLACE_MASK;
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
/* the chip adds 2 halflines automatically */
@@ -5375,7 +5376,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
adjusted_mode->crtc_vsync_end -= 1;
adjusted_mode->crtc_vsync_start -= 1;
} else
- pipeconf &= ~PIPECONF_INTERLACE_MASK; /* progressive */
+ pipeconf |= PIPECONF_PROGRESSIVE;
I915_WRITE(HTOTAL(pipe),
(adjusted_mode->crtc_hdisplay - 1) |
@@ -5957,6 +5958,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
}
}
+ pipeconf &= ~PIPECONF_INTERLACE_MASK;
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
/* the chip adds 2 halflines automatically */
@@ -5967,7 +5969,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
adjusted_mode->crtc_vsync_end -= 1;
adjusted_mode->crtc_vsync_start -= 1;
} else
- pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */
+ pipeconf |= PIPECONF_PROGRESSIVE;
I915_WRITE(HTOTAL(pipe),
(adjusted_mode->crtc_hdisplay - 1) |
--
1.7.7.5
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT
2012-01-26 19:42 ` Daniel Vetter
@ 2012-01-28 11:07 ` Daniel Vetter
2012-01-29 1:39 ` Keith Packard
2012-01-28 15:52 ` Paulo Zanoni
1 sibling, 1 reply; 5+ messages in thread
From: Daniel Vetter @ 2012-01-28 11:07 UTC (permalink / raw)
To: Intel Graphics Development, Keith Packard; +Cc: Daniel Vetter
On Thu, Jan 26, 2012 at 08:42:50PM +0100, Daniel Vetter wrote:
> An identical patch has been merged for i9xx_crtc_mode_set:
>
> ommit 59df7b1771c150163e522f33c638096ab0efbf42
> Author: Christian Schmidt <schmidt@digadd.de>
> Date: Mon Dec 19 20:03:33 2011 +0100
>
> drm/intel: Fix initialization if startup happens in interlaced mode [v2]
>
> But that one neglected to fix up the ironlake+ path.
>
> This should fix the issue reported by Alfonso Fiore where booting with
> only a HDMI cable connected to his TV failed to display anything. The
> issue is that the bios set up things for 1080i and used the pannel
> fitter to scale up the lower progressive resolutions. We failed to
> clear the interlace bit in the PIPEACONF register, resulting in havoc.
>
> v2: Be more paranoid and just unconditionally clear the field before
> setting new values.
>
> Cc: Peter Ross <pross@xvid.org>
> Cc: Alfonso Fiore <alfonso.fiore@gmail.com>
> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Hi Keith,
Alfonso reported back that this does indeed fix up his "black screen on
boot" issues when the bios sets up the hdmi connector with an interlaced
mode. Can you pick this patch up for -fixes if it musters your review?
Tested-by: Alfonso Fiore <alfonso.fiore@gmail.com>
Thanks, Daniel
--
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT
2012-01-26 19:42 ` Daniel Vetter
2012-01-28 11:07 ` Daniel Vetter
@ 2012-01-28 15:52 ` Paulo Zanoni
1 sibling, 0 replies; 5+ messages in thread
From: Paulo Zanoni @ 2012-01-28 15:52 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Intel Graphics Development
2012/1/26 Daniel Vetter <daniel.vetter@ffwll.ch>:
> An identical patch has been merged for i9xx_crtc_mode_set:
>
> ommit 59df7b1771c150163e522f33c638096ab0efbf42
> Author: Christian Schmidt <schmidt@digadd.de>
> Date: Mon Dec 19 20:03:33 2011 +0100
>
> drm/intel: Fix initialization if startup happens in interlaced mode [v2]
>
> But that one neglected to fix up the ironlake+ path.
>
> This should fix the issue reported by Alfonso Fiore where booting with
> only a HDMI cable connected to his TV failed to display anything. The
> issue is that the bios set up things for 1080i and used the pannel
> fitter to scale up the lower progressive resolutions. We failed to
> clear the interlace bit in the PIPEACONF register, resulting in havoc.
>
> v2: Be more paranoid and just unconditionally clear the field before
> setting new values.
>
> Cc: Peter Ross <pross@xvid.org>
> Cc: Alfonso Fiore <alfonso.fiore@gmail.com>
> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
I didn't experience Alfonso's problem, but tested this patch with the
interlaced series. Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
--
Paulo Zanoni
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT
2012-01-28 11:07 ` Daniel Vetter
@ 2012-01-29 1:39 ` Keith Packard
0 siblings, 0 replies; 5+ messages in thread
From: Keith Packard @ 2012-01-29 1:39 UTC (permalink / raw)
To: Daniel Vetter, Intel Graphics Development; +Cc: Daniel Vetter
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On Sat, 28 Jan 2012 12:07:55 +0100, Daniel Vetter <daniel@ffwll.ch> wrote:
> Alfonso reported back that this does indeed fix up his "black screen on
> boot" issues when the bios sets up the hdmi connector with an interlaced
> mode. Can you pick this patch up for -fixes if it musters your review?
Looks good. I've checked this with the docs; the (6 << 21) value used
before seems completely random, the new value (7 << 21) looks correct.
Merged to drm-intel-fixes.
--
keith.packard@intel.com
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Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2012-01-26 16:18 [PATCH] drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT Daniel Vetter
2012-01-26 19:42 ` Daniel Vetter
2012-01-28 11:07 ` Daniel Vetter
2012-01-29 1:39 ` Keith Packard
2012-01-28 15:52 ` Paulo Zanoni
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