From: Torbjorn Granlund <tg@gmplib.org>
To: Alexander Graf <agraf@suse.de>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH] PPC: Depend behavior of cmp instructions only on instruction encoding
Date: Wed, 08 May 2013 15:49:41 +0200 [thread overview]
Message-ID: <86wqr9lgy2.fsf@shell.gmplib.org> (raw)
In-Reply-To: <1368019560-25218-1-git-send-email-agraf@suse.de> (Alexander Graf's message of "Wed\, 8 May 2013 15\:26\:00 +0200")
Alexander Graf <agraf@suse.de> writes:
Reported-by: Torbjorn Granlund <tg@gmplib.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Ah, so my original patch was correct after all.
Only the name of the author needed changing, apparently. :-)
---
target-ppc/translate.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index a018616..89a4445 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -675,7 +675,7 @@ static inline void gen_set_Rc0(DisasContext *ctx, TCGv reg)
/* cmp */
static void gen_cmp(DisasContext *ctx)
{
- if (NARROW_MODE(ctx) || !(ctx->opcode & 0x00200000)) {
+ if (!(ctx->opcode & 0x00200000)) {
gen_op_cmp32(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)],
1, crfD(ctx->opcode));
} else {
@@ -687,7 +687,7 @@ static void gen_cmp(DisasContext *ctx)
/* cmpi */
static void gen_cmpi(DisasContext *ctx)
{
- if (NARROW_MODE(ctx) || !(ctx->opcode & 0x00200000)) {
+ if (!(ctx->opcode & 0x00200000)) {
gen_op_cmpi32(cpu_gpr[rA(ctx->opcode)], SIMM(ctx->opcode),
1, crfD(ctx->opcode));
} else {
@@ -699,7 +699,7 @@ static void gen_cmpi(DisasContext *ctx)
/* cmpl */
static void gen_cmpl(DisasContext *ctx)
{
- if (NARROW_MODE(ctx) || !(ctx->opcode & 0x00200000)) {
+ if (!(ctx->opcode & 0x00200000)) {
gen_op_cmp32(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)],
0, crfD(ctx->opcode));
} else {
@@ -711,7 +711,7 @@ static void gen_cmpl(DisasContext *ctx)
/* cmpli */
static void gen_cmpli(DisasContext *ctx)
{
- if (NARROW_MODE(ctx) || !(ctx->opcode & 0x00200000)) {
+ if (!(ctx->opcode & 0x00200000)) {
gen_op_cmpi32(cpu_gpr[rA(ctx->opcode)], UIMM(ctx->opcode),
0, crfD(ctx->opcode));
} else {
Hopefully my cmp speedup patch will be reposted under a new name and
then included.
--
Torbjörn
next prev parent reply other threads:[~2013-05-08 13:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-08 13:26 [Qemu-devel] [PATCH] PPC: Depend behavior of cmp instructions only on instruction encoding Alexander Graf
2013-05-08 13:30 ` Richard Henderson
2013-05-08 13:49 ` Torbjorn Granlund [this message]
2013-05-08 13:51 ` Alexander Graf
2013-05-08 14:25 ` Aurelien Jarno
2013-05-08 14:48 ` Torbjorn Granlund
2013-05-08 15:04 ` Aurelien Jarno
2013-05-08 15:54 ` Torbjorn Granlund
2013-05-08 16:16 ` Aurelien Jarno
2013-05-08 16:31 ` Torbjorn Granlund
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