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From: Robert Jarzmik <robert.jarzmik@free.fr>
To: Ivan Djelic <ivan.djelic@parrot.com>
Cc: Marek Vasut <marek.vasut@gmail.com>,
	Mike Dunn <mikedunn@newsguy.com>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>
Subject: Re: [PATCH] Add driver for M-sys / Sandisk diskonchip G4 nand flash
Date: Thu, 13 Oct 2011 08:58:53 +0200	[thread overview]
Message-ID: <871uuhl6mq.fsf@free.fr> (raw)
In-Reply-To: <20111012184903.GA9535@parrot.com> (Ivan Djelic's message of "Wed, 12 Oct 2011 20:49:03 +0200")

Ivan Djelic <ivan.djelic@parrot.com> writes:

> On Tue, Oct 11, 2011 at 08:17:22PM +0100, Mike Dunn wrote:
>> On 10/11/2011 04:50 AM, Ivan Djelic wrote:
>> >
>> > After a more careful examination, I believe your hardware gives you
>> > recv_ecc^calc_ecc
>> 
>> It might be a little more complicated.
>
> Well, thanks to your ecc samples I have the answer now; the hardware does
> provide recv_ecc^calc_ecc, with a little twist: a parity code in inserted into
> data before performing BCH remainder computations.
> Here is a more precise description:
>
> writing algorithm:
> -----------------
> 1. 512 bytes of data are sent to HW generator
> 2. 7 bytes of user data (oob[0] to oob[6]) are sent to HW generator
> 3. A Hamming (?) parity byte is generated (from oob[0]...oob[6]?) and sent to
>    HW generator
> 4. The BCH engine completes its polynomial remainder computation on the above
>    520 bytes
>
> Note that the HW generator reads and writes bytes in reversed bit order.
>
> I don't really know how the parity byte in step 3 is generated, or what its
> purpose is; it may be there to allow oob reading without performing a full BCH
> decode, but the code seems too small to me to protect anything in a useful way.
> The nice thing is, we don't really need this code to perform BCH decoding.
Hi Ivan,

For the lonely parity byte, I can confirm it's a Hamming parity over 7
bytes. This parity byte is generated by the hardware as well when the page is
written :
 - 512 bytes of data are written into the page
 - then 7 bytes of OOB are written
 - then the "Hamming HW register is read" => we get the ECC back
   => this is the generation you're talking about
 - then 1 byte of OOB is written => we write the Hamming ECC
 - then 7 bytes of BCH ECC registers are read
 - then 7 bytes of BCH ECC are written
 - then 1 byte (dummy byte) is written

The exciting part is that with Mike and your work, I know what the unexplained
'7' now means, and that I can add the ECC checks to docg3 :)

Cheers.

--
Robert

  parent reply	other threads:[~2011-10-13  6:59 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-10-10 14:48 [PATCH] Add driver for M-sys / Sandisk diskonchip G4 nand flash Mike Dunn
2011-10-10 15:51 ` Marek Vasut
2011-10-10 18:12   ` Ivan Djelic
2011-10-10 21:02     ` Mike Dunn
2011-10-11 11:50       ` Ivan Djelic
2011-10-11 19:17         ` Mike Dunn
2011-10-12 18:49           ` Ivan Djelic
2011-10-13  1:18             ` Mike Dunn
2011-10-13  6:58             ` Robert Jarzmik [this message]
2011-10-13  8:37               ` Ivan Djelic
2011-10-13 15:52                 ` Mike Dunn
2011-10-10 20:20   ` Mike Dunn
2011-10-12 21:28 ` Robert Jarzmik
2011-10-13  0:26   ` Marek Vasut
2011-10-13  2:25     ` Mike Dunn
2011-10-13  1:53   ` Mike Dunn
2011-10-17 21:45   ` Mike Dunn
2011-10-20 16:31     ` Artem Bityutskiy
2011-10-20 19:57       ` Mike Dunn

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