From: Thomas Gleixner <tglx@kernel.org>
To: Andrew Jones <andrew.jones@oss.qualcomm.com>,
linux-riscv@lists.infradead.org, iommu@lists.linux.dev
Cc: linux-kernel@vger.kernel.org, tomasz.jeznach@linux.dev,
tjeznach@rivosinc.com, jgg@ziepe.ca, jgg@nvidia.com,
joro@8bytes.org, will@kernel.org, robin.murphy@arm.com,
pjw@kernel.org, palmer@dabbelt.com, anup@brainfault.org,
kevin.tian@intel.com, fangyu.yu@linux.alibaba.com
Subject: Re: [PATCH v3 07/19] iommu/riscv: Add IRQ domain for interrupt remapping
Date: Fri, 07 Aug 2026 22:36:43 +0200 [thread overview]
Message-ID: <8733wpekh0.ffs@fw13> (raw)
In-Reply-To: <875x1lekog.ffs@fw13>
On Fri, Aug 07 2026 at 22:32, Thomas Gleixner wrote:
> On Fri, Aug 07 2026 at 20:17, Andrew Jones wrote:
>> +static int riscv_iommu_ir_irq_domain_alloc_irqs(struct irq_domain *irqdomain,
>> + unsigned int irq_base, unsigned int nr_irqs,
>> + void *arg)
>> +{
>> + struct irq_data *data;
>> + int i, ret;
>> +
>> + ret = irq_domain_alloc_irqs_parent(irqdomain, irq_base, nr_irqs, arg);
>> + if (ret)
>> + return ret;
>> +
>> + for (i = 0; i < nr_irqs; i++) {
>
> for (unsigned int i = 0; .....
>
> nr_irqs is unsigned after all
>
> The struct irq_data declaration want's to be inside the loop as that's
> the scope where it is used.
>
>> + data = irq_domain_get_irq_data(irqdomain, irq_base + i);
>
>
>> + data->chip = &riscv_iommu_ir_irq_chip;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static const struct irq_domain_ops riscv_iommu_ir_irq_domain_ops = {
>> + .alloc = riscv_iommu_ir_irq_domain_alloc_irqs,
>> + .free = irq_domain_free_irqs_parent,
>
> https://docs.kernel.org/process/maintainer-tip.html#struct-declarations-and-initializers
>
>> +};
>> +
>> +static const struct msi_parent_ops riscv_iommu_ir_msi_parent_ops = {
>> + .prefix = "IR-",
>> + .supported_flags = MSI_GENERIC_FLAGS_MASK |
>> + MSI_FLAG_PCI_MSIX,
>> + .required_flags = MSI_FLAG_USE_DEF_DOM_OPS |
>> + MSI_FLAG_USE_DEF_CHIP_OPS |
>> + MSI_FLAG_PCI_MSI_MASK_PARENT,
>> + .chip_flags = MSI_CHIP_FLAG_SET_ACK,
>> + .init_dev_msi_info = msi_parent_init_dev_msi_info,
>> +};
>> +
>> +struct irq_domain *riscv_iommu_ir_irq_domain_create(struct device *dev,
>> + struct riscv_iommu_info *info)
>
> You have 100 characters, please use them.
Oops. Just noticed, that this is IOMMU territory. So whatever the IOMMU
maintainers prefer :)
WARNING: multiple messages have this Message-ID (diff)
From: Thomas Gleixner <tglx@kernel.org>
To: Andrew Jones <andrew.jones@oss.qualcomm.com>,
linux-riscv@lists.infradead.org, iommu@lists.linux.dev
Cc: linux-kernel@vger.kernel.org, tomasz.jeznach@linux.dev,
tjeznach@rivosinc.com, jgg@ziepe.ca, jgg@nvidia.com,
joro@8bytes.org, will@kernel.org, robin.murphy@arm.com,
pjw@kernel.org, palmer@dabbelt.com, anup@brainfault.org,
kevin.tian@intel.com, fangyu.yu@linux.alibaba.com
Subject: Re: [PATCH v3 07/19] iommu/riscv: Add IRQ domain for interrupt remapping
Date: Fri, 07 Aug 2026 22:36:43 +0200 [thread overview]
Message-ID: <8733wpekh0.ffs@fw13> (raw)
In-Reply-To: <875x1lekog.ffs@fw13>
On Fri, Aug 07 2026 at 22:32, Thomas Gleixner wrote:
> On Fri, Aug 07 2026 at 20:17, Andrew Jones wrote:
>> +static int riscv_iommu_ir_irq_domain_alloc_irqs(struct irq_domain *irqdomain,
>> + unsigned int irq_base, unsigned int nr_irqs,
>> + void *arg)
>> +{
>> + struct irq_data *data;
>> + int i, ret;
>> +
>> + ret = irq_domain_alloc_irqs_parent(irqdomain, irq_base, nr_irqs, arg);
>> + if (ret)
>> + return ret;
>> +
>> + for (i = 0; i < nr_irqs; i++) {
>
> for (unsigned int i = 0; .....
>
> nr_irqs is unsigned after all
>
> The struct irq_data declaration want's to be inside the loop as that's
> the scope where it is used.
>
>> + data = irq_domain_get_irq_data(irqdomain, irq_base + i);
>
>
>> + data->chip = &riscv_iommu_ir_irq_chip;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static const struct irq_domain_ops riscv_iommu_ir_irq_domain_ops = {
>> + .alloc = riscv_iommu_ir_irq_domain_alloc_irqs,
>> + .free = irq_domain_free_irqs_parent,
>
> https://docs.kernel.org/process/maintainer-tip.html#struct-declarations-and-initializers
>
>> +};
>> +
>> +static const struct msi_parent_ops riscv_iommu_ir_msi_parent_ops = {
>> + .prefix = "IR-",
>> + .supported_flags = MSI_GENERIC_FLAGS_MASK |
>> + MSI_FLAG_PCI_MSIX,
>> + .required_flags = MSI_FLAG_USE_DEF_DOM_OPS |
>> + MSI_FLAG_USE_DEF_CHIP_OPS |
>> + MSI_FLAG_PCI_MSI_MASK_PARENT,
>> + .chip_flags = MSI_CHIP_FLAG_SET_ACK,
>> + .init_dev_msi_info = msi_parent_init_dev_msi_info,
>> +};
>> +
>> +struct irq_domain *riscv_iommu_ir_irq_domain_create(struct device *dev,
>> + struct riscv_iommu_info *info)
>
> You have 100 characters, please use them.
Oops. Just noticed, that this is IOMMU territory. So whatever the IOMMU
maintainers prefer :)
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next prev parent reply other threads:[~2026-08-07 20:36 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-07 18:16 [PATCH v3 00/19] iommu/riscv: Enable MSI remapping, IOMMU_DMA and VFIO Andrew Jones
2026-08-07 18:16 ` Andrew Jones
2026-08-07 18:16 ` [PATCH v3 01/19] iommufd: Convert struct iommufd_sw_msi_maps to a growable bitmap Andrew Jones
2026-08-07 18:16 ` Andrew Jones
2026-08-07 18:16 ` [PATCH v3 02/19] iommufd: Add iommufd_sw_map_msi() Andrew Jones
2026-08-07 18:16 ` Andrew Jones
2026-08-07 18:16 ` [PATCH v3 03/19] iommu/dma: Add iommu_dma_sw_map_msi() Andrew Jones
2026-08-07 18:16 ` Andrew Jones
2026-08-07 18:16 ` [PATCH v3 04/19] iommu/dma: Add iommu_dma_map_msi() Andrew Jones
2026-08-07 18:16 ` Andrew Jones
2026-08-07 18:16 ` [PATCH v3 05/19] genirq/msi: Provide DOMAIN_BUS_MSI_REMAP Andrew Jones
2026-08-07 18:16 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 06/19] irqchip/riscv-imsic: Compose MSI updates through the hierarchy Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 20:25 ` Thomas Gleixner
2026-08-07 20:25 ` Thomas Gleixner
2026-08-10 8:01 ` Andrew Jones
2026-08-10 8:01 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 07/19] iommu/riscv: Add IRQ domain for interrupt remapping Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 20:32 ` Thomas Gleixner
2026-08-07 20:32 ` Thomas Gleixner
2026-08-07 20:36 ` Thomas Gleixner [this message]
2026-08-07 20:36 ` Thomas Gleixner
2026-08-10 8:11 ` Andrew Jones
2026-08-10 8:11 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 08/19] iommu/riscv: Prepare info->domain for concurrent RCU read access Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 09/19] iommu/riscv: Publish IOMMU_RESV_SW_MSI region for iommufd MSI remapping Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 10/19] iommu/riscv: Pre-map IMSIC MSI targets Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 11/19] iommu/riscv: Copy MSI IOVA table when replacing an iommufd domain Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 12/19] iommu/riscv: Gate identity boundary switches with live MSIs Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 13/19] iommu/riscv: Implement irq_compose_msi_msg for IMSIC remapping Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 14/19] iommu/dma: Enable IOMMU_DMA for 64-bit RISC-V Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 15/19] iommu/riscv: report iommu capabilities Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 16/19] vfio: enable IOMMU_TYPE1 for RISC-V Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 17/19] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 18/19] riscv: defconfig: Enable IOMMUFD and VFIO Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 19/19] selftests/vfio: Allow building on RISC-V Andrew Jones
2026-08-07 18:17 ` Andrew Jones
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