From: Thomas Gleixner <tglx@kernel.org>
To: Andrew Jones <andrew.jones@oss.qualcomm.com>,
linux-riscv@lists.infradead.org, iommu@lists.linux.dev
Cc: linux-kernel@vger.kernel.org, tomasz.jeznach@linux.dev,
tjeznach@rivosinc.com, jgg@ziepe.ca, jgg@nvidia.com,
joro@8bytes.org, will@kernel.org, robin.murphy@arm.com,
pjw@kernel.org, palmer@dabbelt.com, anup@brainfault.org,
kevin.tian@intel.com, fangyu.yu@linux.alibaba.com
Subject: Re: [PATCH v3 06/19] irqchip/riscv-imsic: Compose MSI updates through the hierarchy
Date: Fri, 07 Aug 2026 22:25:57 +0200 [thread overview]
Message-ID: <878q6hekyy.ffs@fw13> (raw)
In-Reply-To: <20260807181713.228535-7-andrew.jones@oss.qualcomm.com>
On Fri, Aug 07 2026 at 20:17, Andrew Jones wrote:
> imsic_irq_set_affinity() wrote the new IMSIC target straight to the
Wrote? When was that?
You are describing the current state/context, so this wants to be
'write' no?
> device via imsic_msi_update_msg(), bypassing the irqdomain hierarchy.
> That skips any intermediate IOMMU irqdomain sitting between IMSIC and
Otherwise 'skips' makes no sense either.
> the device, so a remapped device would keep the pre-remap physical
> address after every affinity change.
WARNING: multiple messages have this Message-ID (diff)
From: Thomas Gleixner <tglx@kernel.org>
To: Andrew Jones <andrew.jones@oss.qualcomm.com>,
linux-riscv@lists.infradead.org, iommu@lists.linux.dev
Cc: linux-kernel@vger.kernel.org, tomasz.jeznach@linux.dev,
tjeznach@rivosinc.com, jgg@ziepe.ca, jgg@nvidia.com,
joro@8bytes.org, will@kernel.org, robin.murphy@arm.com,
pjw@kernel.org, palmer@dabbelt.com, anup@brainfault.org,
kevin.tian@intel.com, fangyu.yu@linux.alibaba.com
Subject: Re: [PATCH v3 06/19] irqchip/riscv-imsic: Compose MSI updates through the hierarchy
Date: Fri, 07 Aug 2026 22:25:57 +0200 [thread overview]
Message-ID: <878q6hekyy.ffs@fw13> (raw)
In-Reply-To: <20260807181713.228535-7-andrew.jones@oss.qualcomm.com>
On Fri, Aug 07 2026 at 20:17, Andrew Jones wrote:
> imsic_irq_set_affinity() wrote the new IMSIC target straight to the
Wrote? When was that?
You are describing the current state/context, so this wants to be
'write' no?
> device via imsic_msi_update_msg(), bypassing the irqdomain hierarchy.
> That skips any intermediate IOMMU irqdomain sitting between IMSIC and
Otherwise 'skips' makes no sense either.
> the device, so a remapped device would keep the pre-remap physical
> address after every affinity change.
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next prev parent reply other threads:[~2026-08-07 20:26 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-07 18:16 [PATCH v3 00/19] iommu/riscv: Enable MSI remapping, IOMMU_DMA and VFIO Andrew Jones
2026-08-07 18:16 ` Andrew Jones
2026-08-07 18:16 ` [PATCH v3 01/19] iommufd: Convert struct iommufd_sw_msi_maps to a growable bitmap Andrew Jones
2026-08-07 18:16 ` Andrew Jones
2026-08-07 18:16 ` [PATCH v3 02/19] iommufd: Add iommufd_sw_map_msi() Andrew Jones
2026-08-07 18:16 ` Andrew Jones
2026-08-07 18:16 ` [PATCH v3 03/19] iommu/dma: Add iommu_dma_sw_map_msi() Andrew Jones
2026-08-07 18:16 ` Andrew Jones
2026-08-07 18:16 ` [PATCH v3 04/19] iommu/dma: Add iommu_dma_map_msi() Andrew Jones
2026-08-07 18:16 ` Andrew Jones
2026-08-07 18:16 ` [PATCH v3 05/19] genirq/msi: Provide DOMAIN_BUS_MSI_REMAP Andrew Jones
2026-08-07 18:16 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 06/19] irqchip/riscv-imsic: Compose MSI updates through the hierarchy Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 20:25 ` Thomas Gleixner [this message]
2026-08-07 20:25 ` Thomas Gleixner
2026-08-10 8:01 ` Andrew Jones
2026-08-10 8:01 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 07/19] iommu/riscv: Add IRQ domain for interrupt remapping Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 20:32 ` Thomas Gleixner
2026-08-07 20:32 ` Thomas Gleixner
2026-08-07 20:36 ` Thomas Gleixner
2026-08-07 20:36 ` Thomas Gleixner
2026-08-10 8:11 ` Andrew Jones
2026-08-10 8:11 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 08/19] iommu/riscv: Prepare info->domain for concurrent RCU read access Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 09/19] iommu/riscv: Publish IOMMU_RESV_SW_MSI region for iommufd MSI remapping Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 10/19] iommu/riscv: Pre-map IMSIC MSI targets Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 11/19] iommu/riscv: Copy MSI IOVA table when replacing an iommufd domain Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 12/19] iommu/riscv: Gate identity boundary switches with live MSIs Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 13/19] iommu/riscv: Implement irq_compose_msi_msg for IMSIC remapping Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 14/19] iommu/dma: Enable IOMMU_DMA for 64-bit RISC-V Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 15/19] iommu/riscv: report iommu capabilities Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 16/19] vfio: enable IOMMU_TYPE1 for RISC-V Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 17/19] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 18/19] riscv: defconfig: Enable IOMMUFD and VFIO Andrew Jones
2026-08-07 18:17 ` Andrew Jones
2026-08-07 18:17 ` [PATCH v3 19/19] selftests/vfio: Allow building on RISC-V Andrew Jones
2026-08-07 18:17 ` Andrew Jones
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