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From: Thomas Gleixner <tglx@linutronix.de>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Renner Berthing <emil.renner.berthing@canonical.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	apatel@ventanamicro.com, Paul Walmsley <paul.walmsley@sifive.com>,
	samuel.holland@sifive.com, aou@eecs.berkeley.edu,
	daniel.lezcano@linaro.org
Subject: Re: [PATCH v1 0/9] Fix Allwinner D1 boot regression
Date: Thu, 15 Aug 2024 20:10:25 +0200	[thread overview]
Message-ID: <8734n5mzce.ffs@tglx> (raw)
In-Reply-To: <mhng-5403a4a9-4cdf-447f-9c7e-ea655a2f86fc@palmer-ri-x1c9>

On Thu, Aug 15 2024 at 10:51, Palmer Dabbelt wrote:
> On Wed, 14 Aug 2024 10:30:48 PDT (-0700), tglx@linutronix.de wrote:
>> I'm very much inclined to take the reverts right now, send them to Linus
>> for -rc5 tagged with cc: stable and ignore/nak any irqchip related riscv
>> patches until the next merge window is over.
>
> Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
>
> if you want to take the revert.

I'm happy to wait a week and see whether someone gets that CLINT hack
working or as I suggested the D1 PLIC early probe quirk.

> IIUC the patch above doesn't actually fix it, that's what led to just 
> sending the reverts -- at least reverts are better than breaking users.  
> I'll post over there too...

Right. We figured that out by now :)

> And it's no big deal if we're in the doghouse for a bit.  Regressions 
> should get fixed faster than this, so we deserve it.

For a week I consider you probationers :)

> Probably also another sign we're way too focused on getting new features 
> merged, as that's coming at the expense of making existing platforms 
> work.  IMO we've been way too focused on getting support for specs that 
> don't even have implementations, and not enough on building real working 
> systems.

RISCV is not alone with that. This whole industry is nuts about features
and forgets the stuff what matters.

Thanks,

        tglx

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WARNING: multiple messages have this Message-ID (diff)
From: Thomas Gleixner <tglx@linutronix.de>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Renner Berthing <emil.renner.berthing@canonical.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	apatel@ventanamicro.com, Paul Walmsley <paul.walmsley@sifive.com>,
	samuel.holland@sifive.com, aou@eecs.berkeley.edu,
	daniel.lezcano@linaro.org
Subject: Re: [PATCH v1 0/9] Fix Allwinner D1 boot regression
Date: Thu, 15 Aug 2024 20:10:25 +0200	[thread overview]
Message-ID: <8734n5mzce.ffs@tglx> (raw)
In-Reply-To: <mhng-5403a4a9-4cdf-447f-9c7e-ea655a2f86fc@palmer-ri-x1c9>

On Thu, Aug 15 2024 at 10:51, Palmer Dabbelt wrote:
> On Wed, 14 Aug 2024 10:30:48 PDT (-0700), tglx@linutronix.de wrote:
>> I'm very much inclined to take the reverts right now, send them to Linus
>> for -rc5 tagged with cc: stable and ignore/nak any irqchip related riscv
>> patches until the next merge window is over.
>
> Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
>
> if you want to take the revert.

I'm happy to wait a week and see whether someone gets that CLINT hack
working or as I suggested the D1 PLIC early probe quirk.

> IIUC the patch above doesn't actually fix it, that's what led to just 
> sending the reverts -- at least reverts are better than breaking users.  
> I'll post over there too...

Right. We figured that out by now :)

> And it's no big deal if we're in the doghouse for a bit.  Regressions 
> should get fixed faster than this, so we deserve it.

For a week I consider you probationers :)

> Probably also another sign we're way too focused on getting new features 
> merged, as that's coming at the expense of making existing platforms 
> work.  IMO we've been way too focused on getting support for specs that 
> don't even have implementations, and not enough on building real working 
> systems.

RISCV is not alone with that. This whole industry is nuts about features
and forgets the stuff what matters.

Thanks,

        tglx

  reply	other threads:[~2024-08-15 18:10 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-14 14:56 [PATCH v1 0/9] Fix Allwinner D1 boot regression Emil Renner Berthing
2024-08-14 14:56 ` Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 1/9] Revert "irqchip/sifive-plic: Chain to parent IRQ after handlers are ready" Emil Renner Berthing
2024-08-14 14:56   ` Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 2/9] Revert "irqchip/sifive-plic: Avoid explicit cpumask allocation on stack" Emil Renner Berthing
2024-08-14 14:56   ` Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 3/9] Revert "irqchip/sifive-plic: Improve locking safety by using irqsave/irqrestore" Emil Renner Berthing
2024-08-14 14:56   ` Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 4/9] Revert "irqchip/sifive-plic: Parse number of interrupts and contexts early in plic_probe()" Emil Renner Berthing
2024-08-14 14:56   ` Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 5/9] Revert "irqchip/sifive-plic: Cleanup PLIC contexts upon irqdomain creation failure" Emil Renner Berthing
2024-08-14 14:56   ` Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 6/9] Revert "irqchip/sifive-plic: Use riscv_get_intc_hwnode() to get parent fwnode" Emil Renner Berthing
2024-08-14 14:56   ` Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 7/9] Revert "irqchip/sifive-plic: Use devm_xyz() for managed allocation" Emil Renner Berthing
2024-08-14 14:56   ` Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 8/9] Revert "irqchip/sifive-plic: Use dev_xyz() in-place of pr_xyz()" Emil Renner Berthing
2024-08-14 14:56   ` Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 9/9] Revert "irqchip/sifive-plic: Convert PLIC driver into a platform driver" Emil Renner Berthing
2024-08-14 14:56   ` Emil Renner Berthing
2024-08-14 17:30 ` [PATCH v1 0/9] Fix Allwinner D1 boot regression Thomas Gleixner
2024-08-14 17:30   ` Thomas Gleixner
2024-08-15 10:29   ` Emil Renner Berthing
2024-08-15 10:29     ` Emil Renner Berthing
2024-08-15 11:44     ` Thomas Gleixner
2024-08-15 11:44       ` Thomas Gleixner
2024-08-15 12:04       ` Emil Renner Berthing
2024-08-15 12:04         ` Emil Renner Berthing
2024-08-15 12:14         ` Emil Renner Berthing
2024-08-15 12:14           ` Emil Renner Berthing
2024-08-15 13:16           ` Thomas Gleixner
2024-08-15 13:16             ` Thomas Gleixner
2024-08-15 13:32             ` Samuel Holland
2024-08-15 13:32               ` Samuel Holland
2024-08-15 14:11               ` Thomas Gleixner
2024-08-15 14:11                 ` Thomas Gleixner
2024-08-15 14:16                 ` Anup Patel
2024-08-15 14:16                   ` Anup Patel
2024-08-15 14:41                   ` Samuel Holland
2024-08-15 14:41                     ` Samuel Holland
2024-08-15 15:07                     ` Emil Renner Berthing
2024-08-15 15:07                       ` Emil Renner Berthing
2024-08-15 15:59                       ` Samuel Holland
2024-08-15 15:59                         ` Samuel Holland
2024-08-15 17:51                         ` Palmer Dabbelt
2024-08-15 17:51                           ` Palmer Dabbelt
2024-08-15 18:04                           ` Thomas Gleixner
2024-08-15 18:04                             ` Thomas Gleixner
2024-08-16  6:13                           ` Icenowy Zheng
2024-08-16  6:13                             ` Icenowy Zheng
2024-08-15 15:14                     ` Thomas Gleixner
2024-08-15 15:14                       ` Thomas Gleixner
2024-08-15 14:30               ` Anup Patel
2024-08-15 14:30                 ` Anup Patel
2024-08-15 15:03                 ` Samuel Holland
2024-08-15 15:03                   ` Samuel Holland
2024-08-15 15:53                   ` Anup Patel
2024-08-15 15:53                     ` Anup Patel
2024-08-16  6:09                 ` Icenowy Zheng
2024-08-16  6:09                   ` Icenowy Zheng
2024-08-15 13:35             ` Emil Renner Berthing
2024-08-15 13:35               ` Emil Renner Berthing
2024-08-15 17:51   ` Palmer Dabbelt
2024-08-15 17:51     ` Palmer Dabbelt
2024-08-15 18:10     ` Thomas Gleixner [this message]
2024-08-15 18:10       ` Thomas Gleixner
2024-08-15 23:04       ` Palmer Dabbelt
2024-08-15 23:04         ` Palmer Dabbelt
2024-08-16  6:15     ` Icenowy Zheng
2024-08-16  6:15       ` Icenowy Zheng
2024-08-18 14:47 ` Palmer Dabbelt
2024-08-18 14:47   ` Palmer Dabbelt

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