All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Suraj Kandpal <suraj.kandpal@intel.com>, intel-gfx@lists.freedesktop.org
Cc: chaitanya.kumar.borah@intel.com, uma.shankar@intel.com,
	ankit.k.nautiyal@intel.com, dnyaneshwar.bhadane@intel.com,
	Suraj Kandpal <suraj.kandpal@intel.com>
Subject: Re: [PATCH 1/2] drm/i915: Add SCLKGATE_DIS register definition
Date: Tue, 16 Apr 2024 10:38:03 +0300	[thread overview]
Message-ID: <8734rl21wk.fsf@intel.com> (raw)
In-Reply-To: <20240416072733.624048-3-suraj.kandpal@intel.com>

On Tue, 16 Apr 2024, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> Add SCLKGATE_DIS register and it's register definition which
> will be used the next patch.

Please just squash this into the next patch.

(And please don't reference "the next patch" in commit messages, because
it's meaningless once this becomes a commit in the history.)
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 3f34efcd7d6c..beec91a2f493 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6250,6 +6250,10 @@ enum skl_power_gate {
>  #define  SFUSE_STRAP_DDIC_DETECTED	(1 << 1)
>  #define  SFUSE_STRAP_DDID_DETECTED	(1 << 0)
>  
> +/* SCLKGATE_DIS */

The comment is useless.

BR,
Jani.

> +#define SCLKGATE_DIS			_MMIO(0xc2014)
> +#define  DPLS_GATING_DISABLE		REG_BIT(29)
> +
>  #define WM_MISC				_MMIO(0x45260)
>  #define  WM_MISC_DATA_PARTITION_5_6	(1 << 0)

-- 
Jani Nikula, Intel

  reply	other threads:[~2024-04-16  7:38 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-16  7:27 [PATCH 0/2] Disable DPLS Gating around PPS Suraj Kandpal
2024-04-16  7:27 ` [PATCH 1/2] drm/i915: Add SCLKGATE_DIS register definition Suraj Kandpal
2024-04-16  7:38   ` Jani Nikula [this message]
2024-04-16  7:40     ` Kandpal, Suraj
2024-04-16 12:54   ` Ville Syrjälä
2024-04-17  5:00     ` Kandpal, Suraj
2024-04-16  7:27 ` [PATCH 2/2] drm/i915/pps: Disable DPLS_GATING around pps sequence Suraj Kandpal
2024-04-16  7:41   ` Jani Nikula
2024-04-16  7:57   ` Bhadane, Dnyaneshwar
2024-04-16  8:15 ` ✗ Fi.CI.SPARSE: warning for Disable DPLS Gating around PPS Patchwork
2024-04-16  8:22 ` ✗ Fi.CI.BAT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=8734rl21wk.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=ankit.k.nautiyal@intel.com \
    --cc=chaitanya.kumar.borah@intel.com \
    --cc=dnyaneshwar.bhadane@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=suraj.kandpal@intel.com \
    --cc=uma.shankar@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.