* [Intel-gfx] [PATCH] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue
@ 2020-03-05 7:35 Chris Wilson
2020-03-05 11:41 ` Mika Kuoppala
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Chris Wilson @ 2020-03-05 7:35 UTC (permalink / raw)
To: intel-gfx
If we stop filling the ELSP due to an incompatible virtual engine
request, check if we should enable the timeslice on behalf of the queue.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 21 ++++++++++++++++-----
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 5da86a40434c..954bd4797482 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1802,6 +1802,20 @@ static void set_timeslice(struct intel_engine_cs *engine)
set_timer_ms(&engine->execlists.timer, active_timeslice(engine));
}
+static void start_timeslice(struct intel_engine_cs *engine,
+ struct i915_request *last)
+{
+ struct intel_engine_execlists *execlists = &engine->execlists;
+
+ /* As we are returning early, update the hint from the queue */
+ execlists->switch_priority_hint =
+ max(execlists->queue_priority_hint,
+ execlists->switch_priority_hint);
+
+ if (!execlists->timer.expires && need_timeslice(engine, last))
+ set_timer_ms(&execlists->timer, timeslice(engine));
+}
+
static void record_preemption(struct intel_engine_execlists *execlists)
{
(void)I915_SELFTEST_ONLY(execlists->preempt_hang.count++);
@@ -1965,11 +1979,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
* Even if ELSP[1] is occupied and not worthy
* of timeslices, our queue might be.
*/
- if (!execlists->timer.expires &&
- need_timeslice(engine, last))
- set_timer_ms(&execlists->timer,
- timeslice(engine));
-
+ start_timeslice(engine, last);
return;
}
}
@@ -2004,6 +2014,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
if (last && !can_merge_rq(last, rq)) {
spin_unlock(&ve->base.active.lock);
+ start_timeslice(engine, last);
return; /* leave this for another */
}
--
2.25.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue 2020-03-05 7:35 [Intel-gfx] [PATCH] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue Chris Wilson @ 2020-03-05 11:41 ` Mika Kuoppala 2020-03-05 13:13 ` Mika Kuoppala 2020-03-05 19:50 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for " Patchwork ` (2 subsequent siblings) 3 siblings, 1 reply; 6+ messages in thread From: Mika Kuoppala @ 2020-03-05 11:41 UTC (permalink / raw) To: Chris Wilson, intel-gfx Chris Wilson <chris@chris-wilson.co.uk> writes: > If we stop filling the ELSP due to an incompatible virtual engine > request, check if we should enable the timeslice on behalf of the queue. > Leaves me pondering more of the why. So that on these boundaries also, the last rq gets subdued to a timeslice and not get a free run? > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > --- > drivers/gpu/drm/i915/gt/intel_lrc.c | 21 ++++++++++++++++----- > 1 file changed, 16 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 5da86a40434c..954bd4797482 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -1802,6 +1802,20 @@ static void set_timeslice(struct intel_engine_cs *engine) > set_timer_ms(&engine->execlists.timer, active_timeslice(engine)); > } > > +static void start_timeslice(struct intel_engine_cs *engine, > + struct i915_request *last) > +{ > + struct intel_engine_execlists *execlists = &engine->execlists; > + > + /* As we are returning early, update the hint from the queue */ > + execlists->switch_priority_hint = > + max(execlists->queue_priority_hint, > + execlists->switch_priority_hint); > + > + if (!execlists->timer.expires && need_timeslice(engine, last)) > + set_timer_ms(&execlists->timer, timeslice(engine)); > +} > + > static void record_preemption(struct intel_engine_execlists *execlists) > { > (void)I915_SELFTEST_ONLY(execlists->preempt_hang.count++); > @@ -1965,11 +1979,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine) > * Even if ELSP[1] is occupied and not worthy > * of timeslices, our queue might be. > */ > - if (!execlists->timer.expires && > - need_timeslice(engine, last)) > - set_timer_ms(&execlists->timer, > - timeslice(engine)); > - > + start_timeslice(engine, last); > return; > } > } > @@ -2004,6 +2014,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine) > > if (last && !can_merge_rq(last, rq)) { > spin_unlock(&ve->base.active.lock); > + start_timeslice(engine, last); > return; /* leave this for another */ for another interrupt? -Mika > } > > -- > 2.25.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue 2020-03-05 11:41 ` Mika Kuoppala @ 2020-03-05 13:13 ` Mika Kuoppala 0 siblings, 0 replies; 6+ messages in thread From: Mika Kuoppala @ 2020-03-05 13:13 UTC (permalink / raw) To: Chris Wilson, intel-gfx Mika Kuoppala <mika.kuoppala@linux.intel.com> writes: > Chris Wilson <chris@chris-wilson.co.uk> writes: > >> If we stop filling the ELSP due to an incompatible virtual engine >> request, check if we should enable the timeslice on behalf of the queue. >> > > Leaves me pondering more of the why. > > So that on these boundaries also, the last rq gets subdued to > a timeslice and not get a free run? I got some confirmations on irc. Yes this for that. The commit message could be augmented on the why emphasis! > >> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> >> --- >> drivers/gpu/drm/i915/gt/intel_lrc.c | 21 ++++++++++++++++----- >> 1 file changed, 16 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c >> index 5da86a40434c..954bd4797482 100644 >> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c >> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c >> @@ -1802,6 +1802,20 @@ static void set_timeslice(struct intel_engine_cs *engine) >> set_timer_ms(&engine->execlists.timer, active_timeslice(engine)); >> } >> >> +static void start_timeslice(struct intel_engine_cs *engine, >> + struct i915_request *last) >> +{ >> + struct intel_engine_execlists *execlists = &engine->execlists; >> + >> + /* As we are returning early, update the hint from the queue */ >> + execlists->switch_priority_hint = >> + max(execlists->queue_priority_hint, >> + execlists->switch_priority_hint); Still not completely unclear how the all hints play together but the comment holds true, we bail out early. >> + >> + if (!execlists->timer.expires && need_timeslice(engine, last)) >> + set_timer_ms(&execlists->timer, timeslice(engine)); >> +} >> + >> static void record_preemption(struct intel_engine_execlists *execlists) >> { >> (void)I915_SELFTEST_ONLY(execlists->preempt_hang.count++); >> @@ -1965,11 +1979,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine) >> * Even if ELSP[1] is occupied and not worthy >> * of timeslices, our queue might be. >> */ >> - if (!execlists->timer.expires && >> - need_timeslice(engine, last)) >> - set_timer_ms(&execlists->timer, >> - timeslice(engine)); >> - >> + start_timeslice(engine, last); >> return; >> } >> } >> @@ -2004,6 +2014,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine) >> >> if (last && !can_merge_rq(last, rq)) { >> spin_unlock(&ve->base.active.lock); >> + start_timeslice(engine, last); >> return; /* leave this for another */ > > for another interrupt? For another veng. The comment might have already been augmented. Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> > -Mika > >> } >> >> -- >> 2.25.1 >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/execlists: Enable timeslice on partial virtual engine dequeue 2020-03-05 7:35 [Intel-gfx] [PATCH] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue Chris Wilson 2020-03-05 11:41 ` Mika Kuoppala @ 2020-03-05 19:50 ` Patchwork 2020-03-05 20:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-03-06 10:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2020-03-05 19:50 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: drm/i915/execlists: Enable timeslice on partial virtual engine dequeue URL : https://patchwork.freedesktop.org/series/74304/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Enable timeslice on partial virtual engine dequeue 2020-03-05 7:35 [Intel-gfx] [PATCH] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue Chris Wilson 2020-03-05 11:41 ` Mika Kuoppala 2020-03-05 19:50 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for " Patchwork @ 2020-03-05 20:28 ` Patchwork 2020-03-06 10:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2020-03-05 20:28 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: drm/i915/execlists: Enable timeslice on partial virtual engine dequeue URL : https://patchwork.freedesktop.org/series/74304/ State : success == Summary == CI Bug Log - changes from CI_DRM_8070 -> Patchwork_16833 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/index.html Known issues ------------ Here are the changes found in Patchwork_16833 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_suspend@basic-s4-devices: - fi-tgl-y: [PASS][1] -> [FAIL][2] ([CI#94]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html * igt@i915_selftest@live@gem_contexts: - fi-skl-lmem: [PASS][3] -> [INCOMPLETE][4] ([i915#424]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/fi-skl-lmem/igt@i915_selftest@live@gem_contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/fi-skl-lmem/igt@i915_selftest@live@gem_contexts.html * igt@prime_self_import@basic-llseek-size: - fi-tgl-y: [PASS][5] -> [DMESG-WARN][6] ([CI#94] / [i915#402]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/fi-tgl-y/igt@prime_self_import@basic-llseek-size.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/fi-tgl-y/igt@prime_self_import@basic-llseek-size.html #### Possible fixes #### * igt@kms_addfb_basic@addfb25-modifier-no-flag: - fi-tgl-y: [DMESG-WARN][7] ([CI#94] / [i915#402]) -> [PASS][8] +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/fi-tgl-y/igt@kms_addfb_basic@addfb25-modifier-no-flag.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/fi-tgl-y/igt@kms_addfb_basic@addfb25-modifier-no-flag.html [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424 Participating hosts (49 -> 42) ------------------------------ Additional (2): fi-kbl-soraka fi-kbl-7560u Missing (9): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-bwr-2160 fi-ilk-650 fi-ctg-p8600 fi-cfl-8109u fi-bdw-samus fi-skl-6600u Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_8070 -> Patchwork_16833 CI-20190529: 20190529 CI_DRM_8070: d4e6f8b48e361f0cae9132f50f1778707b2546a2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5495: 22df72de8affcec22d9f354bb6148d77f60cc580 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16833: 4fce90bf1b0a9a7eb1476ba2c22eec45354ff88c @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 4fce90bf1b0a drm/i915/execlists: Enable timeslice on partial virtual engine dequeue == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Enable timeslice on partial virtual engine dequeue 2020-03-05 7:35 [Intel-gfx] [PATCH] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue Chris Wilson ` (2 preceding siblings ...) 2020-03-05 20:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2020-03-06 10:57 ` Patchwork 3 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2020-03-06 10:57 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: drm/i915/execlists: Enable timeslice on partial virtual engine dequeue URL : https://patchwork.freedesktop.org/series/74304/ State : success == Summary == CI Bug Log - changes from CI_DRM_8070_full -> Patchwork_16833_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_16833_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_isolation@rcs0-s3: - shard-apl: [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +2 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-apl2/igt@gem_ctx_isolation@rcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-apl8/igt@gem_ctx_isolation@rcs0-s3.html * igt@gem_ctx_shared@exec-shared-gtt-default: - shard-tglb: [PASS][3] -> [FAIL][4] ([i915#616]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-tglb7/igt@gem_ctx_shared@exec-shared-gtt-default.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-tglb1/igt@gem_ctx_shared@exec-shared-gtt-default.html * igt@gem_exec_capture@capture-bsd2: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276]) +7 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb2/igt@gem_exec_capture@capture-bsd2.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb5/igt@gem_exec_capture@capture-bsd2.html * igt@gem_exec_schedule@implicit-read-write-bsd1: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276] / [i915#677]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb4/igt@gem_exec_schedule@implicit-read-write-bsd1.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb7/igt@gem_exec_schedule@implicit-read-write-bsd1.html * igt@gem_exec_schedule@pi-shared-iova-bsd: - shard-iclb: [PASS][9] -> [SKIP][10] ([i915#677]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb6/igt@gem_exec_schedule@pi-shared-iova-bsd.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb1/igt@gem_exec_schedule@pi-shared-iova-bsd.html * igt@gem_exec_schedule@wide-bsd: - shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +4 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb8/igt@gem_exec_schedule@wide-bsd.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb4/igt@gem_exec_schedule@wide-bsd.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-iclb: [PASS][13] -> [FAIL][14] ([i915#644]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb4/igt@gem_ppgtt@flink-and-close-vma-leak.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb2/igt@gem_ppgtt@flink-and-close-vma-leak.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: - shard-skl: [PASS][15] -> [FAIL][16] ([i915#49]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-skl10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-skl2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +3 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-glk: [PASS][19] -> [FAIL][20] ([i915#899]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-glk8/igt@kms_plane_lowres@pipe-a-tiling-x.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-glk7/igt@kms_plane_lowres@pipe-a-tiling-x.html * igt@kms_psr2_su@page_flip: - shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109642] / [fdo#111068]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb2/igt@kms_psr2_su@page_flip.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb5/igt@kms_psr2_su@page_flip.html * igt@kms_psr@psr2_cursor_plane_move: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) +1 similar issue [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb1/igt@kms_psr@psr2_cursor_plane_move.html * igt@kms_setmode@basic: - shard-kbl: [PASS][25] -> [FAIL][26] ([i915#31]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-kbl7/igt@kms_setmode@basic.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-kbl6/igt@kms_setmode@basic.html * igt@perf_pmu@busy-vcs1: - shard-iclb: [PASS][27] -> [SKIP][28] ([fdo#112080]) +6 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb1/igt@perf_pmu@busy-vcs1.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb5/igt@perf_pmu@busy-vcs1.html #### Possible fixes #### * igt@gem_ctx_persistence@legacy-engines-mixed-process@blt: - shard-tglb: [INCOMPLETE][29] -> [PASS][30] [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-tglb6/igt@gem_ctx_persistence@legacy-engines-mixed-process@blt.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-tglb8/igt@gem_ctx_persistence@legacy-engines-mixed-process@blt.html * igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd2: - shard-tglb: [FAIL][31] ([i915#679]) -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-tglb6/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd2.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-tglb8/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd2.html * igt@gem_exec_parallel@vcs1-fds: - shard-iclb: [SKIP][33] ([fdo#112080]) -> [PASS][34] +7 similar issues [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb7/igt@gem_exec_parallel@vcs1-fds.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb4/igt@gem_exec_parallel@vcs1-fds.html * igt@gem_exec_schedule@out-order-bsd2: - shard-iclb: [SKIP][35] ([fdo#109276]) -> [PASS][36] +13 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb8/igt@gem_exec_schedule@out-order-bsd2.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb4/igt@gem_exec_schedule@out-order-bsd2.html * igt@gem_exec_schedule@pi-distinct-iova-bsd: - shard-iclb: [SKIP][37] ([i915#677]) -> [PASS][38] +1 similar issue [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb4/igt@gem_exec_schedule@pi-distinct-iova-bsd.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb7/igt@gem_exec_schedule@pi-distinct-iova-bsd.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [SKIP][39] ([fdo#112146]) -> [PASS][40] +1 similar issue [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb7/igt@gem_exec_schedule@reorder-wide-bsd.html * igt@i915_pm_dc@dc5-dpms: - shard-iclb: [FAIL][41] ([i915#447]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb3/igt@i915_pm_dc@dc5-dpms.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb5/igt@i915_pm_dc@dc5-dpms.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-kbl: [DMESG-WARN][43] ([i915#180]) -> [PASS][44] +1 similar issue [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-skl: [FAIL][45] ([IGT#5]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-hsw: [INCOMPLETE][47] ([i915#61]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-hsw2/igt@kms_flip@flip-vs-suspend-interruptible.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-hsw1/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [FAIL][49] ([i915#1188]) -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-skl2/igt@kms_hdr@bpc-switch-dpms.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-skl7/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: - shard-apl: [DMESG-WARN][51] ([i915#180]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [FAIL][53] ([fdo#108145]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html * igt@kms_psr@psr2_cursor_render: - shard-iclb: [SKIP][55] ([fdo#109441]) -> [PASS][56] +2 similar issues [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb4/igt@kms_psr@psr2_cursor_render.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb2/igt@kms_psr@psr2_cursor_render.html * igt@kms_setmode@basic: - shard-skl: [FAIL][57] ([i915#31]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-skl10/igt@kms_setmode@basic.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-skl5/igt@kms_setmode@basic.html - shard-glk: [FAIL][59] ([i915#31]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-glk8/igt@kms_setmode@basic.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-glk7/igt@kms_setmode@basic.html #### Warnings #### * igt@gem_exec_schedule@pi-userfault-bsd1: - shard-iclb: [INCOMPLETE][61] ([i915#1381]) -> [SKIP][62] ([fdo#109276]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb2/igt@gem_exec_schedule@pi-userfault-bsd1.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-iclb5/igt@gem_exec_schedule@pi-userfault-bsd1.html * igt@gem_userptr_blits@sync-unmap-cycles: - shard-hsw: [DMESG-WARN][63] ([fdo#111870]) -> [DMESG-WARN][64] ([fdo#110789] / [fdo#111870]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-hsw2/igt@gem_userptr_blits@sync-unmap-cycles.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-hsw2/igt@gem_userptr_blits@sync-unmap-cycles.html * igt@i915_module_load@reload: - shard-kbl: [INCOMPLETE][65] ([fdo#103665]) -> [INCOMPLETE][66] ([fdo#103665] / [i915#1390]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-kbl1/igt@i915_module_load@reload.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-kbl7/igt@i915_module_load@reload.html - shard-apl: [INCOMPLETE][67] ([fdo#103927]) -> [INCOMPLETE][68] ([fdo#103927] / [i915#1390]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-apl6/igt@i915_module_load@reload.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-apl6/igt@i915_module_load@reload.html * igt@i915_pm_dc@dc6-psr: - shard-tglb: [SKIP][69] ([i915#468]) -> [FAIL][70] ([i915#454]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-tglb2/igt@i915_pm_dc@dc6-psr.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/shard-tglb3/igt@i915_pm_dc@dc6-psr.html [IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870 [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080 [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146 [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188 [i915#1381]: https://gitlab.freedesktop.org/drm/intel/issues/1381 [i915#1390]: https://gitlab.freedesktop.org/drm/intel/issues/1390 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31 [i915#447]: https://gitlab.freedesktop.org/drm/intel/issues/447 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468 [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49 [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61 [i915#616]: https://gitlab.freedesktop.org/drm/intel/issues/616 [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644 [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677 [i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679 [i915#899]: https://gitlab.freedesktop.org/drm/intel/issues/899 Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_8070 -> Patchwork_16833 CI-20190529: 20190529 CI_DRM_8070: d4e6f8b48e361f0cae9132f50f1778707b2546a2 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5495: 22df72de8affcec22d9f354bb6148d77f60cc580 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16833: 4fce90bf1b0a9a7eb1476ba2c22eec45354ff88c @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16833/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-03-06 10:57 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2020-03-05 7:35 [Intel-gfx] [PATCH] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue Chris Wilson 2020-03-05 11:41 ` Mika Kuoppala 2020-03-05 13:13 ` Mika Kuoppala 2020-03-05 19:50 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for " Patchwork 2020-03-05 20:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-03-06 10:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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