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* [PATCH] drm/panel: Fix ARM Versatile panel clocks
@ 2018-02-08  9:53 Linus Walleij
  2018-02-08 10:50 ` Eric Anholt
  0 siblings, 1 reply; 3+ messages in thread
From: Linus Walleij @ 2018-02-08  9:53 UTC (permalink / raw)
  To: Thierry Reding, dri-devel

These clocks are in kHz not in Hz, oops. Fix it so my
new bandwidth calculations patch starts working with these
panels.

Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/gpu/drm/panel/panel-arm-versatile.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-arm-versatile.c b/drivers/gpu/drm/panel/panel-arm-versatile.c
index 3930b4925b15..35707d0ae6b0 100644
--- a/drivers/gpu/drm/panel/panel-arm-versatile.c
+++ b/drivers/gpu/drm/panel/panel-arm-versatile.c
@@ -132,7 +132,7 @@ static const struct versatile_panel_type versatile_panels[] = {
 		.width_mm = 79,
 		.height_mm = 54,
 		.mode = {
-			.clock = 10000000,
+			.clock = 10000,
 			.hdisplay = 320,
 			.hsync_start = 320 + 6,
 			.hsync_end = 320 + 6 + 6,
@@ -156,7 +156,7 @@ static const struct versatile_panel_type versatile_panels[] = {
 		.width_mm = 171,
 		.height_mm = 130,
 		.mode = {
-			.clock = 25000000,
+			.clock = 25000,
 			.hdisplay = 640,
 			.hsync_start = 640 + 24,
 			.hsync_end = 640 + 24 + 96,
@@ -179,7 +179,7 @@ static const struct versatile_panel_type versatile_panels[] = {
 		.width_mm = 34,
 		.height_mm = 45,
 		.mode = {
-			.clock = 625000000,
+			.clock = 625000,
 			.hdisplay = 176,
 			.hsync_start = 176 + 2,
 			.hsync_end = 176 + 2 + 3,
@@ -203,7 +203,7 @@ static const struct versatile_panel_type versatile_panels[] = {
 		.width_mm = 37,
 		.height_mm = 50,
 		.mode = {
-			.clock = 5400000,
+			.clock = 5400,
 			.hdisplay = 240,
 			.hsync_start = 240 + 10,
 			.hsync_end = 240 + 10 + 10,
-- 
2.14.3

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^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] drm/panel: Fix ARM Versatile panel clocks
  2018-02-08  9:53 [PATCH] drm/panel: Fix ARM Versatile panel clocks Linus Walleij
@ 2018-02-08 10:50 ` Eric Anholt
  2018-02-11 10:53   ` Linus Walleij
  0 siblings, 1 reply; 3+ messages in thread
From: Eric Anholt @ 2018-02-08 10:50 UTC (permalink / raw)
  To: Linus Walleij, Thierry Reding, dri-devel


[-- Attachment #1.1: Type: text/plain, Size: 1629 bytes --]

Linus Walleij <linus.walleij@linaro.org> writes:

> These clocks are in kHz not in Hz, oops. Fix it so my
> new bandwidth calculations patch starts working with these
> panels.
>
> Cc: Eric Anholt <eric@anholt.net>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  drivers/gpu/drm/panel/panel-arm-versatile.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-arm-versatile.c b/drivers/gpu/drm/panel/panel-arm-versatile.c
> index 3930b4925b15..35707d0ae6b0 100644
> --- a/drivers/gpu/drm/panel/panel-arm-versatile.c
> +++ b/drivers/gpu/drm/panel/panel-arm-versatile.c
> @@ -132,7 +132,7 @@ static const struct versatile_panel_type versatile_panels[] = {
>  		.width_mm = 79,
>  		.height_mm = 54,
>  		.mode = {
> -			.clock = 10000000,
> +			.clock = 10000,
>  			.hdisplay = 320,
>  			.hsync_start = 320 + 6,
>  			.hsync_end = 320 + 6 + 6,
> @@ -156,7 +156,7 @@ static const struct versatile_panel_type versatile_panels[] = {
>  		.width_mm = 171,
>  		.height_mm = 130,
>  		.mode = {
> -			.clock = 25000000,
> +			.clock = 25000,
>  			.hdisplay = 640,
>  			.hsync_start = 640 + 24,
>  			.hsync_end = 640 + 24 + 96,
> @@ -179,7 +179,7 @@ static const struct versatile_panel_type versatile_panels[] = {
>  		.width_mm = 34,
>  		.height_mm = 45,
>  		.mode = {
> -			.clock = 625000000,
> +			.clock = 625000,

625000kHz still seems really suspicious.  The fbdev driver does:

	clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000);

which seems really strange to me -- set the clock rate lower as pixclock
increases?  What's going on here?

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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] drm/panel: Fix ARM Versatile panel clocks
  2018-02-08 10:50 ` Eric Anholt
@ 2018-02-11 10:53   ` Linus Walleij
  0 siblings, 0 replies; 3+ messages in thread
From: Linus Walleij @ 2018-02-11 10:53 UTC (permalink / raw)
  To: Eric Anholt; +Cc: Thierry Reding, open list:DRM PANEL DRIVERS

On Thu, Feb 8, 2018 at 11:50 AM, Eric Anholt <eric@anholt.net> wrote:

>> -                     .clock = 625000000,
>> +                     .clock = 625000,
>
> 625000kHz still seems really suspicious.

Right, an order of magnitude typo on my part :(
It is even correct in the fbdev driver.

I sent a v2 fixing it.

>  The fbdev driver does:
>
>         clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000);
>
> which seems really strange to me -- set the clock rate lower as pixclock
> increases?  What's going on here?

That is regs.pixclock from struct clcd_regs in <linux/amba/clcd.h>,
i.e. the register value of the pixel clock, not the mode info.
So it makes sense: calculates the frequency in Hz and set that
to the clock (the AUX oscillator, as this driver is not even making
use of the clock divider).

Yours,
Linus Walleij
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^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2018-02-11 10:53 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2018-02-08  9:53 [PATCH] drm/panel: Fix ARM Versatile panel clocks Linus Walleij
2018-02-08 10:50 ` Eric Anholt
2018-02-11 10:53   ` Linus Walleij

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