* [PATCH v5 1/6] drm/i915/alpm: Move alpm parameters from intel_psr
2024-05-20 10:48 [PATCH v5 0/6] Link off between frames for edp Animesh Manna
@ 2024-05-20 10:48 ` Animesh Manna
2024-05-20 10:48 ` [PATCH v5 2/6] drm/i915/alpm: Move alpm related code to a new file Animesh Manna
` (8 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Animesh Manna @ 2024-05-20 10:48 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, jani.nikula, jouni.hogander, arun.r.murthy,
Animesh Manna
ALPM can be enabled for non psr panel and currenly aplm-params are
encapsulated under intel_psr struct, so moving out to intel_dp struct.
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
.../drm/i915/display/intel_display_types.h | 21 +++++----
drivers/gpu/drm/i915/display/intel_psr.c | 44 +++++++++----------
2 files changed, 31 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 9678c2b157f6..0ad6134ba94e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1705,17 +1705,6 @@ struct intel_psr {
bool psr2_sel_fetch_cff_enabled;
bool req_psr2_sdp_prior_scanline;
u8 sink_sync_latency;
-
- struct {
- u8 io_wake_lines;
- u8 fast_wake_lines;
-
- /* LNL and beyond */
- u8 check_entry_lines;
- u8 silence_period_sym_clocks;
- u8 lfps_half_cycle_num_of_syms;
- } alpm_parameters;
-
ktime_t last_entry_attempt;
ktime_t last_exit;
bool sink_not_reliable;
@@ -1846,6 +1835,16 @@ struct intel_dp {
unsigned long last_oui_write;
bool colorimetry_support;
+
+ struct {
+ u8 io_wake_lines;
+ u8 fast_wake_lines;
+
+ /* LNL and beyond */
+ u8 check_entry_lines;
+ u8 silence_period_sym_clocks;
+ u8 lfps_half_cycle_num_of_syms;
+ } alpm_parameters;
};
enum lspcon_vendor {
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index d18baeb971bb..a9019fde907f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -871,8 +871,8 @@ static u32 intel_psr2_get_tp_time(struct intel_dp *intel_dp)
static int psr2_block_count_lines(struct intel_dp *intel_dp)
{
- return intel_dp->psr.alpm_parameters.io_wake_lines < 9 &&
- intel_dp->psr.alpm_parameters.fast_wake_lines < 9 ? 8 : 12;
+ return intel_dp->alpm_parameters.io_wake_lines < 9 &&
+ intel_dp->alpm_parameters.fast_wake_lines < 9 ? 8 : 12;
}
static int psr2_block_count(struct intel_dp *intel_dp)
@@ -910,7 +910,6 @@ static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
static void hsw_activate_psr2(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- struct intel_psr *psr = &intel_dp->psr;
enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
u32 val = EDP_PSR2_ENABLE;
u32 psr_val = 0;
@@ -952,20 +951,20 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
*/
int tmp;
- tmp = map[psr->alpm_parameters.io_wake_lines -
+ tmp = map[intel_dp->alpm_parameters.io_wake_lines -
TGL_EDP_PSR2_IO_BUFFER_WAKE_MIN_LINES];
val |= TGL_EDP_PSR2_IO_BUFFER_WAKE(tmp + TGL_EDP_PSR2_IO_BUFFER_WAKE_MIN_LINES);
- tmp = map[psr->alpm_parameters.fast_wake_lines - TGL_EDP_PSR2_FAST_WAKE_MIN_LINES];
+ tmp = map[intel_dp->alpm_parameters.fast_wake_lines - TGL_EDP_PSR2_FAST_WAKE_MIN_LINES];
val |= TGL_EDP_PSR2_FAST_WAKE(tmp + TGL_EDP_PSR2_FAST_WAKE_MIN_LINES);
} else if (DISPLAY_VER(dev_priv) >= 20) {
- val |= LNL_EDP_PSR2_IO_BUFFER_WAKE(psr->alpm_parameters.io_wake_lines);
+ val |= LNL_EDP_PSR2_IO_BUFFER_WAKE(intel_dp->alpm_parameters.io_wake_lines);
} else if (DISPLAY_VER(dev_priv) >= 12) {
- val |= TGL_EDP_PSR2_IO_BUFFER_WAKE(psr->alpm_parameters.io_wake_lines);
- val |= TGL_EDP_PSR2_FAST_WAKE(psr->alpm_parameters.fast_wake_lines);
+ val |= TGL_EDP_PSR2_IO_BUFFER_WAKE(intel_dp->alpm_parameters.io_wake_lines);
+ val |= TGL_EDP_PSR2_FAST_WAKE(intel_dp->alpm_parameters.fast_wake_lines);
} else if (DISPLAY_VER(dev_priv) >= 9) {
- val |= EDP_PSR2_IO_BUFFER_WAKE(psr->alpm_parameters.io_wake_lines);
- val |= EDP_PSR2_FAST_WAKE(psr->alpm_parameters.fast_wake_lines);
+ val |= EDP_PSR2_IO_BUFFER_WAKE(intel_dp->alpm_parameters.io_wake_lines);
+ val |= EDP_PSR2_FAST_WAKE(intel_dp->alpm_parameters.fast_wake_lines);
}
if (intel_dp->psr.req_psr2_sdp_prior_scanline)
@@ -1348,9 +1347,9 @@ static int _lnl_compute_aux_less_alpm_params(struct intel_dp *intel_dp,
if (i915->display.params.psr_safest_params)
aux_less_wake_lines = ALPM_CTL_AUX_LESS_WAKE_TIME_MASK;
- intel_dp->psr.alpm_parameters.fast_wake_lines = aux_less_wake_lines;
- intel_dp->psr.alpm_parameters.silence_period_sym_clocks = silence_period;
- intel_dp->psr.alpm_parameters.lfps_half_cycle_num_of_syms = lfps_half_cycle;
+ intel_dp->alpm_parameters.fast_wake_lines = aux_less_wake_lines;
+ intel_dp->alpm_parameters.silence_period_sym_clocks = silence_period;
+ intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms = lfps_half_cycle;
return true;
}
@@ -1377,7 +1376,7 @@ static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp,
if (i915->display.params.psr_safest_params)
check_entry_lines = 15;
- intel_dp->psr.alpm_parameters.check_entry_lines = check_entry_lines;
+ intel_dp->alpm_parameters.check_entry_lines = check_entry_lines;
return true;
}
@@ -1446,8 +1445,8 @@ static bool _compute_alpm_params(struct intel_dp *intel_dp,
io_wake_lines = fast_wake_lines = max_wake_lines;
/* According to Bspec lower limit should be set as 7 lines. */
- intel_dp->psr.alpm_parameters.io_wake_lines = max(io_wake_lines, 7);
- intel_dp->psr.alpm_parameters.fast_wake_lines = max(fast_wake_lines, 7);
+ intel_dp->alpm_parameters.io_wake_lines = max(io_wake_lines, 7);
+ intel_dp->alpm_parameters.fast_wake_lines = max(fast_wake_lines, 7);
return true;
}
@@ -1848,7 +1847,6 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
- struct intel_psr *psr = &intel_dp->psr;
u32 alpm_ctl;
if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp->psr.sel_update_enabled &&
@@ -1870,23 +1868,23 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp)
PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |
PORT_ALPM_CTL_SILENCE_PERIOD(
- psr->alpm_parameters.silence_period_sym_clocks));
+ intel_dp->alpm_parameters.silence_period_sym_clocks));
intel_de_write(dev_priv,
PORT_ALPM_LFPS_CTL(dev_priv, cpu_transcoder),
PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
- psr->alpm_parameters.lfps_half_cycle_num_of_syms) |
+ intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) |
PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(
- psr->alpm_parameters.lfps_half_cycle_num_of_syms) |
+ intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) |
PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(
- psr->alpm_parameters.lfps_half_cycle_num_of_syms));
+ intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms));
} else {
alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
- ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr->alpm_parameters.fast_wake_lines);
+ ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp->alpm_parameters.fast_wake_lines);
}
- alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(psr->alpm_parameters.check_entry_lines);
+ alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp->alpm_parameters.check_entry_lines);
intel_de_write(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder), alpm_ctl);
}
--
2.29.0
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v5 2/6] drm/i915/alpm: Move alpm related code to a new file
2024-05-20 10:48 [PATCH v5 0/6] Link off between frames for edp Animesh Manna
2024-05-20 10:48 ` [PATCH v5 1/6] drm/i915/alpm: Move alpm parameters from intel_psr Animesh Manna
@ 2024-05-20 10:48 ` Animesh Manna
2024-05-20 10:48 ` [PATCH v5 3/6] drm/display: Add missing aux less alpm wake related bits Animesh Manna
` (7 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Animesh Manna @ 2024-05-20 10:48 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, jani.nikula, jouni.hogander, arun.r.murthy,
Animesh Manna
Move ALPM feature related code as it will be used for
non-psr panel also thorugh LOBF feature.
v1: Initial version.
v2: Correct ordering in makefile. [Jani]
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_alpm.c | 295 ++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_alpm.h | 18 ++
drivers/gpu/drm/i915/display/intel_psr.c | 283 +--------------------
drivers/gpu/drm/xe/Makefile | 1 +
5 files changed, 318 insertions(+), 280 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_alpm.c
create mode 100644 drivers/gpu/drm/i915/display/intel_alpm.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 7cad944b825c..9a3f910ce4fd 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -243,6 +243,7 @@ i915-y += \
display/hsw_ips.o \
display/i9xx_plane.o \
display/i9xx_wm.o \
+ display/intel_alpm.o \
display/intel_atomic.o \
display/intel_atomic_plane.o \
display/intel_audio.o \
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
new file mode 100644
index 000000000000..7307e02277d6
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -0,0 +1,295 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2024, Intel Corporation.
+ */
+
+#include "intel_alpm.h"
+#include "intel_crtc.h"
+#include "intel_de.h"
+#include "intel_display_types.h"
+#include "intel_dp.h"
+#include "intel_dp_aux.h"
+#include "intel_psr_regs.h"
+
+/*
+ * See Bspec: 71632 for the table
+ *
+ * Silence_period = tSilence,Min + ((tSilence,Max - tSilence,Min) / 2)
+ *
+ * Half cycle duration:
+ *
+ * Link rates 1.62 - 4.32 and tLFPS_Cycle = 70 ns
+ * FLOOR( (Link Rate * tLFPS_Cycle) / (2 * 10) )
+ *
+ * Link rates 5.4 - 8.1
+ * PORT_ALPM_LFPS_CTL[ LFPS Cycle Count ] = 10
+ * LFPS Period chosen is the mid-point of the min:max values from the table
+ * FLOOR( LFPS Period in Symbol clocks /
+ * (2 * PORT_ALPM_LFPS_CTL[ LFPS Cycle Count ]) )
+ */
+static bool _lnl_get_silence_period_and_lfps_half_cycle(int link_rate,
+ int *silence_period,
+ int *lfps_half_cycle)
+{
+ switch (link_rate) {
+ case 162000:
+ *silence_period = 20;
+ *lfps_half_cycle = 5;
+ break;
+ case 216000:
+ *silence_period = 27;
+ *lfps_half_cycle = 7;
+ break;
+ case 243000:
+ *silence_period = 31;
+ *lfps_half_cycle = 8;
+ break;
+ case 270000:
+ *silence_period = 34;
+ *lfps_half_cycle = 9;
+ break;
+ case 324000:
+ *silence_period = 41;
+ *lfps_half_cycle = 11;
+ break;
+ case 432000:
+ *silence_period = 56;
+ *lfps_half_cycle = 15;
+ break;
+ case 540000:
+ *silence_period = 69;
+ *lfps_half_cycle = 12;
+ break;
+ case 648000:
+ *silence_period = 84;
+ *lfps_half_cycle = 15;
+ break;
+ case 675000:
+ *silence_period = 87;
+ *lfps_half_cycle = 15;
+ break;
+ case 810000:
+ *silence_period = 104;
+ *lfps_half_cycle = 19;
+ break;
+ default:
+ *silence_period = *lfps_half_cycle = -1;
+ return false;
+ }
+ return true;
+}
+
+/*
+ * AUX-Less Wake Time = CEILING( ((PHY P2 to P0) + tLFPS_Period, Max+
+ * tSilence, Max+ tPHY Establishment + tCDS) / tline)
+ * For the "PHY P2 to P0" latency see the PHY Power Control page
+ * (PHY P2 to P0) : https://gfxspecs.intel.com/Predator/Home/Index/68965
+ * : 12 us
+ * The tLFPS_Period, Max term is 800ns
+ * The tSilence, Max term is 180ns
+ * The tPHY Establishment (a.k.a. t1) term is 50us
+ * The tCDS term is 1 or 2 times t2
+ * t2 = Number ML_PHY_LOCK * tML_PHY_LOCK
+ * Number ML_PHY_LOCK = ( 7 + CEILING( 6.5us / tML_PHY_LOCK ) + 1)
+ * Rounding up the 6.5us padding to the next ML_PHY_LOCK boundary and
+ * adding the "+ 1" term ensures all ML_PHY_LOCK sequences that start
+ * within the CDS period complete within the CDS period regardless of
+ * entry into the period
+ * tML_PHY_LOCK = TPS4 Length * ( 10 / (Link Rate in MHz) )
+ * TPS4 Length = 252 Symbols
+ */
+static int _lnl_compute_aux_less_wake_time(int port_clock)
+{
+ int tphy2_p2_to_p0 = 12 * 1000;
+ int tlfps_period_max = 800;
+ int tsilence_max = 180;
+ int t1 = 50 * 1000;
+ int tps4 = 252;
+ int tml_phy_lock = 1000 * 1000 * tps4 * 10 / port_clock;
+ int num_ml_phy_lock = 7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1;
+ int t2 = num_ml_phy_lock * tml_phy_lock;
+ int tcds = 1 * t2;
+
+ return DIV_ROUND_UP(tphy2_p2_to_p0 + tlfps_period_max + tsilence_max +
+ t1 + tcds, 1000);
+}
+
+static int _lnl_compute_aux_less_alpm_params(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ int aux_less_wake_time, aux_less_wake_lines, silence_period,
+ lfps_half_cycle;
+
+ aux_less_wake_time =
+ _lnl_compute_aux_less_wake_time(crtc_state->port_clock);
+ aux_less_wake_lines = intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode,
+ aux_less_wake_time);
+
+ if (!_lnl_get_silence_period_and_lfps_half_cycle(crtc_state->port_clock,
+ &silence_period,
+ &lfps_half_cycle))
+ return false;
+
+ if (aux_less_wake_lines > ALPM_CTL_AUX_LESS_WAKE_TIME_MASK ||
+ silence_period > PORT_ALPM_CTL_SILENCE_PERIOD_MASK ||
+ lfps_half_cycle > PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION_MASK)
+ return false;
+
+ if (i915->display.params.psr_safest_params)
+ aux_less_wake_lines = ALPM_CTL_AUX_LESS_WAKE_TIME_MASK;
+
+ intel_dp->alpm_parameters.fast_wake_lines = aux_less_wake_lines;
+ intel_dp->alpm_parameters.silence_period_sym_clocks = silence_period;
+ intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms = lfps_half_cycle;
+
+ return true;
+}
+
+static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ int check_entry_lines;
+
+ if (DISPLAY_VER(i915) < 20)
+ return true;
+
+ /* ALPM Entry Check = 2 + CEILING( 5us /tline ) */
+ check_entry_lines = 2 +
+ intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, 5);
+
+ if (check_entry_lines > 15)
+ return false;
+
+ if (!_lnl_compute_aux_less_alpm_params(intel_dp, crtc_state))
+ return false;
+
+ if (i915->display.params.psr_safest_params)
+ check_entry_lines = 15;
+
+ intel_dp->alpm_parameters.check_entry_lines = check_entry_lines;
+
+ return true;
+}
+
+/*
+ * IO wake time for DISPLAY_VER < 12 is not directly mentioned in Bspec. There
+ * are 50 us io wake time and 32 us fast wake time. Clearly preharge pulses are
+ * not (improperly) included in 32 us fast wake time. 50 us - 32 us = 18 us.
+ */
+static int skl_io_buffer_wake_time(void)
+{
+ return 18;
+}
+
+static int tgl_io_buffer_wake_time(void)
+{
+ return 10;
+}
+
+static int io_buffer_wake_time(const struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+
+ if (DISPLAY_VER(i915) >= 12)
+ return tgl_io_buffer_wake_time();
+ else
+ return skl_io_buffer_wake_time();
+}
+
+bool intel_alpm_compute_params(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ int io_wake_lines, io_wake_time, fast_wake_lines, fast_wake_time;
+ int tfw_exit_latency = 20; /* eDP spec */
+ int phy_wake = 4; /* eDP spec */
+ int preamble = 8; /* eDP spec */
+ int precharge = intel_dp_aux_fw_sync_len() - preamble;
+ u8 max_wake_lines;
+
+ io_wake_time = max(precharge, io_buffer_wake_time(crtc_state)) +
+ preamble + phy_wake + tfw_exit_latency;
+ fast_wake_time = precharge + preamble + phy_wake +
+ tfw_exit_latency;
+
+ if (DISPLAY_VER(i915) >= 20)
+ max_wake_lines = 68;
+ else if (DISPLAY_VER(i915) >= 12)
+ max_wake_lines = 12;
+ else
+ max_wake_lines = 8;
+
+ io_wake_lines = intel_usecs_to_scanlines(
+ &crtc_state->hw.adjusted_mode, io_wake_time);
+ fast_wake_lines = intel_usecs_to_scanlines(
+ &crtc_state->hw.adjusted_mode, fast_wake_time);
+
+ if (io_wake_lines > max_wake_lines ||
+ fast_wake_lines > max_wake_lines)
+ return false;
+
+ if (!_lnl_compute_alpm_params(intel_dp, crtc_state))
+ return false;
+
+ if (i915->display.params.psr_safest_params)
+ io_wake_lines = fast_wake_lines = max_wake_lines;
+
+ /* According to Bspec lower limit should be set as 7 lines. */
+ intel_dp->alpm_parameters.io_wake_lines = max(io_wake_lines, 7);
+ intel_dp->alpm_parameters.fast_wake_lines = max(fast_wake_lines, 7);
+
+ return true;
+}
+
+static void lnl_alpm_configure(struct intel_dp *intel_dp)
+{
+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+ enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
+ u32 alpm_ctl;
+
+ if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp->psr.sel_update_enabled &&
+ !intel_dp_is_edp(intel_dp)))
+ return;
+
+ /*
+ * Panel Replay on eDP is always using ALPM aux less. I.e. no need to
+ * check panel support at this point.
+ */
+ if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
+ alpm_ctl = ALPM_CTL_ALPM_ENABLE |
+ ALPM_CTL_ALPM_AUX_LESS_ENABLE |
+ ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;
+
+ intel_de_write(dev_priv,
+ PORT_ALPM_CTL(dev_priv, cpu_transcoder),
+ PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |
+ PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
+ PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |
+ PORT_ALPM_CTL_SILENCE_PERIOD(
+ intel_dp->alpm_parameters.silence_period_sym_clocks));
+
+ intel_de_write(dev_priv,
+ PORT_ALPM_LFPS_CTL(dev_priv, cpu_transcoder),
+ PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
+ PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
+ intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) |
+ PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(
+ intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) |
+ PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(
+ intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms));
+ } else {
+ alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
+ ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp->alpm_parameters.fast_wake_lines);
+ }
+
+ alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp->alpm_parameters.check_entry_lines);
+
+ intel_de_write(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder), alpm_ctl);
+}
+
+void intel_alpm_configure(struct intel_dp *intel_dp)
+{
+ lnl_alpm_configure(intel_dp);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
new file mode 100644
index 000000000000..c45d078e5a6b
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_alpm.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: MIT
+ *
+ * Copyright © 2024 Intel Corporation
+ */
+
+#ifndef _INTEL_ALPM_H
+#define _INTEL_ALPM_H
+
+#include <linux/types.h>
+
+struct intel_dp;
+struct intel_crtc_state;
+
+bool intel_alpm_compute_params(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state);
+void intel_alpm_configure(struct intel_dp *intel_dp);
+
+#endif
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a9019fde907f..e2d3be0bf99c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -27,6 +27,7 @@
#include "i915_drv.h"
#include "i915_reg.h"
+#include "intel_alpm.h"
#include "intel_atomic.h"
#include "intel_crtc.h"
#include "intel_cursor_regs.h"
@@ -1219,238 +1220,6 @@ static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d
return true;
}
-/*
- * See Bspec: 71632 for the table
- *
- * Silence_period = tSilence,Min + ((tSilence,Max - tSilence,Min) / 2)
- *
- * Half cycle duration:
- *
- * Link rates 1.62 - 4.32 and tLFPS_Cycle = 70 ns
- * FLOOR( (Link Rate * tLFPS_Cycle) / (2 * 10) )
- *
- * Link rates 5.4 - 8.1
- * PORT_ALPM_LFPS_CTL[ LFPS Cycle Count ] = 10
- * LFPS Period chosen is the mid-point of the min:max values from the table
- * FLOOR( LFPS Period in Symbol clocks /
- * (2 * PORT_ALPM_LFPS_CTL[ LFPS Cycle Count ]) )
- */
-static bool _lnl_get_silence_period_and_lfps_half_cycle(int link_rate,
- int *silence_period,
- int *lfps_half_cycle)
-{
- switch (link_rate) {
- case 162000:
- *silence_period = 20;
- *lfps_half_cycle = 5;
- break;
- case 216000:
- *silence_period = 27;
- *lfps_half_cycle = 7;
- break;
- case 243000:
- *silence_period = 31;
- *lfps_half_cycle = 8;
- break;
- case 270000:
- *silence_period = 34;
- *lfps_half_cycle = 9;
- break;
- case 324000:
- *silence_period = 41;
- *lfps_half_cycle = 11;
- break;
- case 432000:
- *silence_period = 56;
- *lfps_half_cycle = 15;
- break;
- case 540000:
- *silence_period = 69;
- *lfps_half_cycle = 12;
- break;
- case 648000:
- *silence_period = 84;
- *lfps_half_cycle = 15;
- break;
- case 675000:
- *silence_period = 87;
- *lfps_half_cycle = 15;
- break;
- case 810000:
- *silence_period = 104;
- *lfps_half_cycle = 19;
- break;
- default:
- *silence_period = *lfps_half_cycle = -1;
- return false;
- }
- return true;
-}
-
-/*
- * AUX-Less Wake Time = CEILING( ((PHY P2 to P0) + tLFPS_Period, Max+
- * tSilence, Max+ tPHY Establishment + tCDS) / tline)
- * For the "PHY P2 to P0" latency see the PHY Power Control page
- * (PHY P2 to P0) : https://gfxspecs.intel.com/Predator/Home/Index/68965
- * : 12 us
- * The tLFPS_Period, Max term is 800ns
- * The tSilence, Max term is 180ns
- * The tPHY Establishment (a.k.a. t1) term is 50us
- * The tCDS term is 1 or 2 times t2
- * t2 = Number ML_PHY_LOCK * tML_PHY_LOCK
- * Number ML_PHY_LOCK = ( 7 + CEILING( 6.5us / tML_PHY_LOCK ) + 1)
- * Rounding up the 6.5us padding to the next ML_PHY_LOCK boundary and
- * adding the "+ 1" term ensures all ML_PHY_LOCK sequences that start
- * within the CDS period complete within the CDS period regardless of
- * entry into the period
- * tML_PHY_LOCK = TPS4 Length * ( 10 / (Link Rate in MHz) )
- * TPS4 Length = 252 Symbols
- */
-static int _lnl_compute_aux_less_wake_time(int port_clock)
-{
- int tphy2_p2_to_p0 = 12 * 1000;
- int tlfps_period_max = 800;
- int tsilence_max = 180;
- int t1 = 50 * 1000;
- int tps4 = 252;
- int tml_phy_lock = 1000 * 1000 * tps4 * 10 / port_clock;
- int num_ml_phy_lock = 7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1;
- int t2 = num_ml_phy_lock * tml_phy_lock;
- int tcds = 1 * t2;
-
- return DIV_ROUND_UP(tphy2_p2_to_p0 + tlfps_period_max + tsilence_max +
- t1 + tcds, 1000);
-}
-
-static int _lnl_compute_aux_less_alpm_params(struct intel_dp *intel_dp,
- struct intel_crtc_state *crtc_state)
-{
- struct drm_i915_private *i915 = dp_to_i915(intel_dp);
- int aux_less_wake_time, aux_less_wake_lines, silence_period,
- lfps_half_cycle;
-
- aux_less_wake_time =
- _lnl_compute_aux_less_wake_time(crtc_state->port_clock);
- aux_less_wake_lines = intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode,
- aux_less_wake_time);
-
- if (!_lnl_get_silence_period_and_lfps_half_cycle(crtc_state->port_clock,
- &silence_period,
- &lfps_half_cycle))
- return false;
-
- if (aux_less_wake_lines > ALPM_CTL_AUX_LESS_WAKE_TIME_MASK ||
- silence_period > PORT_ALPM_CTL_SILENCE_PERIOD_MASK ||
- lfps_half_cycle > PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION_MASK)
- return false;
-
- if (i915->display.params.psr_safest_params)
- aux_less_wake_lines = ALPM_CTL_AUX_LESS_WAKE_TIME_MASK;
-
- intel_dp->alpm_parameters.fast_wake_lines = aux_less_wake_lines;
- intel_dp->alpm_parameters.silence_period_sym_clocks = silence_period;
- intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms = lfps_half_cycle;
-
- return true;
-}
-
-static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp,
- struct intel_crtc_state *crtc_state)
-{
- struct drm_i915_private *i915 = dp_to_i915(intel_dp);
- int check_entry_lines;
-
- if (DISPLAY_VER(i915) < 20)
- return true;
-
- /* ALPM Entry Check = 2 + CEILING( 5us /tline ) */
- check_entry_lines = 2 +
- intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, 5);
-
- if (check_entry_lines > 15)
- return false;
-
- if (!_lnl_compute_aux_less_alpm_params(intel_dp, crtc_state))
- return false;
-
- if (i915->display.params.psr_safest_params)
- check_entry_lines = 15;
-
- intel_dp->alpm_parameters.check_entry_lines = check_entry_lines;
-
- return true;
-}
-
-/*
- * IO wake time for DISPLAY_VER < 12 is not directly mentioned in Bspec. There
- * are 50 us io wake time and 32 us fast wake time. Clearly preharge pulses are
- * not (improperly) included in 32 us fast wake time. 50 us - 32 us = 18 us.
- */
-static int skl_io_buffer_wake_time(void)
-{
- return 18;
-}
-
-static int tgl_io_buffer_wake_time(void)
-{
- return 10;
-}
-
-static int io_buffer_wake_time(const struct intel_crtc_state *crtc_state)
-{
- struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
-
- if (DISPLAY_VER(i915) >= 12)
- return tgl_io_buffer_wake_time();
- else
- return skl_io_buffer_wake_time();
-}
-
-static bool _compute_alpm_params(struct intel_dp *intel_dp,
- struct intel_crtc_state *crtc_state)
-{
- struct drm_i915_private *i915 = dp_to_i915(intel_dp);
- int io_wake_lines, io_wake_time, fast_wake_lines, fast_wake_time;
- int tfw_exit_latency = 20; /* eDP spec */
- int phy_wake = 4; /* eDP spec */
- int preamble = 8; /* eDP spec */
- int precharge = intel_dp_aux_fw_sync_len() - preamble;
- u8 max_wake_lines;
-
- io_wake_time = max(precharge, io_buffer_wake_time(crtc_state)) +
- preamble + phy_wake + tfw_exit_latency;
- fast_wake_time = precharge + preamble + phy_wake +
- tfw_exit_latency;
-
- if (DISPLAY_VER(i915) >= 20)
- max_wake_lines = 68;
- else if (DISPLAY_VER(i915) >= 12)
- max_wake_lines = 12;
- else
- max_wake_lines = 8;
-
- io_wake_lines = intel_usecs_to_scanlines(
- &crtc_state->hw.adjusted_mode, io_wake_time);
- fast_wake_lines = intel_usecs_to_scanlines(
- &crtc_state->hw.adjusted_mode, fast_wake_time);
-
- if (io_wake_lines > max_wake_lines ||
- fast_wake_lines > max_wake_lines)
- return false;
-
- if (!_lnl_compute_alpm_params(intel_dp, crtc_state))
- return false;
-
- if (i915->display.params.psr_safest_params)
- io_wake_lines = fast_wake_lines = max_wake_lines;
-
- /* According to Bspec lower limit should be set as 7 lines. */
- intel_dp->alpm_parameters.io_wake_lines = max(io_wake_lines, 7);
- intel_dp->alpm_parameters.fast_wake_lines = max(fast_wake_lines, 7);
-
- return true;
-}
-
static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
const struct drm_display_mode *adjusted_mode)
{
@@ -1567,7 +1336,7 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
return false;
}
- if (!_compute_alpm_params(intel_dp, crtc_state)) {
+ if (!intel_alpm_compute_params(intel_dp, crtc_state)) {
drm_dbg_kms(&dev_priv->drm,
"PSR2 not enabled, Unable to use long enough wake times\n");
return false;
@@ -1843,52 +1612,6 @@ static void wm_optimization_wa(struct intel_dp *intel_dp,
wa_16013835468_bit_get(intel_dp), 0);
}
-static void lnl_alpm_configure(struct intel_dp *intel_dp)
-{
- struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
- u32 alpm_ctl;
-
- if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp->psr.sel_update_enabled &&
- !intel_dp_is_edp(intel_dp)))
- return;
-
- /*
- * Panel Replay on eDP is always using ALPM aux less. I.e. no need to
- * check panel support at this point.
- */
- if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
- alpm_ctl = ALPM_CTL_ALPM_ENABLE |
- ALPM_CTL_ALPM_AUX_LESS_ENABLE |
- ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;
-
- intel_de_write(dev_priv,
- PORT_ALPM_CTL(dev_priv, cpu_transcoder),
- PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |
- PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
- PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |
- PORT_ALPM_CTL_SILENCE_PERIOD(
- intel_dp->alpm_parameters.silence_period_sym_clocks));
-
- intel_de_write(dev_priv,
- PORT_ALPM_LFPS_CTL(dev_priv, cpu_transcoder),
- PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
- PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
- intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) |
- PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(
- intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) |
- PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(
- intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms));
- } else {
- alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
- ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp->alpm_parameters.fast_wake_lines);
- }
-
- alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp->alpm_parameters.check_entry_lines);
-
- intel_de_write(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder), alpm_ctl);
-}
-
static void intel_psr_enable_source(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{
@@ -1969,7 +1692,7 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
IGNORE_PSR2_HW_TRACKING : 0);
if (intel_dp_is_edp(intel_dp))
- lnl_alpm_configure(intel_dp);
+ intel_alpm_configure(intel_dp);
/*
* Wa_16013835468
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index c9f067b8f54d..169b3773ae4a 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -221,6 +221,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
# Display code shared with i915
xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/icl_dsi.o \
+ i915-display/intel_alpm.o \
i915-display/intel_atomic.o \
i915-display/intel_atomic_plane.o \
i915-display/intel_audio.o \
--
2.29.0
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v5 3/6] drm/display: Add missing aux less alpm wake related bits
2024-05-20 10:48 [PATCH v5 0/6] Link off between frames for edp Animesh Manna
2024-05-20 10:48 ` [PATCH v5 1/6] drm/i915/alpm: Move alpm parameters from intel_psr Animesh Manna
2024-05-20 10:48 ` [PATCH v5 2/6] drm/i915/alpm: Move alpm related code to a new file Animesh Manna
@ 2024-05-20 10:48 ` Animesh Manna
2024-05-20 10:48 ` [PATCH v5 4/6] drm/i915/alpm: Add compute config for lobf Animesh Manna
` (6 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Animesh Manna @ 2024-05-20 10:48 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel, jani.nikula, jouni.hogander, arun.r.murthy
From: Jouni Högander <jouni.hogander@intel.com>
eDP1.5 adds some more bits into DP_RECEIVER_ALPM_CAP and
DP_RECEIVER_ALPM_CONFIG registers. Add definitions for these.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
include/drm/display/drm_dp.h | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index 906949ca3cee..3317ff88ed59 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -232,6 +232,8 @@
#define DP_RECEIVER_ALPM_CAP 0x02e /* eDP 1.4 */
# define DP_ALPM_CAP (1 << 0)
+# define DP_ALPM_PM_STATE_2A_SUPPORT (1 << 1) /* eDP 1.5 */
+# define DP_ALPM_AUX_LESS_CAP (1 << 2) /* eDP 1.5 */
#define DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP 0x02f /* eDP 1.4 */
# define DP_AUX_FRAME_SYNC_CAP (1 << 0)
@@ -683,7 +685,8 @@
#define DP_RECEIVER_ALPM_CONFIG 0x116 /* eDP 1.4 */
# define DP_ALPM_ENABLE (1 << 0)
-# define DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE (1 << 1)
+# define DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE (1 << 1) /* eDP 1.5 */
+# define DP_ALPM_MODE_AUX_LESS (1 << 2) /* eDP 1.5 */
#define DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF 0x117 /* eDP 1.4 */
# define DP_AUX_FRAME_SYNC_ENABLE (1 << 0)
--
2.29.0
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v5 4/6] drm/i915/alpm: Add compute config for lobf
2024-05-20 10:48 [PATCH v5 0/6] Link off between frames for edp Animesh Manna
` (2 preceding siblings ...)
2024-05-20 10:48 ` [PATCH v5 3/6] drm/display: Add missing aux less alpm wake related bits Animesh Manna
@ 2024-05-20 10:48 ` Animesh Manna
2024-05-20 12:08 ` Jani Nikula
2024-05-20 10:48 ` [PATCH v5 5/6] drm/i915/alpm: Enable lobf from source in ALPM_CTL Animesh Manna
` (5 subsequent siblings)
9 siblings, 1 reply; 13+ messages in thread
From: Animesh Manna @ 2024-05-20 10:48 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, jani.nikula, jouni.hogander, arun.r.murthy,
Animesh Manna
Link Off Between Active Frames, is a new feature for eDP
that allows the panel to go to lower power state after
transmission of data. This is a feature on top of ALPM, AS SDP.
Add compute config during atomic-check phase.
v1: RFC version.
v2: Add separate flag for auxless-alpm. [Jani]
v3:
- intel_dp->lobf_supported replaced with crtc_state->has_lobf. [Jouni]
- Add DISPLAY_VER() check. [Jouni]
- Modify function name of get_aux_less_status. [Jani]
v4: Add enum alpm_mode to hold the aux-wake/less capability.
v5: Add alpm_dpcd to intel_dp and use aux_wake_supported()/
aux_less_wake_supported() instead of enum alpm_mode. [Jouni]
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
drivers/gpu/drm/i915/display/intel_alpm.c | 61 +++++++++++++++++++
drivers/gpu/drm/i915/display/intel_alpm.h | 5 ++
.../drm/i915/display/intel_display_types.h | 5 ++
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++
4 files changed, 75 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 7307e02277d6..c2334197e723 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -11,6 +11,26 @@
#include "intel_dp_aux.h"
#include "intel_psr_regs.h"
+static bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp)
+{
+ return intel_dp->alpm_dpcd & DP_ALPM_CAP;
+}
+
+static bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp)
+{
+ return intel_dp->alpm_dpcd & DP_ALPM_AUX_LESS_CAP;
+}
+
+void intel_alpm_get_capability(struct intel_dp *intel_dp)
+{
+ u8 dpcd;
+
+ if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP, &dpcd) < 0)
+ return;
+
+ intel_dp->alpm_dpcd = dpcd;
+}
+
/*
* See Bspec: 71632 for the table
*
@@ -243,6 +263,47 @@ bool intel_alpm_compute_params(struct intel_dp *intel_dp,
return true;
}
+void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state)
+{
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+ int waketime_in_lines, first_sdp_position;
+ int context_latency, guardband;
+
+ if (!intel_dp_is_edp(intel_dp))
+ return;
+
+ if (DISPLAY_VER(i915) < 20)
+ return;
+
+ if (!intel_dp_as_sdp_supported(intel_dp))
+ return;
+
+ if (crtc_state->has_psr)
+ return;
+
+ if (!(intel_alpm_aux_wake_supported(intel_dp) ||
+ intel_alpm_aux_less_wake_supported(intel_dp)))
+ return;
+
+ if (!intel_alpm_compute_params(intel_dp, crtc_state))
+ return;
+
+ context_latency = adjusted_mode->crtc_vblank_start - adjusted_mode->crtc_vdisplay;
+ guardband = adjusted_mode->crtc_vtotal -
+ adjusted_mode->crtc_vdisplay - context_latency;
+ first_sdp_position = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_start;
+ if (intel_alpm_aux_less_wake_supported(intel_dp))
+ waketime_in_lines = intel_dp->alpm_parameters.io_wake_lines;
+ else
+ waketime_in_lines = intel_dp->alpm_parameters.fast_wake_lines;
+
+ crtc_state->has_lobf = (context_latency + guardband) >
+ (first_sdp_position + waketime_in_lines);
+}
+
static void lnl_alpm_configure(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
index c45d078e5a6b..45c07f023a63 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.h
+++ b/drivers/gpu/drm/i915/display/intel_alpm.h
@@ -10,9 +10,14 @@
struct intel_dp;
struct intel_crtc_state;
+struct drm_connector_state;
+void intel_alpm_get_capability(struct intel_dp *intel_dp);
bool intel_alpm_compute_params(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state);
+void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state);
void intel_alpm_configure(struct intel_dp *intel_dp);
#endif
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 0ad6134ba94e..d77a9f22b5c6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1410,6 +1410,9 @@ struct intel_crtc_state {
/* for loading single buffered registers during vblank */
struct drm_vblank_work vblank_work;
+
+ /* LOBF flag */
+ bool has_lobf;
};
enum intel_pipe_crc_source {
@@ -1845,6 +1848,8 @@ struct intel_dp {
u8 silence_period_sym_clocks;
u8 lfps_half_cycle_num_of_syms;
} alpm_parameters;
+
+ u8 alpm_dpcd;
};
enum lspcon_vendor {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c0a3b6d50681..61ee66ad8bd0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -48,6 +48,7 @@
#include "i915_drv.h"
#include "i915_irq.h"
#include "i915_reg.h"
+#include "intel_alpm.h"
#include "intel_atomic.h"
#include "intel_audio.h"
#include "intel_backlight.h"
@@ -3000,6 +3001,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
intel_vrr_compute_config(pipe_config, conn_state);
intel_dp_compute_as_sdp(intel_dp, pipe_config);
intel_psr_compute_config(intel_dp, pipe_config, conn_state);
+ intel_alpm_compute_lobf_config(intel_dp, pipe_config, conn_state);
intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16);
intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
@@ -6616,6 +6618,8 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
intel_pps_init_late(intel_dp);
+ intel_alpm_get_capability(intel_dp);
+
return true;
out_vdd_off:
--
2.29.0
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v5 4/6] drm/i915/alpm: Add compute config for lobf
2024-05-20 10:48 ` [PATCH v5 4/6] drm/i915/alpm: Add compute config for lobf Animesh Manna
@ 2024-05-20 12:08 ` Jani Nikula
0 siblings, 0 replies; 13+ messages in thread
From: Jani Nikula @ 2024-05-20 12:08 UTC (permalink / raw)
To: Animesh Manna, intel-gfx
Cc: dri-devel, jouni.hogander, arun.r.murthy, Animesh Manna
On Mon, 20 May 2024, Animesh Manna <animesh.manna@intel.com> wrote:
> Link Off Between Active Frames, is a new feature for eDP
> that allows the panel to go to lower power state after
> transmission of data. This is a feature on top of ALPM, AS SDP.
> Add compute config during atomic-check phase.
>
> v1: RFC version.
> v2: Add separate flag for auxless-alpm. [Jani]
> v3:
> - intel_dp->lobf_supported replaced with crtc_state->has_lobf. [Jouni]
> - Add DISPLAY_VER() check. [Jouni]
> - Modify function name of get_aux_less_status. [Jani]
> v4: Add enum alpm_mode to hold the aux-wake/less capability.
> v5: Add alpm_dpcd to intel_dp and use aux_wake_supported()/
> aux_less_wake_supported() instead of enum alpm_mode. [Jouni]
>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_alpm.c | 61 +++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_alpm.h | 5 ++
> .../drm/i915/display/intel_display_types.h | 5 ++
> drivers/gpu/drm/i915/display/intel_dp.c | 4 ++
> 4 files changed, 75 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 7307e02277d6..c2334197e723 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -11,6 +11,26 @@
> #include "intel_dp_aux.h"
> #include "intel_psr_regs.h"
>
> +static bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp)
> +{
> + return intel_dp->alpm_dpcd & DP_ALPM_CAP;
> +}
> +
> +static bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp)
> +{
> + return intel_dp->alpm_dpcd & DP_ALPM_AUX_LESS_CAP;
> +}
> +
> +void intel_alpm_get_capability(struct intel_dp *intel_dp)
> +{
> + u8 dpcd;
> +
> + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP, &dpcd) < 0)
> + return;
> +
> + intel_dp->alpm_dpcd = dpcd;
> +}
> +
> /*
> * See Bspec: 71632 for the table
> *
> @@ -243,6 +263,47 @@ bool intel_alpm_compute_params(struct intel_dp *intel_dp,
> return true;
> }
>
> +void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
Please prefer something_something_compute_config() naming instead of
something_compute_something_config().
BR,
Jani.
> + struct intel_crtc_state *crtc_state,
> + struct drm_connector_state *conn_state)
> +{
> + struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> + int waketime_in_lines, first_sdp_position;
> + int context_latency, guardband;
> +
> + if (!intel_dp_is_edp(intel_dp))
> + return;
> +
> + if (DISPLAY_VER(i915) < 20)
> + return;
> +
> + if (!intel_dp_as_sdp_supported(intel_dp))
> + return;
> +
> + if (crtc_state->has_psr)
> + return;
> +
> + if (!(intel_alpm_aux_wake_supported(intel_dp) ||
> + intel_alpm_aux_less_wake_supported(intel_dp)))
> + return;
> +
> + if (!intel_alpm_compute_params(intel_dp, crtc_state))
> + return;
> +
> + context_latency = adjusted_mode->crtc_vblank_start - adjusted_mode->crtc_vdisplay;
> + guardband = adjusted_mode->crtc_vtotal -
> + adjusted_mode->crtc_vdisplay - context_latency;
> + first_sdp_position = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_start;
> + if (intel_alpm_aux_less_wake_supported(intel_dp))
> + waketime_in_lines = intel_dp->alpm_parameters.io_wake_lines;
> + else
> + waketime_in_lines = intel_dp->alpm_parameters.fast_wake_lines;
> +
> + crtc_state->has_lobf = (context_latency + guardband) >
> + (first_sdp_position + waketime_in_lines);
> +}
> +
> static void lnl_alpm_configure(struct intel_dp *intel_dp)
> {
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
> index c45d078e5a6b..45c07f023a63 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> @@ -10,9 +10,14 @@
>
> struct intel_dp;
> struct intel_crtc_state;
> +struct drm_connector_state;
>
> +void intel_alpm_get_capability(struct intel_dp *intel_dp);
> bool intel_alpm_compute_params(struct intel_dp *intel_dp,
> struct intel_crtc_state *crtc_state);
> +void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
> + struct intel_crtc_state *crtc_state,
> + struct drm_connector_state *conn_state);
> void intel_alpm_configure(struct intel_dp *intel_dp);
>
> #endif
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 0ad6134ba94e..d77a9f22b5c6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1410,6 +1410,9 @@ struct intel_crtc_state {
>
> /* for loading single buffered registers during vblank */
> struct drm_vblank_work vblank_work;
> +
> + /* LOBF flag */
> + bool has_lobf;
> };
>
> enum intel_pipe_crc_source {
> @@ -1845,6 +1848,8 @@ struct intel_dp {
> u8 silence_period_sym_clocks;
> u8 lfps_half_cycle_num_of_syms;
> } alpm_parameters;
> +
> + u8 alpm_dpcd;
> };
>
> enum lspcon_vendor {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index c0a3b6d50681..61ee66ad8bd0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -48,6 +48,7 @@
> #include "i915_drv.h"
> #include "i915_irq.h"
> #include "i915_reg.h"
> +#include "intel_alpm.h"
> #include "intel_atomic.h"
> #include "intel_audio.h"
> #include "intel_backlight.h"
> @@ -3000,6 +3001,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> intel_vrr_compute_config(pipe_config, conn_state);
> intel_dp_compute_as_sdp(intel_dp, pipe_config);
> intel_psr_compute_config(intel_dp, pipe_config, conn_state);
> + intel_alpm_compute_lobf_config(intel_dp, pipe_config, conn_state);
> intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16);
> intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
> intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
> @@ -6616,6 +6618,8 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
>
> intel_pps_init_late(intel_dp);
>
> + intel_alpm_get_capability(intel_dp);
> +
> return true;
>
> out_vdd_off:
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v5 5/6] drm/i915/alpm: Enable lobf from source in ALPM_CTL
2024-05-20 10:48 [PATCH v5 0/6] Link off between frames for edp Animesh Manna
` (3 preceding siblings ...)
2024-05-20 10:48 ` [PATCH v5 4/6] drm/i915/alpm: Add compute config for lobf Animesh Manna
@ 2024-05-20 10:48 ` Animesh Manna
2024-05-20 10:48 ` [PATCH v5 6/6] drm/i915/alpm: Add debugfs for LOBF Animesh Manna
` (4 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Animesh Manna @ 2024-05-20 10:48 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, jani.nikula, jouni.hogander, arun.r.murthy,
Animesh Manna
Set the Link Off Between Frames Enable bit in ALPM_CTL register.
Note: Lobf need to be enabled adaptive sync fixed refresh mode
where vmin = vmax = flipline, which will arise after cmmr feature
enablement. Will add enabling sequence in a separate patch.
v1: Initial version.
v2: Condition check modified in alpm_configure(). [Jouni]
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
drivers/gpu/drm/i915/display/intel_alpm.c | 16 +++++++++++-----
drivers/gpu/drm/i915/display/intel_alpm.h | 4 ++--
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
3 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index c2334197e723..8f4da817ef55 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -304,10 +304,11 @@ void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
(first_sdp_position + waketime_in_lines);
}
-static void lnl_alpm_configure(struct intel_dp *intel_dp)
+static void lnl_alpm_configure(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
u32 alpm_ctl;
if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp->psr.sel_update_enabled &&
@@ -318,7 +319,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp)
* Panel Replay on eDP is always using ALPM aux less. I.e. no need to
* check panel support at this point.
*/
- if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
+ if ((intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) ||
+ (crtc_state->has_lobf && intel_alpm_aux_less_wake_supported(intel_dp))) {
alpm_ctl = ALPM_CTL_ALPM_ENABLE |
ALPM_CTL_ALPM_AUX_LESS_ENABLE |
ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;
@@ -345,12 +347,16 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp)
ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp->alpm_parameters.fast_wake_lines);
}
+ if (crtc_state->has_lobf)
+ alpm_ctl |= ALPM_CTL_LOBF_ENABLE;
+
alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp->alpm_parameters.check_entry_lines);
intel_de_write(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder), alpm_ctl);
}
-void intel_alpm_configure(struct intel_dp *intel_dp)
+void intel_alpm_configure(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state)
{
- lnl_alpm_configure(intel_dp);
+ lnl_alpm_configure(intel_dp, crtc_state);
}
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
index 45c07f023a63..fd9be8aa876c 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.h
+++ b/drivers/gpu/drm/i915/display/intel_alpm.h
@@ -18,6 +18,6 @@ bool intel_alpm_compute_params(struct intel_dp *intel_dp,
void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state);
-void intel_alpm_configure(struct intel_dp *intel_dp);
-
+void intel_alpm_configure(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state);
#endif
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index e2d3be0bf99c..10c71e79a1c8 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1692,7 +1692,7 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
IGNORE_PSR2_HW_TRACKING : 0);
if (intel_dp_is_edp(intel_dp))
- intel_alpm_configure(intel_dp);
+ intel_alpm_configure(intel_dp, crtc_state);
/*
* Wa_16013835468
--
2.29.0
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v5 6/6] drm/i915/alpm: Add debugfs for LOBF
2024-05-20 10:48 [PATCH v5 0/6] Link off between frames for edp Animesh Manna
` (4 preceding siblings ...)
2024-05-20 10:48 ` [PATCH v5 5/6] drm/i915/alpm: Enable lobf from source in ALPM_CTL Animesh Manna
@ 2024-05-20 10:48 ` Animesh Manna
2024-05-20 12:12 ` Jani Nikula
2024-05-20 13:09 ` ✗ Fi.CI.CHECKPATCH: warning for Link off between frames for edp (rev5) Patchwork
` (3 subsequent siblings)
9 siblings, 1 reply; 13+ messages in thread
From: Animesh Manna @ 2024-05-20 10:48 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, jani.nikula, jouni.hogander, arun.r.murthy,
Animesh Manna
For validation purpose add debugfs for LOBF.
v1: Initial version.
v2: Add aux-wake/less info along with lobf status. [Jouni]
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
drivers/gpu/drm/i915/display/intel_alpm.c | 49 +++++++++++++++++++
drivers/gpu/drm/i915/display/intel_alpm.h | 2 +
.../drm/i915/display/intel_display_debugfs.c | 2 +
3 files changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 8f4da817ef55..843ffb5fcb7a 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -360,3 +360,52 @@ void intel_alpm_configure(struct intel_dp *intel_dp,
{
lnl_alpm_configure(intel_dp, crtc_state);
}
+
+static int i915_edp_lobf_info_show(struct seq_file *m, void *data)
+{
+ struct intel_connector *connector = m->private;
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ struct drm_crtc *crtc;
+ struct intel_crtc_state *crtc_state;
+ enum transcoder cpu_transcoder;
+ u32 alpm_ctl;
+ int ret;
+
+ ret = drm_modeset_lock_single_interruptible(&dev_priv->drm.mode_config.connection_mutex);
+ if (ret)
+ return ret;
+
+ crtc = connector->base.state->crtc;
+ if (connector->base.status != connector_status_connected || !crtc) {
+ ret = -ENODEV;
+ goto out;
+ }
+
+ crtc_state = to_intel_crtc_state(crtc->state);
+ cpu_transcoder = crtc_state->cpu_transcoder;
+ alpm_ctl = intel_de_read(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder));
+ seq_printf(m, "LOBF status: %s\n", str_enabled_disabled(alpm_ctl & ALPM_CTL_LOBF_ENABLE));
+ seq_printf(m, "Aux-wake alpm status: %s\n",
+ str_enabled_disabled(!(alpm_ctl & ALPM_CTL_ALPM_AUX_LESS_ENABLE)));
+ seq_printf(m, "Aux-less alpm status: %s\n",
+ str_enabled_disabled(alpm_ctl & ALPM_CTL_ALPM_AUX_LESS_ENABLE));
+out:
+ drm_modeset_unlock(&dev_priv->drm.mode_config.connection_mutex);
+
+ return ret;
+}
+
+DEFINE_SHOW_ATTRIBUTE(i915_edp_lobf_info);
+
+void intel_alpm_lobf_debugfs_add(struct intel_connector *connector)
+{
+ struct drm_i915_private *i915 = to_i915(connector->base.dev);
+ struct dentry *root = connector->base.debugfs_entry;
+
+ if (DISPLAY_VER(i915) < 20 ||
+ connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
+ return;
+
+ debugfs_create_file("i915_edp_lobf_info", 0444, root,
+ connector, &i915_edp_lobf_info_fops);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
index fd9be8aa876c..0dab2068164a 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.h
+++ b/drivers/gpu/drm/i915/display/intel_alpm.h
@@ -11,6 +11,7 @@
struct intel_dp;
struct intel_crtc_state;
struct drm_connector_state;
+struct intel_connector;
void intel_alpm_get_capability(struct intel_dp *intel_dp);
bool intel_alpm_compute_params(struct intel_dp *intel_dp,
@@ -20,4 +21,5 @@ void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
struct drm_connector_state *conn_state);
void intel_alpm_configure(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
+void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
#endif
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 35f9f86ef70f..86d9900c40af 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -13,6 +13,7 @@
#include "i915_debugfs.h"
#include "i915_irq.h"
#include "i915_reg.h"
+#include "intel_alpm.h"
#include "intel_crtc.h"
#include "intel_de.h"
#include "intel_crtc_state_dump.h"
@@ -1515,6 +1516,7 @@ void intel_connector_debugfs_add(struct intel_connector *connector)
intel_drrs_connector_debugfs_add(connector);
intel_pps_connector_debugfs_add(connector);
intel_psr_connector_debugfs_add(connector);
+ intel_alpm_lobf_debugfs_add(connector);
if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
connector_type == DRM_MODE_CONNECTOR_HDMIA ||
--
2.29.0
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v5 6/6] drm/i915/alpm: Add debugfs for LOBF
2024-05-20 10:48 ` [PATCH v5 6/6] drm/i915/alpm: Add debugfs for LOBF Animesh Manna
@ 2024-05-20 12:12 ` Jani Nikula
0 siblings, 0 replies; 13+ messages in thread
From: Jani Nikula @ 2024-05-20 12:12 UTC (permalink / raw)
To: Animesh Manna, intel-gfx
Cc: dri-devel, jouni.hogander, arun.r.murthy, Animesh Manna
On Mon, 20 May 2024, Animesh Manna <animesh.manna@intel.com> wrote:
> For validation purpose add debugfs for LOBF.
>
> v1: Initial version.
> v2: Add aux-wake/less info along with lobf status. [Jouni]
>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_alpm.c | 49 +++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_alpm.h | 2 +
> .../drm/i915/display/intel_display_debugfs.c | 2 +
> 3 files changed, 53 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 8f4da817ef55..843ffb5fcb7a 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -360,3 +360,52 @@ void intel_alpm_configure(struct intel_dp *intel_dp,
> {
> lnl_alpm_configure(intel_dp, crtc_state);
> }
> +
> +static int i915_edp_lobf_info_show(struct seq_file *m, void *data)
> +{
> + struct intel_connector *connector = m->private;
> + struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> + struct drm_crtc *crtc;
> + struct intel_crtc_state *crtc_state;
> + enum transcoder cpu_transcoder;
> + u32 alpm_ctl;
> + int ret;
> +
> + ret = drm_modeset_lock_single_interruptible(&dev_priv->drm.mode_config.connection_mutex);
> + if (ret)
> + return ret;
> +
> + crtc = connector->base.state->crtc;
> + if (connector->base.status != connector_status_connected || !crtc) {
> + ret = -ENODEV;
> + goto out;
> + }
> +
> + crtc_state = to_intel_crtc_state(crtc->state);
> + cpu_transcoder = crtc_state->cpu_transcoder;
> + alpm_ctl = intel_de_read(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder));
> + seq_printf(m, "LOBF status: %s\n", str_enabled_disabled(alpm_ctl & ALPM_CTL_LOBF_ENABLE));
> + seq_printf(m, "Aux-wake alpm status: %s\n",
> + str_enabled_disabled(!(alpm_ctl & ALPM_CTL_ALPM_AUX_LESS_ENABLE)));
> + seq_printf(m, "Aux-less alpm status: %s\n",
> + str_enabled_disabled(alpm_ctl & ALPM_CTL_ALPM_AUX_LESS_ENABLE));
> +out:
> + drm_modeset_unlock(&dev_priv->drm.mode_config.connection_mutex);
> +
> + return ret;
> +}
> +
> +DEFINE_SHOW_ATTRIBUTE(i915_edp_lobf_info);
> +
> +void intel_alpm_lobf_debugfs_add(struct intel_connector *connector)
This file is about alpm, and might add more alpm related debugfs files
later. There's no need to encode lobf in the name here.
> +{
> + struct drm_i915_private *i915 = to_i915(connector->base.dev);
> + struct dentry *root = connector->base.debugfs_entry;
> +
> + if (DISPLAY_VER(i915) < 20 ||
> + connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> + return;
> +
> + debugfs_create_file("i915_edp_lobf_info", 0444, root,
Why does the filename need to include edp? The connector debugfs files
for psr don't include that either.
> + connector, &i915_edp_lobf_info_fops);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
> index fd9be8aa876c..0dab2068164a 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> @@ -11,6 +11,7 @@
> struct intel_dp;
> struct intel_crtc_state;
> struct drm_connector_state;
> +struct intel_connector;
>
> void intel_alpm_get_capability(struct intel_dp *intel_dp);
> bool intel_alpm_compute_params(struct intel_dp *intel_dp,
> @@ -20,4 +21,5 @@ void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp,
> struct drm_connector_state *conn_state);
> void intel_alpm_configure(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state);
> +void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
> #endif
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 35f9f86ef70f..86d9900c40af 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -13,6 +13,7 @@
> #include "i915_debugfs.h"
> #include "i915_irq.h"
> #include "i915_reg.h"
> +#include "intel_alpm.h"
> #include "intel_crtc.h"
> #include "intel_de.h"
> #include "intel_crtc_state_dump.h"
> @@ -1515,6 +1516,7 @@ void intel_connector_debugfs_add(struct intel_connector *connector)
> intel_drrs_connector_debugfs_add(connector);
> intel_pps_connector_debugfs_add(connector);
> intel_psr_connector_debugfs_add(connector);
> + intel_alpm_lobf_debugfs_add(connector);
All the others are intel_foo_connector_debugfs_add(). So should this.
>
> if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
> connector_type == DRM_MODE_CONNECTOR_HDMIA ||
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Link off between frames for edp (rev5)
2024-05-20 10:48 [PATCH v5 0/6] Link off between frames for edp Animesh Manna
` (5 preceding siblings ...)
2024-05-20 10:48 ` [PATCH v5 6/6] drm/i915/alpm: Add debugfs for LOBF Animesh Manna
@ 2024-05-20 13:09 ` Patchwork
2024-05-20 13:09 ` ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2024-05-20 13:09 UTC (permalink / raw)
To: Animesh Manna; +Cc: intel-gfx
== Series Details ==
Series: Link off between frames for edp (rev5)
URL : https://patchwork.freedesktop.org/series/130650/
State : warning
== Summary ==
Error: dim checkpatch failed
70ca27e269fd drm/i915/alpm: Move alpm parameters from intel_psr
-:83: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#83: FILE: drivers/gpu/drm/i915/display/intel_psr.c:958:
+ tmp = map[intel_dp->alpm_parameters.fast_wake_lines - TGL_EDP_PSR2_FAST_WAKE_MIN_LINES];
total: 0 errors, 1 warnings, 0 checks, 143 lines checked
282883ab4b76 drm/i915/alpm: Move alpm related code to a new file
-:27: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#27:
new file mode 100644
-:233: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#233: FILE: drivers/gpu/drm/i915/display/intel_alpm.c:202:
+bool intel_alpm_compute_params(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state)
-:255: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#255: FILE: drivers/gpu/drm/i915/display/intel_alpm.c:224:
+ io_wake_lines = intel_usecs_to_scanlines(
-:257: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#257: FILE: drivers/gpu/drm/i915/display/intel_alpm.c:226:
+ fast_wake_lines = intel_usecs_to_scanlines(
-:268: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#268: FILE: drivers/gpu/drm/i915/display/intel_alpm.c:237:
+ io_wake_lines = fast_wake_lines = max_wake_lines;
-:301: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#301: FILE: drivers/gpu/drm/i915/display/intel_alpm.c:270:
+ PORT_ALPM_CTL_SILENCE_PERIOD(
-:307: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#307: FILE: drivers/gpu/drm/i915/display/intel_alpm.c:276:
+ PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
-:309: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#309: FILE: drivers/gpu/drm/i915/display/intel_alpm.c:278:
+ PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(
-:311: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#311: FILE: drivers/gpu/drm/i915/display/intel_alpm.c:280:
+ PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(
total: 0 errors, 1 warnings, 8 checks, 640 lines checked
5267bfc09f04 drm/display: Add missing aux less alpm wake related bits
dcf0642f3fdf drm/i915/alpm: Add compute config for lobf
60be9b73a915 drm/i915/alpm: Enable lobf from source in ALPM_CTL
c98622a7d6de drm/i915/alpm: Add debugfs for LOBF
^ permalink raw reply [flat|nested] 13+ messages in thread* ✗ Fi.CI.SPARSE: warning for Link off between frames for edp (rev5)
2024-05-20 10:48 [PATCH v5 0/6] Link off between frames for edp Animesh Manna
` (6 preceding siblings ...)
2024-05-20 13:09 ` ✗ Fi.CI.CHECKPATCH: warning for Link off between frames for edp (rev5) Patchwork
@ 2024-05-20 13:09 ` Patchwork
2024-05-20 13:30 ` ✓ Fi.CI.BAT: success " Patchwork
2024-05-20 17:24 ` ✓ Fi.CI.IGT: " Patchwork
9 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2024-05-20 13:09 UTC (permalink / raw)
To: Animesh Manna; +Cc: intel-gfx
== Series Details ==
Series: Link off between frames for edp (rev5)
URL : https://patchwork.freedesktop.org/series/130650/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 13+ messages in thread* ✓ Fi.CI.BAT: success for Link off between frames for edp (rev5)
2024-05-20 10:48 [PATCH v5 0/6] Link off between frames for edp Animesh Manna
` (7 preceding siblings ...)
2024-05-20 13:09 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2024-05-20 13:30 ` Patchwork
2024-05-20 17:24 ` ✓ Fi.CI.IGT: " Patchwork
9 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2024-05-20 13:30 UTC (permalink / raw)
To: Animesh Manna; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 3229 bytes --]
== Series Details ==
Series: Link off between frames for edp (rev5)
URL : https://patchwork.freedesktop.org/series/130650/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14785 -> Patchwork_130650v5
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/index.html
Participating hosts (41 -> 41)
------------------------------
Additional (1): fi-kbl-8809g
Missing (1): fi-glk-j4005
Known issues
------------
Here are the changes found in Patchwork_130650v5 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_huc_copy@huc-copy:
- fi-kbl-8809g: NOTRUN -> [SKIP][1] ([i915#2190])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/fi-kbl-8809g/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-8809g: NOTRUN -> [SKIP][2] ([i915#4613]) +3 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/fi-kbl-8809g/igt@gem_lmem_swapping@basic.html
* igt@i915_selftest@live@execlists:
- fi-bsw-nick: [PASS][3] -> [ABORT][4] ([i915#10594])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/fi-bsw-nick/igt@i915_selftest@live@execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/fi-bsw-nick/igt@i915_selftest@live@execlists.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-kbl-8809g: NOTRUN -> [SKIP][5] +30 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/fi-kbl-8809g/igt@kms_force_connector_basic@force-load-detect.html
#### Possible fixes ####
* igt@i915_module_load@load:
- bat-dg2-8: [DMESG-WARN][6] ([i915#10014]) -> [PASS][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/bat-dg2-8/igt@i915_module_load@load.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/bat-dg2-8/igt@i915_module_load@load.html
* igt@i915_selftest@live@gt_timelines:
- bat-arls-2: [INCOMPLETE][8] -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/bat-arls-2/igt@i915_selftest@live@gt_timelines.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/bat-arls-2/igt@i915_selftest@live@gt_timelines.html
[i915#10014]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10014
[i915#10594]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10594
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
Build changes
-------------
* Linux: CI_DRM_14785 -> Patchwork_130650v5
CI-20190529: 20190529
CI_DRM_14785: 1ba62f8cea9c797427d45108df1d453f4b343240 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7863: fa1dc232d5d840532521df8a6fcf1fe82c514304 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_130650v5: 1ba62f8cea9c797427d45108df1d453f4b343240 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/index.html
[-- Attachment #2: Type: text/html, Size: 3982 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread* ✓ Fi.CI.IGT: success for Link off between frames for edp (rev5)
2024-05-20 10:48 [PATCH v5 0/6] Link off between frames for edp Animesh Manna
` (8 preceding siblings ...)
2024-05-20 13:30 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2024-05-20 17:24 ` Patchwork
9 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2024-05-20 17:24 UTC (permalink / raw)
To: Animesh Manna; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 67187 bytes --]
== Series Details ==
Series: Link off between frames for edp (rev5)
URL : https://patchwork.freedesktop.org/series/130650/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14785_full -> Patchwork_130650v5_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 9)
------------------------------
No changes in participating hosts
New tests
---------
New tests have been introduced between CI_DRM_14785_full and Patchwork_130650v5_full:
### New IGT tests (3) ###
* igt@perf@blocking@1-vcs1:
- Statuses : 1 pass(s)
- Exec time: [10.02] s
* igt@perf@enable-disable@1-vcs0:
- Statuses : 1 pass(s)
- Exec time: [4.23] s
* igt@perf@oa-exponents@1-vcs0:
- Statuses : 1 pass(s)
- Exec time: [1.85] s
Known issues
------------
Here are the changes found in Patchwork_130650v5_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@device_reset@cold-reset-bound:
- shard-rkl: NOTRUN -> [SKIP][1] ([i915#11078])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@device_reset@cold-reset-bound.html
* igt@device_reset@unbind-cold-reset-rebind:
- shard-dg1: NOTRUN -> [SKIP][2] ([i915#11078])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@device_reset@unbind-cold-reset-rebind.html
* igt@device_reset@unbind-reset-rebind:
- shard-dg1: NOTRUN -> [INCOMPLETE][3] ([i915#9408])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-18/igt@device_reset@unbind-reset-rebind.html
* igt@drm_fdinfo@virtual-busy-all:
- shard-dg1: NOTRUN -> [SKIP][4] ([i915#8414]) +2 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@drm_fdinfo@virtual-busy-all.html
* igt@drm_fdinfo@virtual-idle:
- shard-rkl: NOTRUN -> [FAIL][5] ([i915#7742])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@drm_fdinfo@virtual-idle.html
* igt@gem_ccs@block-multicopy-compressed:
- shard-rkl: NOTRUN -> [SKIP][6] ([i915#9323])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@gem_ccs@block-multicopy-compressed.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-rkl: NOTRUN -> [SKIP][7] ([i915#6335])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_ctx_freq@sysfs@gt0:
- shard-dg2: [PASS][8] -> [FAIL][9] ([i915#9561])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-1/igt@gem_ctx_freq@sysfs@gt0.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-11/igt@gem_ctx_freq@sysfs@gt0.html
* igt@gem_ctx_persistence@heartbeat-hostile:
- shard-dg1: NOTRUN -> [SKIP][10] ([i915#8555])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-15/igt@gem_ctx_persistence@heartbeat-hostile.html
* igt@gem_ctx_sseu@invalid-args:
- shard-dg1: NOTRUN -> [SKIP][11] ([i915#280])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@gem_ctx_sseu@invalid-args.html
* igt@gem_eio@kms:
- shard-tglu: [PASS][12] -> [INCOMPLETE][13] ([i915#10513])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-tglu-6/igt@gem_eio@kms.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-5/igt@gem_eio@kms.html
- shard-dg1: NOTRUN -> [INCOMPLETE][14] ([i915#10513])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-15/igt@gem_eio@kms.html
* igt@gem_exec_balancer@bonded-sync:
- shard-dg1: NOTRUN -> [SKIP][15] ([i915#4771])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-18/igt@gem_exec_balancer@bonded-sync.html
* igt@gem_exec_balancer@parallel-contexts:
- shard-rkl: NOTRUN -> [SKIP][16] ([i915#4525])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@gem_exec_balancer@parallel-contexts.html
* igt@gem_exec_capture@capture-recoverable:
- shard-rkl: NOTRUN -> [SKIP][17] ([i915#6344])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@gem_exec_capture@capture-recoverable.html
* igt@gem_exec_capture@capture@vecs0-lmem0:
- shard-dg1: NOTRUN -> [FAIL][18] ([i915#10386]) +1 other test fail
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@gem_exec_capture@capture@vecs0-lmem0.html
* igt@gem_exec_capture@many-4k-incremental:
- shard-dg1: NOTRUN -> [FAIL][19] ([i915#9606])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@gem_exec_capture@many-4k-incremental.html
* igt@gem_exec_capture@many-4k-zero:
- shard-rkl: NOTRUN -> [FAIL][20] ([i915#9606])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@gem_exec_capture@many-4k-zero.html
* igt@gem_exec_fair@basic-deadline:
- shard-dg1: NOTRUN -> [SKIP][21] ([i915#3539] / [i915#4852]) +3 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-18/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-rkl: NOTRUN -> [FAIL][22] ([i915#2842])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_reloc@basic-scanout:
- shard-rkl: NOTRUN -> [SKIP][23] ([i915#3281]) +9 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@gem_exec_reloc@basic-scanout.html
* igt@gem_exec_reloc@basic-write-gtt-active:
- shard-dg1: NOTRUN -> [SKIP][24] ([i915#3281]) +7 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-18/igt@gem_exec_reloc@basic-write-gtt-active.html
* igt@gem_exec_reloc@basic-write-read-active:
- shard-dg2: NOTRUN -> [SKIP][25] ([i915#3281]) +2 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@gem_exec_reloc@basic-write-read-active.html
* igt@gem_exec_schedule@pi-distinct-iova:
- shard-snb: NOTRUN -> [SKIP][26] +25 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-snb5/igt@gem_exec_schedule@pi-distinct-iova.html
* igt@gem_exec_schedule@reorder-wide:
- shard-dg1: NOTRUN -> [SKIP][27] ([i915#4812]) +1 other test skip
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-18/igt@gem_exec_schedule@reorder-wide.html
* igt@gem_fenced_exec_thrash@no-spare-fences-busy:
- shard-dg1: NOTRUN -> [SKIP][28] ([i915#4860]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html
* igt@gem_lmem_swapping@basic@lmem0:
- shard-dg2: [PASS][29] -> [FAIL][30] ([i915#10378])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-1/igt@gem_lmem_swapping@basic@lmem0.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-11/igt@gem_lmem_swapping@basic@lmem0.html
* igt@gem_lmem_swapping@massive-random:
- shard-tglu: NOTRUN -> [SKIP][31] ([i915#4613])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@gem_lmem_swapping@massive-random.html
* igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-rkl: NOTRUN -> [SKIP][32] ([i915#4613]) +4 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
* igt@gem_lmem_swapping@verify-random-ccs:
- shard-glk: NOTRUN -> [SKIP][33] ([i915#4613]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-glk6/igt@gem_lmem_swapping@verify-random-ccs.html
* igt@gem_mmap_gtt@basic-write-gtt:
- shard-dg2: NOTRUN -> [SKIP][34] ([i915#4077])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@gem_mmap_gtt@basic-write-gtt.html
* igt@gem_mmap_offset@clear@smem0:
- shard-mtlp: [PASS][35] -> [ABORT][36] ([i915#10029] / [i915#10729])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-mtlp-5/igt@gem_mmap_offset@clear@smem0.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-mtlp-2/igt@gem_mmap_offset@clear@smem0.html
* igt@gem_mmap_wc@bad-size:
- shard-dg2: NOTRUN -> [SKIP][37] ([i915#4083])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@gem_mmap_wc@bad-size.html
* igt@gem_mmap_wc@write-prefaulted:
- shard-dg1: NOTRUN -> [SKIP][38] ([i915#4083]) +2 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@gem_mmap_wc@write-prefaulted.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-dg1: NOTRUN -> [SKIP][39] ([i915#3282]) +4 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-18/igt@gem_partial_pwrite_pread@writes-after-reads.html
- shard-dg2: NOTRUN -> [SKIP][40] ([i915#3282])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gem_pwrite@basic-self:
- shard-rkl: NOTRUN -> [SKIP][41] ([i915#3282]) +8 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@gem_pwrite@basic-self.html
* igt@gem_pxp@protected-encrypted-src-copy-not-readible:
- shard-dg1: NOTRUN -> [SKIP][42] ([i915#4270]) +3 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html
* igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
- shard-rkl: NOTRUN -> [SKIP][43] ([i915#4270]) +4 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
* igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
- shard-tglu: NOTRUN -> [SKIP][44] ([i915#4270]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html
* igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled:
- shard-dg2: NOTRUN -> [SKIP][45] ([i915#5190] / [i915#8428])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled.html
* igt@gem_set_tiling_vs_blt@tiled-to-untiled:
- shard-rkl: NOTRUN -> [SKIP][46] ([i915#8411])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
* igt@gem_set_tiling_vs_blt@untiled-to-tiled:
- shard-dg1: NOTRUN -> [SKIP][47] ([i915#4079]) +1 other test skip
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html
* igt@gem_tiled_partial_pwrite_pread@writes-after-reads:
- shard-dg1: NOTRUN -> [SKIP][48] ([i915#4077]) +10 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@gem_tiled_partial_pwrite_pread@writes-after-reads.html
* igt@gem_userptr_blits@create-destroy-unsync:
- shard-rkl: NOTRUN -> [SKIP][49] ([i915#3297]) +1 other test skip
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@gem_userptr_blits@create-destroy-unsync.html
* igt@gem_userptr_blits@map-fixed-invalidate:
- shard-dg1: NOTRUN -> [SKIP][50] ([i915#3297] / [i915#4880]) +1 other test skip
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@gem_userptr_blits@map-fixed-invalidate.html
* igt@gem_userptr_blits@unsync-unmap:
- shard-dg1: NOTRUN -> [SKIP][51] ([i915#3297])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@gem_userptr_blits@unsync-unmap.html
* igt@gen9_exec_parse@basic-rejected-ctx-param:
- shard-tglu: NOTRUN -> [SKIP][52] ([i915#2527] / [i915#2856])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@gen9_exec_parse@basic-rejected-ctx-param.html
* igt@gen9_exec_parse@bb-secure:
- shard-dg1: NOTRUN -> [SKIP][53] ([i915#2527]) +2 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-15/igt@gen9_exec_parse@bb-secure.html
* igt@gen9_exec_parse@bb-start-param:
- shard-rkl: NOTRUN -> [SKIP][54] ([i915#2527]) +3 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@gen9_exec_parse@bb-start-param.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-rkl: [PASS][55] -> [INCOMPLETE][56] ([i915#9820] / [i915#9849])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-rkl-5/igt@i915_module_load@reload-with-fault-injection.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@i915_module_load@reload-with-fault-injection.html
- shard-mtlp: [PASS][57] -> [ABORT][58] ([i915#10131] / [i915#10887] / [i915#9820])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-mtlp-1/igt@i915_module_load@reload-with-fault-injection.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-mtlp-3/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_module_load@resize-bar:
- shard-rkl: NOTRUN -> [SKIP][59] ([i915#6412])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@i915_module_load@resize-bar.html
* igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0:
- shard-dg1: [PASS][60] -> [FAIL][61] ([i915#3591]) +1 other test fail
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html
* igt@i915_pm_rpm@gem-execbuf-stress-pc8:
- shard-glk: NOTRUN -> [SKIP][62] +70 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-glk6/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html
* igt@i915_pm_rps@basic-api:
- shard-dg1: NOTRUN -> [SKIP][63] ([i915#6621])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@i915_pm_rps@basic-api.html
* igt@i915_pm_rps@thresholds-idle@gt0:
- shard-dg1: NOTRUN -> [SKIP][64] ([i915#8925])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-18/igt@i915_pm_rps@thresholds-idle@gt0.html
* igt@i915_pm_sseu@full-enable:
- shard-rkl: NOTRUN -> [SKIP][65] ([i915#4387])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@i915_pm_sseu@full-enable.html
- shard-tglu: NOTRUN -> [SKIP][66] ([i915#4387])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@i915_pm_sseu@full-enable.html
* igt@i915_query@test-query-geometry-subslices:
- shard-rkl: NOTRUN -> [SKIP][67] ([i915#5723])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@i915_query@test-query-geometry-subslices.html
* igt@intel_hwmon@hwmon-write:
- shard-rkl: NOTRUN -> [SKIP][68] ([i915#7707])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@intel_hwmon@hwmon-write.html
* igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling:
- shard-dg1: NOTRUN -> [SKIP][69] ([i915#4212])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-hdmi-a-1-4-mc-ccs:
- shard-dg2: NOTRUN -> [SKIP][70] ([i915#8709]) +11 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-10/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-hdmi-a-1-4-mc-ccs.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-dg1: NOTRUN -> [SKIP][71] ([i915#9531])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-dg1: NOTRUN -> [SKIP][72] ([i915#4538] / [i915#5286])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-15/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-0:
- shard-rkl: NOTRUN -> [SKIP][73] ([i915#5286]) +6 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_big_fb@4-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-addfb-size-overflow:
- shard-dg1: NOTRUN -> [SKIP][74] ([i915#5286])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180:
- shard-tglu: NOTRUN -> [SKIP][75] ([i915#5286]) +1 other test skip
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180:
- shard-mtlp: [PASS][76] -> [DMESG-FAIL][77] ([i915#2017])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-mtlp-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-mtlp-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][78] ([i915#3638]) +2 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-270:
- shard-dg1: NOTRUN -> [SKIP][79] ([i915#3638]) +2 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-dg1: NOTRUN -> [SKIP][80] ([i915#4538]) +3 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-dg2: NOTRUN -> [SKIP][81] ([i915#4538] / [i915#5190])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_joiner@basic:
- shard-rkl: NOTRUN -> [SKIP][82] ([i915#10656])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_big_joiner@basic.html
* igt@kms_big_joiner@invalid-modeset-force-joiner:
- shard-dg1: NOTRUN -> [SKIP][83] ([i915#10656])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-15/igt@kms_big_joiner@invalid-modeset-force-joiner.html
* igt@kms_ccs@bad-aux-stride-yf-tiled-ccs@pipe-d-hdmi-a-2:
- shard-dg2: NOTRUN -> [SKIP][84] ([i915#10307] / [i915#6095]) +148 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-2/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs@pipe-d-hdmi-a-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][85] ([i915#6095]) +59 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-4.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-xe2-ccs:
- shard-rkl: NOTRUN -> [SKIP][86] ([i915#10278]) +1 other test skip
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-xe2-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][87] ([i915#6095]) +7 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-xe2-ccs:
- shard-dg1: NOTRUN -> [SKIP][88] ([i915#10278]) +1 other test skip
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@kms_ccs@random-ccs-data-4-tiled-xe2-ccs.html
* igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][89] ([i915#6095]) +61 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][90] ([i915#10307] / [i915#10434] / [i915#6095]) +2 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-4/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-hdmi-a-1.html
* igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][91] ([i915#7213]) +3 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-10/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1.html
* igt@kms_cdclk@plane-scaling:
- shard-rkl: NOTRUN -> [SKIP][92] ([i915#3742]) +1 other test skip
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_cdclk@plane-scaling.html
- shard-tglu: NOTRUN -> [SKIP][93] ([i915#3742])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_cdclk@plane-scaling.html
* igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][94] ([i915#4087]) +3 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-5/igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3.html
* igt@kms_chamelium_audio@hdmi-audio-edid:
- shard-dg1: NOTRUN -> [SKIP][95] ([i915#7828]) +8 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_chamelium_audio@hdmi-audio-edid.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-dg2: NOTRUN -> [SKIP][96] +3 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k:
- shard-tglu: NOTRUN -> [SKIP][97] ([i915#7828]) +1 other test skip
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html
* igt@kms_chamelium_hpd@vga-hpd-fast:
- shard-rkl: NOTRUN -> [SKIP][98] ([i915#7828]) +9 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_chamelium_hpd@vga-hpd-fast.html
* igt@kms_content_protection@atomic@pipe-a-dp-4:
- shard-dg2: NOTRUN -> [TIMEOUT][99] ([i915#7173])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-11/igt@kms_content_protection@atomic@pipe-a-dp-4.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-dg2: NOTRUN -> [SKIP][100] ([i915#3299])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@uevent:
- shard-rkl: NOTRUN -> [SKIP][101] ([i915#7118] / [i915#9424]) +1 other test skip
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-onscreen-max-size:
- shard-dg2: NOTRUN -> [SKIP][102] ([i915#3555]) +1 other test skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_cursor_crc@cursor-onscreen-max-size.html
* igt@kms_cursor_crc@cursor-random-32x32:
- shard-tglu: NOTRUN -> [SKIP][103] ([i915#3555]) +2 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_cursor_crc@cursor-random-32x32.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-dg1: NOTRUN -> [SKIP][104] ([i915#3359]) +2 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-rkl: NOTRUN -> [SKIP][105] ([i915#3359]) +1 other test skip
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
- shard-rkl: NOTRUN -> [SKIP][106] ([i915#4103])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
* igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
- shard-rkl: NOTRUN -> [SKIP][107] ([i915#9067])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
* igt@kms_cursor_legacy@torture-move@pipe-a:
- shard-snb: [PASS][108] -> [DMESG-WARN][109] ([i915#10166])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-snb5/igt@kms_cursor_legacy@torture-move@pipe-a.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-snb2/igt@kms_cursor_legacy@torture-move@pipe-a.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-rkl: NOTRUN -> [SKIP][110] ([i915#9723])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-2:
- shard-dg2: NOTRUN -> [SKIP][111] ([i915#9227])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-2/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-2.html
* igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][112] ([i915#9723])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-3.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][113] ([i915#3804])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_draw_crc@draw-method-mmap-wc:
- shard-dg1: NOTRUN -> [SKIP][114] ([i915#8812])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-18/igt@kms_draw_crc@draw-method-mmap-wc.html
* igt@kms_dsc@dsc-basic:
- shard-dg1: NOTRUN -> [SKIP][115] ([i915#3555] / [i915#3840])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@kms_dsc@dsc-basic.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-rkl: NOTRUN -> [SKIP][116] ([i915#3840])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-with-output-formats:
- shard-dg2: NOTRUN -> [SKIP][117] ([i915#3555] / [i915#3840])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_dsc@dsc-with-output-formats.html
* igt@kms_feature_discovery@display-4x:
- shard-dg1: NOTRUN -> [SKIP][118] ([i915#1839])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_feature_discovery@display-4x.html
* igt@kms_flip@2x-flip-vs-panning-interruptible:
- shard-tglu: NOTRUN -> [SKIP][119] ([i915#3637])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_flip@2x-flip-vs-panning-interruptible.html
* igt@kms_flip@2x-plain-flip:
- shard-rkl: NOTRUN -> [SKIP][120] +57 other tests skip
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_flip@2x-plain-flip.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-dg1: NOTRUN -> [SKIP][121] ([i915#9934]) +4 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-18/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@2x-plain-flip-ts-check:
- shard-tglu: NOTRUN -> [SKIP][122] ([i915#3637] / [i915#3966])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_flip@2x-plain-flip-ts-check.html
* igt@kms_flip@blocking-wf_vblank@b-vga1:
- shard-snb: [PASS][123] -> [FAIL][124] ([i915#2122]) +1 other test fail
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-snb2/igt@kms_flip@blocking-wf_vblank@b-vga1.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-snb7/igt@kms_flip@blocking-wf_vblank@b-vga1.html
* igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a4:
- shard-dg1: NOTRUN -> [FAIL][125] ([i915#2122]) +1 other test fail
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-18/igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a4.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][126] ([i915#2672]) +4 other tests skip
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][127] ([i915#2587] / [i915#2672])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-dg1: NOTRUN -> [SKIP][128] ([i915#2587] / [i915#2672]) +3 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
- shard-dg2: NOTRUN -> [SKIP][129] ([i915#5354]) +7 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite:
- shard-dg2: NOTRUN -> [SKIP][130] ([i915#3458]) +2 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][131] ([i915#8708]) +1 other test skip
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@pipe-fbc-rte:
- shard-rkl: NOTRUN -> [SKIP][132] ([i915#9766])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
- shard-tglu: NOTRUN -> [SKIP][133] ([i915#9766])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt:
- shard-dg1: NOTRUN -> [SKIP][134] ([i915#3458]) +9 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-dg1: NOTRUN -> [SKIP][135] ([i915#8708]) +18 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-15/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
- shard-rkl: NOTRUN -> [SKIP][136] ([i915#1825]) +36 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-modesetfrombusy:
- shard-rkl: NOTRUN -> [SKIP][137] ([i915#3023]) +30 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html
* igt@kms_frontbuffer_tracking@psr-rgb565-draw-blt:
- shard-tglu: NOTRUN -> [SKIP][138] +18 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_frontbuffer_tracking@psr-rgb565-draw-blt.html
* igt@kms_hdr@static-toggle:
- shard-rkl: NOTRUN -> [SKIP][139] ([i915#3555] / [i915#8228]) +2 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_hdr@static-toggle.html
- shard-tglu: NOTRUN -> [SKIP][140] ([i915#3555] / [i915#8228])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_hdr@static-toggle.html
* igt@kms_plane_lowres@tiling-yf:
- shard-rkl: NOTRUN -> [SKIP][141] ([i915#3555]) +6 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_multiple@tiling-y:
- shard-dg2: NOTRUN -> [SKIP][142] ([i915#8806])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_plane_multiple@tiling-y.html
* igt@kms_plane_multiple@tiling-yf:
- shard-dg1: NOTRUN -> [SKIP][143] ([i915#3555]) +6 other tests skip
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
- shard-tglu: NOTRUN -> [FAIL][144] ([i915#8292])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4:
- shard-dg1: NOTRUN -> [FAIL][145] ([i915#8292])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][146] ([i915#9423]) +11 other tests skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b-hdmi-a-4.html
* igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][147] ([i915#9423]) +11 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-1/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a-hdmi-a-2.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-d-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][148] ([i915#9423]) +3 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-d-hdmi-a-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][149] ([i915#5235]) +3 other tests skip
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-6/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][150] ([i915#5235]) +3 other tests skip
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-3.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-dp-4:
- shard-dg2: NOTRUN -> [SKIP][151] ([i915#5235] / [i915#9423]) +7 other tests skip
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-11/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-dp-4.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-rkl: NOTRUN -> [SKIP][152] ([i915#5354]) +1 other test skip
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-rkl: NOTRUN -> [SKIP][153] ([i915#9685])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_dc@dc6-dpms:
- shard-tglu: [PASS][154] -> [FAIL][155] ([i915#9295])
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-tglu-10/igt@kms_pm_dc@dc6-dpms.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-8/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-dg2: NOTRUN -> [SKIP][156] ([i915#9519])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-rkl: NOTRUN -> [SKIP][157] ([i915#9519])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_prime@basic-crc-hybrid:
- shard-rkl: NOTRUN -> [SKIP][158] ([i915#6524])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_prime@basic-crc-hybrid.html
* igt@kms_prime@basic-modeset-hybrid:
- shard-dg1: NOTRUN -> [SKIP][159] ([i915#6524])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-15/igt@kms_prime@basic-modeset-hybrid.html
* igt@kms_psr2_sf@fbc-overlay-plane-update-sf-dmg-area:
- shard-dg1: NOTRUN -> [SKIP][160] +39 other tests skip
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_psr2_sf@fbc-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-dg1: NOTRUN -> [SKIP][161] ([i915#9683])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-pr-suspend:
- shard-dg2: NOTRUN -> [SKIP][162] ([i915#1072] / [i915#9732]) +3 other tests skip
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_psr@fbc-pr-suspend.html
* igt@kms_psr@fbc-psr2-sprite-mmap-gtt:
- shard-dg1: NOTRUN -> [SKIP][163] ([i915#1072] / [i915#9732]) +14 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-15/igt@kms_psr@fbc-psr2-sprite-mmap-gtt.html
* igt@kms_psr@fbc-psr2-sprite-render:
- shard-rkl: NOTRUN -> [SKIP][164] ([i915#1072] / [i915#9732]) +25 other tests skip
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_psr@fbc-psr2-sprite-render.html
* igt@kms_psr@psr2-sprite-mmap-cpu:
- shard-tglu: NOTRUN -> [SKIP][165] ([i915#9732]) +4 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_psr@psr2-sprite-mmap-cpu.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-dg2: NOTRUN -> [SKIP][166] ([i915#9685])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-rkl: NOTRUN -> [SKIP][167] ([i915#5289]) +2 other tests skip
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
- shard-tglu: NOTRUN -> [SKIP][168] ([i915#5289]) +1 other test skip
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_rotation_crc@sprite-rotation-270:
- shard-dg2: NOTRUN -> [SKIP][169] ([i915#4235])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_rotation_crc@sprite-rotation-270.html
* igt@kms_sysfs_edid_timing:
- shard-dg1: NOTRUN -> [FAIL][170] ([IGT#2] / [i915#6493])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-15/igt@kms_sysfs_edid_timing.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-rkl: NOTRUN -> [SKIP][171] ([i915#8623])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
- shard-tglu: NOTRUN -> [SKIP][172] ([i915#8623])
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vrr@flip-basic-fastset:
- shard-dg1: NOTRUN -> [SKIP][173] ([i915#9906])
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@kms_vrr@flip-basic-fastset.html
* igt@kms_vrr@seamless-rr-switch-drrs:
- shard-rkl: NOTRUN -> [SKIP][174] ([i915#9906])
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_vrr@seamless-rr-switch-drrs.html
- shard-tglu: NOTRUN -> [SKIP][175] ([i915#9906])
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@kms_vrr@seamless-rr-switch-drrs.html
* igt@kms_writeback@writeback-fb-id-xrgb2101010:
- shard-rkl: NOTRUN -> [SKIP][176] ([i915#2437] / [i915#9412])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@kms_writeback@writeback-fb-id-xrgb2101010.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-dg1: NOTRUN -> [SKIP][177] ([i915#2437]) +1 other test skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-18/igt@kms_writeback@writeback-invalid-parameters.html
- shard-dg2: NOTRUN -> [SKIP][178] ([i915#2437])
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@kms_writeback@writeback-invalid-parameters.html
* igt@perf@per-context-mode-unprivileged:
- shard-dg1: NOTRUN -> [SKIP][179] ([i915#2433])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@perf@per-context-mode-unprivileged.html
* igt@perf_pmu@cpu-hotplug:
- shard-rkl: NOTRUN -> [SKIP][180] ([i915#8850])
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@perf_pmu@cpu-hotplug.html
* igt@perf_pmu@rc6-all-gts:
- shard-dg1: NOTRUN -> [SKIP][181] ([i915#8516])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@perf_pmu@rc6-all-gts.html
* igt@prime_vgem@basic-fence-flip:
- shard-dg1: NOTRUN -> [SKIP][182] ([i915#3708])
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-15/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-gtt:
- shard-dg1: NOTRUN -> [SKIP][183] ([i915#3708] / [i915#4077])
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-15/igt@prime_vgem@basic-gtt.html
* igt@prime_vgem@fence-read-hang:
- shard-rkl: NOTRUN -> [SKIP][184] ([i915#3708])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@prime_vgem@fence-read-hang.html
* igt@sriov_basic@bind-unbind-vf:
- shard-dg2: NOTRUN -> [SKIP][185] ([i915#9917])
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@sriov_basic@bind-unbind-vf.html
* igt@sriov_basic@enable-vfs-autoprobe-on:
- shard-tglu: NOTRUN -> [SKIP][186] ([i915#9917])
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@sriov_basic@enable-vfs-autoprobe-on.html
- shard-rkl: NOTRUN -> [SKIP][187] ([i915#9917]) +1 other test skip
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-5/igt@sriov_basic@enable-vfs-autoprobe-on.html
* igt@syncobj_wait@invalid-wait-zero-handles:
- shard-rkl: NOTRUN -> [FAIL][188] ([i915#9779])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@syncobj_wait@invalid-wait-zero-handles.html
* igt@v3d/v3d_create_bo@create-bo-0:
- shard-dg1: NOTRUN -> [SKIP][189] ([i915#2575]) +9 other tests skip
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-16/igt@v3d/v3d_create_bo@create-bo-0.html
* igt@v3d/v3d_mmap@mmap-bad-handle:
- shard-dg2: NOTRUN -> [SKIP][190] ([i915#2575]) +1 other test skip
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@v3d/v3d_mmap@mmap-bad-handle.html
* igt@v3d/v3d_submit_cl@single-in-sync:
- shard-tglu: NOTRUN -> [SKIP][191] ([i915#2575]) +3 other tests skip
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-7/igt@v3d/v3d_submit_cl@single-in-sync.html
* igt@vc4/vc4_label_bo@set-label:
- shard-rkl: NOTRUN -> [SKIP][192] ([i915#7711]) +8 other tests skip
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-4/igt@vc4/vc4_label_bo@set-label.html
* igt@vc4/vc4_purgeable_bo@access-purgeable-bo-mem:
- shard-dg1: NOTRUN -> [SKIP][193] ([i915#7711]) +6 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-13/igt@vc4/vc4_purgeable_bo@access-purgeable-bo-mem.html
#### Possible fixes ####
* igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl: [FAIL][194] ([i915#7742]) -> [PASS][195]
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-rkl-4/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-1/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglu: [FAIL][196] ([i915#6268]) -> [PASS][197]
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-tglu-5/igt@gem_ctx_exec@basic-nohangcheck.html
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-3/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_eio@kms:
- shard-dg2: [INCOMPLETE][198] ([i915#10513]) -> [PASS][199]
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-5/igt@gem_eio@kms.html
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@gem_eio@kms.html
* igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0:
- shard-dg2: [FAIL][200] ([i915#10378]) -> [PASS][201] +1 other test pass
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-2/igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0.html
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-4/igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0.html
* igt@gem_lmem_swapping@heavy-verify-random@lmem0:
- shard-dg1: [FAIL][202] ([i915#10378]) -> [PASS][203]
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg1-13/igt@gem_lmem_swapping@heavy-verify-random@lmem0.html
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-17/igt@gem_lmem_swapping@heavy-verify-random@lmem0.html
* igt@i915_pm_freq_api@freq-suspend@gt0:
- shard-dg2: [INCOMPLETE][204] ([i915#9407]) -> [PASS][205]
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-10/igt@i915_pm_freq_api@freq-suspend@gt0.html
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@i915_pm_freq_api@freq-suspend@gt0.html
* igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a1:
- shard-snb: [INCOMPLETE][206] ([i915#4839]) -> [PASS][207]
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-snb6/igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a1.html
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-snb5/igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a1.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
- shard-dg2: [FAIL][208] ([i915#6880]) -> [PASS][209]
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-snb: [SKIP][210] -> [PASS][211] +1 other test pass
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc.html
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_pm_rpm@i2c:
- shard-dg2: [FAIL][212] ([i915#8717]) -> [PASS][213]
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-2/igt@kms_pm_rpm@i2c.html
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-5/igt@kms_pm_rpm@i2c.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-dg2: [SKIP][214] ([i915#9519]) -> [PASS][215]
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-1/igt@kms_pm_rpm@modeset-lpsp-stress.html
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-10/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-rkl: [SKIP][216] ([i915#9519]) -> [PASS][217]
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-rkl-2/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-rkl-3/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1:
- shard-tglu: [FAIL][218] ([i915#9196]) -> [PASS][219]
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-tglu-8/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-2/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html
#### Warnings ####
* igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0:
- shard-dg2: [FAIL][220] ([i915#10446]) -> [FAIL][221] ([i915#10378])
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-8/igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0.html
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-8/igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-dg1: [ABORT][222] ([i915#9820]) -> [INCOMPLETE][223] ([i915#9849])
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg1-13/igt@i915_module_load@reload-with-fault-injection.html
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-17/igt@i915_module_load@reload-with-fault-injection.html
- shard-tglu: [INCOMPLETE][224] ([i915#10047] / [i915#9820]) -> [INCOMPLETE][225] ([i915#10047])
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-tglu-5/igt@i915_module_load@reload-with-fault-injection.html
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-tglu-2/igt@i915_module_load@reload-with-fault-injection.html
* igt@kms_content_protection@mei-interface:
- shard-dg1: [SKIP][226] ([i915#9433]) -> [SKIP][227] ([i915#9424])
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg1-13/igt@kms_content_protection@mei-interface.html
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg1-17/igt@kms_content_protection@mei-interface.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu:
- shard-dg2: [SKIP][228] ([i915#10433] / [i915#3458]) -> [SKIP][229] ([i915#3458]) +1 other test skip
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu.html
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
- shard-dg2: [SKIP][230] ([i915#3458]) -> [SKIP][231] ([i915#10433] / [i915#3458]) +2 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-2/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
* igt@kms_psr@fbc-psr-primary-blt:
- shard-dg2: [SKIP][232] ([i915#1072] / [i915#9732]) -> [SKIP][233] ([i915#1072] / [i915#9673] / [i915#9732]) +14 other tests skip
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-1/igt@kms_psr@fbc-psr-primary-blt.html
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-11/igt@kms_psr@fbc-psr-primary-blt.html
* igt@kms_psr@pr-cursor-plane-move:
- shard-dg2: [SKIP][234] ([i915#1072] / [i915#9673] / [i915#9732]) -> [SKIP][235] ([i915#1072] / [i915#9732]) +8 other tests skip
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-11/igt@kms_psr@pr-cursor-plane-move.html
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-5/igt@kms_psr@pr-cursor-plane-move.html
* igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem:
- shard-dg2: [INCOMPLETE][236] ([i915#5493]) -> [CRASH][237] ([i915#9351])
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14785/shard-dg2-5/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/shard-dg2-1/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html
[IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
[i915#10029]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10029
[i915#10047]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10047
[i915#10131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10131
[i915#10166]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10166
[i915#10278]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10278
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10378]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10378
[i915#10386]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10386
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#10446]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10446
[i915#10513]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10513
[i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#10729]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10729
[i915#10887]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10887
[i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
[i915#2017]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2017
[i915#2122]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2122
[i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
[i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
[i915#3359]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#3966]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3966
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4087]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4087
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4235
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
[i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
[i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6268]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6268
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
[i915#6412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6412
[i915#6493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6493
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
[i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
[i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
[i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
[i915#7213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7213
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#7711]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8292]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8292
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
[i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
[i915#8717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8717
[i915#8806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8806
[i915#8812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8812
[i915#8850]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8850
[i915#8925]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8925
[i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
[i915#9196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9196
[i915#9227]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9227
[i915#9295]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9295
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9351]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9351
[i915#9407]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9407
[i915#9408]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9408
[i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
[i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
[i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
[i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
[i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
[i915#9561]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9561
[i915#9606]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9606
[i915#9673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9673
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
[i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766
[i915#9779]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9779
[i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
[i915#9849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9849
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
Build changes
-------------
* Linux: CI_DRM_14785 -> Patchwork_130650v5
CI-20190529: 20190529
CI_DRM_14785: 1ba62f8cea9c797427d45108df1d453f4b343240 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7863: fa1dc232d5d840532521df8a6fcf1fe82c514304 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_130650v5: 1ba62f8cea9c797427d45108df1d453f4b343240 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130650v5/index.html
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