[PULL] drm-intel-next

[Jani Nikula <jani.nikula@intel.com>]

Hi Dave & Sima -

Another feature pull towards v6.11, hopefully last. This should also fix
the 32-bit build issue [1] seen in drm-next.

BR,
Jani.


[1] https://lore.kernel.org/r/CAPM=9tyNGA2wEgnsKdSyjHRGVikywZLdueZj=syTMFYEUNzxhw@mail.gmail.com


drm-intel-next-2024-06-28:
drm/i915 feature pull #2 for v6.11:

Features and functionality:
- More eDP Panel Replay enabling (Jouni)
- Add async flip and flip done tracepoints (Ville)

Refactoring and cleanups:
- Clean up BDW+ pipe interrupt register definitions (Ville)
- Prep work for DSB based plane programming (Ville)
- Relocate encoder suspend/shutdown helpers (Imre)
- Polish plane surface alignment handling (Ville)

Fixes:
- Enable more fault interrupts on TGL+/MTL+ (Ville)
- Fix CMRR 32-bit build (Mitul)
- Fix PSR Selective Update Region Scan Line Capture Indication (Jouni)
- Fix cursor fb unpinning (Maarten, Ville)
- Fix Cx0 PHY PLL state verification in TBT mode (Imre)
- Fix unnecessary MG DP programming on MTL+ Type-C (Imre)

DRM changes:
- Rename drm_plane_check_pixel_format() to drm_plane_has_format() and export
  (Ville)
- Add drm_vblank_work_flush_all() (Maarten)

Xe driver changes:
- Call encoder .suspend_complete() hook also on Xe (Imre)

BR,
Jani.

The following changes since commit d754ed2821fd9675d203cb73c4afcd593e28b7d0:

  Merge drm/drm-next into drm-intel-next (2024-06-19 11:38:31 +0300)

are available in the Git repository at:

  https://gitlab.freedesktop.org/drm/i915/kernel.git tags/drm-intel-next-2024-06-28

for you to fetch changes up to 32a120f52a4c0121bca8f2328d4680d283693d60:

  drm/i915/mtl: Skip PLL state verification in TBT mode (2024-06-28 12:50:52 +0300)

----------------------------------------------------------------
drm/i915 feature pull #2 for v6.11:

Features and functionality:
- More eDP Panel Replay enabling (Jouni)
- Add async flip and flip done tracepoints (Ville)

Refactoring and cleanups:
- Clean up BDW+ pipe interrupt register definitions (Ville)
- Prep work for DSB based plane programming (Ville)
- Relocate encoder suspend/shutdown helpers (Imre)
- Polish plane surface alignment handling (Ville)

Fixes:
- Enable more fault interrupts on TGL+/MTL+ (Ville)
- Fix CMRR 32-bit build (Mitul)
- Fix PSR Selective Update Region Scan Line Capture Indication (Jouni)
- Fix cursor fb unpinning (Maarten, Ville)
- Fix Cx0 PHY PLL state verification in TBT mode (Imre)
- Fix unnecessary MG DP programming on MTL+ Type-C (Imre)

DRM changes:
- Rename drm_plane_check_pixel_format() to drm_plane_has_format() and export
  (Ville)
- Add drm_vblank_work_flush_all() (Maarten)

Xe driver changes:
- Call encoder .suspend_complete() hook also on Xe (Imre)

----------------------------------------------------------------
Imre Deak (5):
      drm/i915: Move encoder suspend/shutdown helpers to intel_encoder.c
      drm/i915: Pass intel_display to the encoder suspend/shutdown helpers
      drm/xe: Use the encoder suspend helper also used by the i915 driver
      drm/i915/display: For MTL+ platforms skip mg dp programming
      drm/i915/mtl: Skip PLL state verification in TBT mode

Jouni Högander (12):
      drm/i915/psr: Set DP_PSR_SU_REGION_SCANLINE_CAPTURE bit when needed
      drm/i915/psr: Check panel ALPM capability for eDP Panel Replay
      drm/i915/psr: Inform Panel Replay source support on eDP as well
      drm/i915/psr: enable sink for eDP1.5 Panel Replay
      drm/i915/psr: Check panel Early Transport capability for eDP PR
      drm/i915/psr: 128b/132b Panel Replay is not supported on eDP
      drm/i915/psr: HW will not allow PR on eDP when HDCP enabled
      drm/i915/alpm: Make crtc_state as const in intel_alpm_compute_params
      drm/i915/psr: Perform psr2 checks related to ALPM for Panel Replay
      drm/i915/psr: Perform scanline indication check for Panel Replay as well
      drm/i915/psr: Check Early Transport for Panel Replay as well
      drm/i915/psr: Modify dg2_activate_panel_replay to support eDP

Maarten Lankhorst (2):
      drm: Add drm_vblank_work_flush_all().
      drm/i915: Use the same vblank worker for atomic unpin

Mitul Golani (1):
      drm/i915/display: Consider adjusted_pixel_rate to be u64

Ville Syrjälä (28):
      drm/i915: Use REG_BIT() for bdw+ pipe interrupts
      drm/i915: Document bdw+ pipe interrupt bits
      drm/i915: Sort bdw+ pipe interrupt bits
      drm/i915: Extend GEN9_PIPE_PLANE_FLIP_DONE() to cover all universal planes
      drm/i915: Nuke the intermediate pipe fault bitmasks
      drm/i915: Enable pipeDMC fault interrupts on tgl+
      drm/i915: Enable plane/pipeDMC ATS fault interrupts on mtl
      drm/i915: Extract intel_crtc_arm_vblank_event()
      drm/i915: Add async flip tracepoint
      drm/i915: Add flip done tracepoint
      drm/i915: Introduce intel_mode_vdisplay()
      drm/i915: Pass the whole atomic state to intel_color_prepare_commit()
      drm/i915/dsb: Plumb the whole atomic state into intel_dsb_prepare()
      drm/i915/dsb: Convert the DSB code to use intel_display rather than i915
      drm/i915/dsb: Add i915.enable_dsb module parameter
      drm/i915: Drop useless intel_dsb.h include
      drm/i915/dsb: Document that the ATS fault bits are for mtl+
      drm: Rename drm_plane_check_pixel_format() to drm_plane_has_format()
      drm: Export drm_plane_has_format()
      drm/i915: Introduce the plane->min_alignment() vfunc
      drm/i915: Introduce fb->min_alignment
      drm/i915: Split cursor alignment to per-platform vfuncs
      drm/i915: Split pre-skl platforms out from intel_surf_alignment()
      drm/i915: Move intel_surf_alignment() into skl_univerals_plane.c
      drm/i915: Update plane alignment requirements for TGL+
      drm/i915: Nuke the TGL+ chroma plane tile row alignment stuff
      drm/i915: Use vblank worker to unpin old legacy cursor fb safely
      drm/i915/dsb: Try to document that DSB_STATUS bit 16 is level triggered

 drivers/gpu/drm/drm_atomic.c                       |   7 +-
 drivers/gpu/drm/drm_crtc.c                         |   6 +-
 drivers/gpu/drm/drm_crtc_internal.h                |   2 -
 drivers/gpu/drm/drm_plane.c                        |  32 ++--
 drivers/gpu/drm/drm_vblank_work.c                  |  22 +++
 drivers/gpu/drm/i915/display/i9xx_plane.c          |  75 +++++++++-
 drivers/gpu/drm/i915/display/intel_alpm.c          |   9 +-
 drivers/gpu/drm/i915/display/intel_alpm.h          |   2 +-
 drivers/gpu/drm/i915/display/intel_atomic_plane.c  |  35 ++++-
 drivers/gpu/drm/i915/display/intel_atomic_plane.h  |   6 +
 drivers/gpu/drm/i915/display/intel_color.c         |  13 +-
 drivers/gpu/drm/i915/display/intel_color.h         |   3 +-
 drivers/gpu/drm/i915/display/intel_crtc.c          |  59 ++++++--
 drivers/gpu/drm/i915/display/intel_crtc.h          |   1 +
 drivers/gpu/drm/i915/display/intel_cursor.c        |  64 +++++++-
 drivers/gpu/drm/i915/display/intel_cursor.h        |   3 +
 drivers/gpu/drm/i915/display/intel_cx0_phy.c       |  11 +-
 drivers/gpu/drm/i915/display/intel_ddi.c           |  11 +-
 drivers/gpu/drm/i915/display/intel_display.c       |  15 +-
 drivers/gpu/drm/i915/display/intel_display_irq.c   |  50 ++++++-
 .../gpu/drm/i915/display/intel_display_params.c    |   3 +
 .../gpu/drm/i915/display/intel_display_params.h    |   1 +
 drivers/gpu/drm/i915/display/intel_display_trace.h |  50 +++++++
 drivers/gpu/drm/i915/display/intel_display_types.h |   8 +
 drivers/gpu/drm/i915/display/intel_dpll_mgr.h      |   1 +
 drivers/gpu/drm/i915/display/intel_dsb.c           |  66 ++++----
 drivers/gpu/drm/i915/display/intel_dsb.h           |   4 +-
 drivers/gpu/drm/i915/display/intel_dsb_regs.h      |   6 +-
 drivers/gpu/drm/i915/display/intel_encoder.c       |  44 ++++++
 drivers/gpu/drm/i915/display/intel_encoder.h       |   4 +
 drivers/gpu/drm/i915/display/intel_fb.c            | 151 ++++---------------
 drivers/gpu/drm/i915/display/intel_fb.h            |   3 -
 drivers/gpu/drm/i915/display/intel_fb_pin.c        |  39 +++--
 drivers/gpu/drm/i915/display/intel_fb_pin.h        |   3 +-
 drivers/gpu/drm/i915/display/intel_fbdev.c         |   5 +-
 drivers/gpu/drm/i915/display/intel_psr.c           | 166 +++++++++++++++++----
 drivers/gpu/drm/i915/display/intel_sprite.c        |  26 ++++
 drivers/gpu/drm/i915/display/intel_vblank.c        |  10 ++
 drivers/gpu/drm/i915/display/intel_vblank.h        |   1 +
 drivers/gpu/drm/i915/display/intel_vrr.c           |   2 +-
 drivers/gpu/drm/i915/display/skl_universal_plane.c |  85 ++++++++++-
 drivers/gpu/drm/i915/i915_driver.c                 |  51 +------
 drivers/gpu/drm/i915/i915_reg.h                    |  80 +++++-----
 drivers/gpu/drm/xe/display/xe_display.c            |  18 +--
 drivers/gpu/drm/xe/display/xe_fb_pin.c             |   3 +-
 drivers/gpu/drm/xe/display/xe_plane_initial.c      |   4 +-
 include/drm/drm_plane.h                            |   2 +
 include/drm/drm_vblank_work.h                      |   2 +
 48 files changed, 873 insertions(+), 391 deletions(-)

-- 
Jani Nikula, Intel