[PATCH 0/5] Initial change for merge of new board

[PATCH 0/5] Initial change for merge of new board

[Laine Walker-Avina]

Hi all,

I'm beginning to merge some of the changes for my new board. These include:
   * Adding macros to compute the ACTIM values for the SDRAM timings, eliminating magic numbers. The original authors may want to verify their timings were converted correctly.
   * Adding the ability to use the clock API to select the divider for sys_clkout2
   * Making the GPRC timing API aware of the time-granularity flag

Let me know if there are any comments or questions.

Cheers,
Laine Walker-Avina
PASCO scientific

----

Laine Walker-Avina (5):
  OMAP: Add in helper macros for the SDRAM timings
  OMAP: Convert the sdram-*.h timings to use the SDRAM timing macros
  OMAP: Add SDRAM timings for Micron mt46h16m32lf-6
  OMAP: Add support for setting the divider for sys_clkout2 using
    clk_set_rate
  OMAP: Make set_gpmc_timing_reg aware of the TIMEPARAGRANULARITY flag

 arch/arm/mach-omap2/clock3xxx_data.c               |    1 +
 arch/arm/mach-omap2/gpmc.c                         |   14 +++-
 arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h |   44 ++++++++-----
 arch/arm/mach-omap2/sdram-micron-mt46h16m32lf-6.h  |   67 ++++++++++++++++++++
 arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h  |   44 ++++++++-----
 arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h     |   52 +++++++++------
 .../mach-omap2/sdram-qimonda-hyb18m512160af-6.h    |   50 +++++++++------
 arch/arm/plat-omap/include/plat/sdrc.h             |   23 +++++++
 8 files changed, 220 insertions(+), 75 deletions(-)
 create mode 100644 arch/arm/mach-omap2/sdram-micron-mt46h16m32lf-6.h

[PATCH 1/5] OMAP: Add in helper macros for the SDRAM timings

[Laine Walker-Avina]

Signed-off-by: Laine Walker-Avina <lwalkera@ieee.org>
---
 arch/arm/plat-omap/include/plat/sdrc.h |   23 +++++++++++++++++++++++
 1 files changed, 23 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h
index 7b76f50..c74d1e7 100644
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ b/arch/arm/plat-omap/include/plat/sdrc.h
@@ -124,6 +124,29 @@ struct omap_sdrc_params {
 	u32 mr;
 };
 
+/* Helper macros and defines for the omap_sdrc_params registers */
+#define ACTIM_TRFC(a)		(((a) & 0x1f)<<27)
+#define ACTIM_TRC(a)		(((a) & 0x1f)<<22)
+#define ACTIM_TRAS(a)		(((a) & 0xf)<<18)
+#define ACTIM_TRP(a)		(((a) & 0x3)<<15)
+#define ACTIM_TRCD(a)		(((a) & 0x3)<<12)
+#define ACTIM_TRRD(a)		(((a) & 0x3)<<9)
+#define ACTIM_TDPL(a)		(((a) & 0x3)<<6)
+#define ACTIM_TDAL(a)		(((a) & 0x1f)<<0)
+
+#define ACTIM_TWTR(a)		(((a) & 0x3)<<16)
+#define ACTIM_TCKE(a)		(((a) & 0x7)<<12)
+#define ACTIM_TXP(a)		(((a) & 0x7)<<8)
+#define ACTIM_TXSR(a)		(((a) & 0xff)<<0)
+
+#define RFR_CTRL_ARCV(a)	(((a) & 0xffff)<<8)
+#define RFR_CTRL_ARE(a)		(((a) & 0x3)<<0)
+
+#define MR_WBST(a)			(((a) & 0x1)<<9)
+#define MR_CASL(a)			(((a) & 0x7)<<4)
+#define MR_BL(a)			(((a) & 0x7)<<0)
+
+
 void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
 			    struct omap_sdrc_params *sdrc_cs1);
 int omap2_sdrc_get_params(unsigned long r,
-- 
1.6.3.3

[PATCH 2/5] OMAP: Convert the sdram-*.h timings to use the SDRAM timing macros

[Laine Walker-Avina]

Signed-off-by: Laine Walker-Avina <lwalkera@ieee.org>
---
 arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h |   44 +++++++++++------
 arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h  |   44 +++++++++++------
 arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h     |   52 ++++++++++++--------
 .../mach-omap2/sdram-qimonda-hyb18m512160af-6.h    |   50 ++++++++++++-------
 4 files changed, 119 insertions(+), 71 deletions(-)

diff --git a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
index 8bfaf34..2e6a606 100644
--- a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
+++ b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
@@ -17,31 +17,43 @@
 static struct omap_sdrc_params h8mbx00u0mer0em_sdrc_params[] = {
 	[0] = {
 		.rate        = 200000000,
-		.actim_ctrla = 0xa2e1b4c6,
-		.actim_ctrlb = 0x0002131c,
-		.rfr_ctrl    = 0x0005e601,
-		.mr          = 0x00000032,
+		.actim_ctrla = ACTIM_TRFC(20) | ACTIM_TRC(11) | ACTIM_TRAS(8) |
+			ACTIM_TRP(3) | ACTIM_TRCD(3) | ACTIM_TRRD(2) | ACTIM_TDPL(3) |
+			ACTIM_TDAL(6),
+		.actim_ctrlb = ACTIM_TWTR(2) | ACTIM_TCKE(1) | ACTIM_TXP(3) |
+			ACTIM_TXSR(28),
+		.rfr_ctrl    = RFR_CTRL_ARCV(1510) | RFR_CTRL_ARE(1),
+		.mr          = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
 	},
 	[1] = {
 		.rate        = 166000000,
-		.actim_ctrla = 0x629db4c6,
-		.actim_ctrlb = 0x00012214,
-		.rfr_ctrl    = 0x0004dc01,
-		.mr          = 0x00000032,
+		.actim_ctrla = ACTIM_TRFC(12) | ACTIM_TRC(10) | ACTIM_TRAS(7) |
+			ACTIM_TRP(3) | ACTIM_TRCD(3) | ACTIM_TRRD(2) | ACTIM_TDPL(3) |
+			ACTIM_TDAL(6),
+		.actim_ctrlb = ACTIM_TWTR(1) | ACTIM_TCKE(2) | ACTIM_TXP(2) |
+			ACTIM_TXSR(20),
+		.rfr_ctrl    = RFR_CTRL_ARCV(1244) | RFR_CTRL_ARE(1),
+		.mr          = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
 	},
 	[2] = {
 		.rate        = 100000000,
-		.actim_ctrla = 0x51912284,
-		.actim_ctrlb = 0x0002120e,
-		.rfr_ctrl    = 0x0002d101,
-		.mr          = 0x00000022,
+		.actim_ctrla = ACTIM_TRFC(10) | ACTIM_TRC(6) | ACTIM_TRAS(4) |
+			ACTIM_TRP(2) | ACTIM_TRCD(2) | ACTIM_TRRD(1) | ACTIM_TDPL(2) |
+			ACTIM_TDAL(4),
+		.actim_ctrlb = ACTIM_TWTR(2) | ACTIM_TCKE(1) | ACTIM_TXP(2) |
+			ACTIM_TXSR(14),
+		.rfr_ctrl    = RFR_CTRL_ARCV(721) | RFR_CTRL_ARE(1),
+		.mr          = MR_WBST(0) | MR_CASL(2) | MR_BL(2),
 	},
 	[3] = {
 		.rate        = 83000000,
-		.actim_ctrla = 0x31512283,
-		.actim_ctrlb = 0x0001220a,
-		.rfr_ctrl    = 0x00025501,
-		.mr          = 0x00000022,
+		.actim_ctrla = ACTIM_TRFC(6) | ACTIM_TRC(5) | ACTIM_TRAS(4) |
+			ACTIM_TRP(2) | ACTIM_TRCD(2) | ACTIM_TRRD(1) | ACTIM_TDPL(2) |
+			ACTIM_TDAL(3),
+		.actim_ctrlb = ACTIM_TWTR(1) | ACTIM_TCKE(2) | ACTIM_TXP(2) |
+			ACTIM_TXSR(10),
+		.rfr_ctrl    = RFR_CTRL_ARCV(597) | RFR_CTRL_ARE(1),
+		.mr          = MR_WBST(0) | MR_CASL(2) | MR_BL(2),
 	},
 	[4] = {
 		.rate        = 0
diff --git a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
index a391b49..00accf2 100644
--- a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
+++ b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
@@ -21,31 +21,43 @@
 static struct omap_sdrc_params mt46h32m32lf6_sdrc_params[] = {
 	[0] = {
 		.rate	     = 166000000,
-		.actim_ctrla = 0x9a9db4c6,
-		.actim_ctrlb = 0x00011217,
-		.rfr_ctrl    = 0x0004dc01,
-		.mr	     = 0x00000032,
+		.actim_ctrla = ACTIM_TRFC(19) | ACTIM_TRC(10) | ACTIM_TRAS(7) |
+			ACTIM_TRP(3) | ACTIM_TRCD(3) | ACTIM_TRRD(2) | ACTIM_TDPL(3) |
+			ACTIM_TDAL(6),
+		.actim_ctrlb = ACTIM_TWTR(1) | ACTIM_TCKE(1) | ACTIM_TXP(2) |
+			ACTIM_TXSR(23),
+		.rfr_ctrl    = RFR_CTRL_ARCV(1244) | RFR_CTRL_ARE(1),
+		.mr	         = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
 	},
 	[1] = {
 		.rate	     = 165941176,
-		.actim_ctrla = 0x9a9db4c6,
-		.actim_ctrlb = 0x00011217,
-		.rfr_ctrl    = 0x0004dc01,
-		.mr	     = 0x00000032,
+		.actim_ctrla = ACTIM_TRFC(19) | ACTIM_TRC(10) | ACTIM_TRAS(7) |
+			ACTIM_TRP(3)   | ACTIM_TRCD(3) | ACTIM_TRRD(2) | ACTIM_TDPL(3) |
+			ACTIM_TDAL(6),
+		.actim_ctrlb = ACTIM_TWTR(1)  | ACTIM_TCKE(1) | ACTIM_TXP(2) |
+			ACTIM_TXSR(23),
+		.rfr_ctrl    = RFR_CTRL_ARCV(1244) | RFR_CTRL_ARE(1),
+		.mr	         = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
 	},
 	[2] = {
 		.rate	     = 83000000,
-		.actim_ctrla = 0x51512283,
-		.actim_ctrlb = 0x0001120c,
-		.rfr_ctrl    = 0x00025501,
-		.mr	     = 0x00000032,
+		.actim_ctrla = ACTIM_TRFC(10) | ACTIM_TRC(5) | ACTIM_TRAS(4) |
+			ACTIM_TRP(2) | ACTIM_TRCD(2) | ACTIM_TRRD(1) | ACTIM_TDPL(2) |
+			ACTIM_TDAL(3),
+		.actim_ctrlb = ACTIM_TWTR(1) | ACTIM_TCKE(1) | ACTIM_TXP(2) |
+			ACTIM_TXSR(12),
+		.rfr_ctrl    = RFR_CTRL_ARCV(597) | RFR_CTRL_ARE(1),
+		.mr	         = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
 	},
 	[3] = {
 		.rate	     = 82970588,
-		.actim_ctrla = 0x51512283,
-		.actim_ctrlb = 0x0001120c,
-		.rfr_ctrl    = 0x00025501,
-		.mr	     = 0x00000032,
+		.actim_ctrla = ACTIM_TRFC(10) | ACTIM_TRC(5) | ACTIM_TRAS(4) |
+			ACTIM_TRP(2) | ACTIM_TRCD(2) | ACTIM_TRRD(1) | ACTIM_TDPL(2) |
+			ACTIM_TDAL(3),
+		.actim_ctrlb = ACTIM_TWTR(1) | ACTIM_TCKE(1) | ACTIM_TXP(2) |
+			ACTIM_TXSR(12),
+		.rfr_ctrl    = RFR_CTRL_ARCV(597) | RFR_CTRL_ARE(1),
+		.mr	         = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
 	},
 	[4] = {
 		.rate	     = 0
diff --git a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h b/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
index cd43529..394bfe7 100644
--- a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
+++ b/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
@@ -16,32 +16,44 @@
 /* Numonyx  M65KXXXXAM */
 static struct omap_sdrc_params m65kxxxxam_sdrc_params[] = {
 	[0] = {
-		.rate		= 200000000,
-		.actim_ctrla	= 0xe321d4c6,
-		.actim_ctrlb	= 0x00022328,
-		.rfr_ctrl	= 0x0005e601,
-		.mr		= 0x00000032,
+		.rate        = 200000000,
+		.actim_ctrla = ACTIM_TRFC(28) | ACTIM_TRC(12) | ACTIM_TRAS(8) |
+			ACTIM_TRP(3) | ACTIM_TRCD(1) | ACTIM_TRRD(2) | ACTIM_TDPL(3) |
+			ACTIM_TDAL(6),
+		.actim_ctrlb = ACTIM_TWTR(2) | ACTIM_TCKE(2) | ACTIM_TXP(3) |
+			ACTIM_TXSR(40),
+		.rfr_ctrl    = RFR_CTRL_ARCV(1510) | RFR_CTRL_ARE(1),
+		.mr          = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
 	},
 	[1] = {
-		.rate		= 166000000,
-		.actim_ctrla	= 0xba9dc485,
-		.actim_ctrlb	= 0x00022321,
-		.rfr_ctrl	= 0x0004dc01,
-		.mr		= 0x00000032,
+		.rate        = 166000000,
+		.actim_ctrla = ACTIM_TRFC(23) | ACTIM_TRC(10) | ACTIM_TRAS(7) |
+			ACTIM_TRP(3) | ACTIM_TRCD(0) | ACTIM_TRRD(2) | ACTIM_TDPL(2) |
+			ACTIM_TDAL(5),
+		.actim_ctrlb = ACTIM_TWTR(2) | ACTIM_TCKE(2) | ACTIM_TXP(3) |
+			ACTIM_TXSR(33),
+		.rfr_ctrl    = RFR_CTRL_ARCV(1244) | RFR_CTRL_ARE(1),
+		.mr          = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
 	},
 	[2] = {
-		.rate		= 133000000,
-		.actim_ctrla	= 0x9a19b485,
-		.actim_ctrlb	= 0x0002231b,
-		.rfr_ctrl	= 0x0003de01,
-		.mr		= 0x00000032,
+		.rate        = 133000000,
+		.actim_ctrla = ACTIM_TRFC(19) | ACTIM_TRC(8) | ACTIM_TRAS(6) |
+			ACTIM_TRP(3) | ACTIM_TRCD(3) | ACTIM_TRRD(2) | ACTIM_TDPL(2) |
+			ACTIM_TDAL(5),
+		.actim_ctrlb = ACTIM_TWTR(2) | ACTIM_TCKE(2) | ACTIM_TXP(3) |
+			ACTIM_TXSR(27),
+		.rfr_ctrl    = RFR_CTRL_ARCV(990) | RFR_CTRL_ARE(1),
+		.mr          = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
 	},
 	[3] = {
-		.rate		= 83000000,
-		.actim_ctrla	= 0x594ca242,
-		.actim_ctrlb	= 0x00022310,
-		.rfr_ctrl	= 0x00025501,
-		.mr		= 0x00000032,
+		.rate        = 83000000,
+		.actim_ctrla = ACTIM_TRFC(11) | ACTIM_TRC(5) | ACTIM_TRAS(3) |
+			ACTIM_TRP(1) | ACTIM_TRCD(2) | ACTIM_TRRD(1) | ACTIM_TDPL(1) |
+			ACTIM_TDAL(2),
+		.actim_ctrlb = ACTIM_TWTR(2) | ACTIM_TCKE(2) | ACTIM_TXP(3) |
+			ACTIM_TXSR(16),
+		.rfr_ctrl    = RFR_CTRL_ARCV(597) | RFR_CTRL_ARE(1),
+		.mr          = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
 	},
 	[4] = {
 		.rate			= 0
diff --git a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
index 0e518a7..6cef229 100644
--- a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
+++ b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
@@ -19,32 +19,44 @@
 /* Qimonda HYB18M512160AF-6 */
 static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = {
 	[0] = {
-		.rate	     = 166000000,
-		.actim_ctrla = 0x629db4c6,
-		.actim_ctrlb = 0x00012214,
-		.rfr_ctrl    = 0x0004dc01,
-		.mr	     = 0x00000032,
+		.rate        = 166000000,
+		.actim_ctrla = ACTIM_TRFC(12) | ACTIM_TRC(10) | ACTIM_TRAS(7) |
+			ACTIM_TRP(3) | ACTIM_TRCD(3) | ACTIM_TRRD(2) | ACTIM_TDPL(3) |
+			ACTIM_TDAL(6),
+		.actim_ctrlb = ACTIM_TWTR(1) | ACTIM_TCKE(2) | ACTIM_TXP(2) |
+			ACTIM_TXSR(20),
+		.rfr_ctrl    = RFR_CTRL_ARCV(1244) | RFR_CTRL_ARE(1),
+		.mr          = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
 	},
 	[1] = {
-		.rate	     = 165941176,
-		.actim_ctrla = 0x629db4c6,
-		.actim_ctrlb = 0x00012214,
-		.rfr_ctrl    = 0x0004dc01,
-		.mr	     = 0x00000032,
+		.rate        = 165941176,
+		.actim_ctrla = ACTIM_TRFC(12) | ACTIM_TRC(10) | ACTIM_TRAS(7) |
+			ACTIM_TRP(3) | ACTIM_TRCD(3) | ACTIM_TRRD(2) | ACTIM_TDPL(3) |
+			ACTIM_TDAL(6),
+		.actim_ctrlb = ACTIM_TWTR(1) | ACTIM_TCKE(2) | ACTIM_TXP(2) |
+			ACTIM_TXSR(20),
+		.rfr_ctrl    = RFR_CTRL_ARCV(1244) | RFR_CTRL_ARE(1),
+		.mr          = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
 	},
 	[2] = {
 		.rate	     = 83000000,
-		.actim_ctrla = 0x31512283,
-		.actim_ctrlb = 0x0001220a,
-		.rfr_ctrl    = 0x00025501,
-		.mr	     = 0x00000022,
+		.actim_ctrla = ACTIM_TRFC(6) | ACTIM_TRC(5) | ACTIM_TRAS(4) |
+			ACTIM_TRP(2) | ACTIM_TRCD(2) | ACTIM_TRRD(1) | ACTIM_TDPL(2) |
+			ACTIM_TDAL(3),
+		.actim_ctrlb = ACTIM_TWTR(1) | ACTIM_TCKE(2) | ACTIM_TXP(2) |
+			ACTIM_TXSR(10),
+		.rfr_ctrl    = RFR_CTRL_ARCV(597) | RFR_CTRL_ARE(1),
+		.mr          = MR_WBST(0) | MR_CASL(2) | MR_BL(2),
 	},
 	[3] = {
-		.rate	     = 82970588,
-		.actim_ctrla = 0x31512283,
-		.actim_ctrlb = 0x0001220a,
-		.rfr_ctrl    = 0x00025501,
-		.mr	     = 0x00000022,
+		.rate        = 82970588,
+		.actim_ctrla = ACTIM_TRFC(6) | ACTIM_TRC(5) | ACTIM_TRAS(4) |
+			ACTIM_TRP(2) | ACTIM_TRCD(2) | ACTIM_TRRD(1) | ACTIM_TDPL(2) |
+			ACTIM_TDAL(3),
+		.actim_ctrlb = ACTIM_TWTR(1) | ACTIM_TCKE(2) | ACTIM_TXP(2) |
+			ACTIM_TXSR(10),
+		.rfr_ctrl    = RFR_CTRL_ARCV(597) | RFR_CTRL_ARE(1),
+		.mr          = MR_WBST(0) | MR_CASL(2) | MR_BL(2),
 	},
 	[4] = {
 		.rate	     = 0
-- 
1.6.3.3

[PATCH 3/5] OMAP: Add SDRAM timings for Micron mt46h16m32lf-6

[Laine Walker-Avina]

Signed-off-by: Laine Walker-Avina <lwalkera@ieee.org>
---
 arch/arm/mach-omap2/sdram-micron-mt46h16m32lf-6.h |   67 +++++++++++++++++++++
 1 files changed, 67 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-omap2/sdram-micron-mt46h16m32lf-6.h

diff --git a/arch/arm/mach-omap2/sdram-micron-mt46h16m32lf-6.h b/arch/arm/mach-omap2/sdram-micron-mt46h16m32lf-6.h
new file mode 100644
index 0000000..5e7c3e8
--- /dev/null
+++ b/arch/arm/mach-omap2/sdram-micron-mt46h16m32lf-6.h
@@ -0,0 +1,67 @@
+/*
+ * SDRC register values for the Micron MT46H16M32LF-6
+ *
+ * Copyright (C) 2010 PASCO scientifc
+ *
+ * Laine Walker-Avina
+ *
+ * Based on the file for the Micron MT46H32M32LF-6 by Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H16M32LF
+#define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H16M32LF
+
+#include <plat/sdrc.h>
+
+/* Micron MT46H16M32LF-6 */
+static struct omap_sdrc_params mt46h16m32lf6_sdrc_params[] = {
+	[0] = {
+		.rate	     = 166000000,
+		.actim_ctrla = ACTIM_TRFC(17) | ACTIM_TRC(10) | ACTIM_TRAS(7) |
+			ACTIM_TRP(3) | ACTIM_TRCD(3) | ACTIM_TRRD(2) | ACTIM_TDPL(3) |
+			ACTIM_TDAL(6),
+		.actim_ctrlb = ACTIM_TWTR(2) | ACTIM_TCKE(1) | ACTIM_TXP(1) |
+			ACTIM_TXSR(20),
+		.rfr_ctrl    = RFR_CTRL_ARCV(1244) | RFR_CTRL_ARE(1),
+		.mr	         = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
+	},
+	[1] = {
+		.rate	     = 165941176,
+		.actim_ctrla = ACTIM_TRFC(17) | ACTIM_TRC(10) | ACTIM_TRAS(7) |
+			ACTIM_TRP(3)   | ACTIM_TRCD(3) | ACTIM_TRRD(2) | ACTIM_TDPL(3) |
+			ACTIM_TDAL(6),
+		.actim_ctrlb = ACTIM_TWTR(2)  | ACTIM_TCKE(1) | ACTIM_TXP(1) |
+			ACTIM_TXSR(20),
+		.rfr_ctrl    = RFR_CTRL_ARCV(1244) | RFR_CTRL_ARE(1),
+		.mr	         = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
+	},
+	[2] = {
+		.rate	     = 83000000,
+		.actim_ctrla = ACTIM_TRFC(9) | ACTIM_TRC(5) | ACTIM_TRAS(4) |
+			ACTIM_TRP(2) | ACTIM_TRCD(2) | ACTIM_TRRD(1) | ACTIM_TDPL(2) |
+			ACTIM_TDAL(3),
+		.actim_ctrlb = ACTIM_TWTR(1) | ACTIM_TCKE(1) | ACTIM_TXP(1) |
+			ACTIM_TXSR(10),
+		.rfr_ctrl    = RFR_CTRL_ARCV(597) | RFR_CTRL_ARE(1),
+		.mr	         = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
+	},
+	[3] = {
+		.rate	     = 82970588,
+		.actim_ctrla = ACTIM_TRFC(10) | ACTIM_TRC(5) | ACTIM_TRAS(4) |
+			ACTIM_TRP(2) | ACTIM_TRCD(2) | ACTIM_TRRD(1) | ACTIM_TDPL(2) |
+			ACTIM_TDAL(3),
+		.actim_ctrlb = ACTIM_TWTR(1) | ACTIM_TCKE(1) | ACTIM_TXP(2) |
+			ACTIM_TXSR(12),
+		.rfr_ctrl    = RFR_CTRL_ARCV(597) | RFR_CTRL_ARE(1),
+		.mr	         = MR_WBST(0) | MR_CASL(3) | MR_BL(2),
+	},
+	[4] = {
+		.rate	     = 0
+	},
+};
+
+#endif
-- 
1.6.3.3

[PATCH 4/5] OMAP: Add support for setting the divider for sys_clkout2 using clk_set_rate

[Laine Walker-Avina]

Signed-off-by: Laine Walker-Avina <lwalkera@ieee.org>
---
 arch/arm/mach-omap2/clock3xxx_data.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index d5153b6..2a62779 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -1111,6 +1111,7 @@ static struct clk sys_clkout2 = {
 	.clksel_mask	= OMAP3430_CLKOUT2_DIV_MASK,
 	.clksel		= sys_clkout2_clksel,
 	.recalc		= &omap2_clksel_recalc,
+	.set_rate	= &omap2_clksel_set_rate,
 };
 
 /* CM OUTPUT CLOCKS */
-- 
1.6.3.3

[PATCH 5/5] OMAP: Make set_gpmc_timing_reg aware of the TIMEPARAGRANULARITY flag

[Laine Walker-Avina]

Signed-off-by: Laine Walker-Avina <lwalkera@ieee.org>
---
 arch/arm/mach-omap2/gpmc.c |   14 ++++++++++----
 1 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 5bc3ca0..9fa80e3 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -171,12 +171,15 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
 #endif
 {
 	u32 l;
-	int ticks, mask, nr_bits;
+	int ticks, mask, nr_bits, para_gran;
+
+	para_gran = (gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1) &
+		GPMC_CONFIG1_TIME_PARA_GRAN ? 2 : 1);
 
 	if (time == 0)
 		ticks = 0;
 	else
-		ticks = gpmc_ns_to_ticks(time);
+		ticks = gpmc_ns_to_ticks(time/para_gran);
 	nr_bits = end_bit - st_bit + 1;
 	if (ticks >= 1 << nr_bits) {
 #ifdef DEBUG
@@ -191,8 +194,8 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
 #ifdef DEBUG
 	printk(KERN_INFO
 		"GPMC CS%d: %-10s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n",
-	       cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000,
-			(l >> st_bit) & mask, time);
+	       cs, name, ticks, gpmc_get_fclk_period() * para_gran *
+		   ticks / 1000, (l >> st_bit) & mask, time);
 #endif
 	l &= ~(mask << st_bit);
 	l |= ticks << st_bit;
@@ -231,6 +234,9 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
 {
 	int div;
 	u32 l;
+#ifdef DEBUG
+	printk(KERN_INFO "GPMC_FCLK: %ld\n", gpmc_get_fclk_period());
+#endif
 
 	div = gpmc_cs_calc_divider(cs, t->sync_clk);
 	if (div < 0)
-- 
1.6.3.3

Re: [PATCH 1/5] OMAP: Add in helper macros for the SDRAM timings

[Felipe Balbi]

On Tue, Apr 06, 2010 at 06:51:04PM +0200, ext Laine Walker-Avina wrote:
>
>Signed-off-by: Laine Walker-Avina <lwalkera@ieee.org>
>---
> arch/arm/plat-omap/include/plat/sdrc.h |   23 +++++++++++++++++++++++
> 1 files changed, 23 insertions(+), 0 deletions(-)
>
>diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h
>index 7b76f50..c74d1e7 100644
>--- a/arch/arm/plat-omap/include/plat/sdrc.h
>+++ b/arch/arm/plat-omap/include/plat/sdrc.h
>@@ -124,6 +124,29 @@ struct omap_sdrc_params {
> 	u32 mr;
> };
>
>+/* Helper macros and defines for the omap_sdrc_params registers */
>+#define ACTIM_TRFC(a)		(((a) & 0x1f)<<27)

you need to add more spacing in all these macros, something like:

#define ACTIM_TRFC(a)		(((a) & 0x1f) << 27)

similar to all others.

-- 
balbi

Re: [PATCH 1/5] OMAP: Add in helper macros for the SDRAM timings

[Laine Walker-Avina]

On Tue, Apr 6, 2010 at 10:17 AM, Felipe Balbi <felipe.balbi@nokia.com> wrote:
>> +/* Helper macros and defines for the omap_sdrc_params registers */
>> +#define ACTIM_TRFC(a)          (((a) & 0x1f)<<27)
>
> you need to add more spacing in all these macros, something like:
>
> #define ACTIM_TRFC(a)           (((a) & 0x1f) << 27)
>
> similar to all others.
>
> --
> balbi
>

I'll do it, however checkpatch.pl didn't flag that as a warning.
-- 
Laine Walker-Avina
Firmware Engineer
PASCO scientific
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Re: [PATCH 1/5] OMAP: Add in helper macros for the SDRAM timings

[Felipe Balbi]

On Tue, Apr 06, 2010 at 07:26:48PM +0200, ext Laine Walker-Avina wrote:
>I'll do it, however checkpatch.pl didn't flag that as a warning.

I guess you need to call it with --strict :-)

-- 
balbi

[PATCH v2 1/5] OMAP: Add in helper macros for the SDRAM timings

[Laine Walker-Avina]

Signed-off-by: Laine Walker-Avina <lwalkera@ieee.org>
---
 arch/arm/plat-omap/include/plat/sdrc.h |   23 +++++++++++++++++++++++
 1 files changed, 23 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h
index 7b76f50..c74d1e7 100644
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ b/arch/arm/plat-omap/include/plat/sdrc.h
@@ -124,6 +124,29 @@ struct omap_sdrc_params {
 	u32 mr;
 };
 
+/* Helper macros and defines for the omap_sdrc_params registers */
+#define ACTIM_TRFC(a)		(((a) & 0x1f) << 27)
+#define ACTIM_TRC(a)		(((a) & 0x1f) << 22)
+#define ACTIM_TRAS(a)		(((a) & 0xf) << 18)
+#define ACTIM_TRP(a)		(((a) & 0x3) << 15)
+#define ACTIM_TRCD(a)		(((a) & 0x3) << 12)
+#define ACTIM_TRRD(a)		(((a) & 0x3) << 9)
+#define ACTIM_TDPL(a)		(((a) & 0x3) << 6)
+#define ACTIM_TDAL(a)		(((a) & 0x1f) << 0)
+
+#define ACTIM_TWTR(a)		(((a) & 0x3) << 16)
+#define ACTIM_TCKE(a)		(((a) & 0x7) << 12)
+#define ACTIM_TXP(a)		(((a) & 0x7) << 8)
+#define ACTIM_TXSR(a)		(((a) & 0xff) << 0)
+
+#define RFR_CTRL_ARCV(a)	(((a) & 0xffff) << 8)
+#define RFR_CTRL_ARE(a)	(((a) & 0x3) << 0)
+
+#define MR_WBST(a)		(((a) & 0x1) << 9)
+#define MR_CASL(a)		(((a) & 0x7) << 4)
+#define MR_BL(a)		(((a) & 0x7) << 0)
+
+
 void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
 			    struct omap_sdrc_params *sdrc_cs1);
 int omap2_sdrc_get_params(unsigned long r,
-- 
1.6.3.3

Re: [PATCH 5/5] OMAP: Make set_gpmc_timing_reg aware of the TIMEPARAGRANULARITY flag

[Kevin Hilman]

Laine Walker-Avina <lwalkera@ieee.org> writes:

> Signed-off-by: Laine Walker-Avina <lwalkera@ieee.org>

All of the patches in this series should have a more descriptive
changelog.  Typically that means answering "why?" to the subject, and
for more complicated series, also answering "how?"

[...]

> +#ifdef DEBUG
> +	printk(KERN_INFO "GPMC_FCLK: %ld\n", gpmc_get_fclk_period());
> +#endif

should just use pr_debug(...)

Kevin

Re: [PATCH 0/5] Initial change for merge of new board

[Paul Walmsley]

Hello Laine,

On Tue, 6 Apr 2010, Laine Walker-Avina wrote:

> I'm beginning to merge some of the changes for my new board. These include:
>    * Adding macros to compute the ACTIM values for the SDRAM timings, 
> eliminating magic numbers. The original authors may want to verify their 
> timings were converted correctly.

Have you verified that your changes result in the correct values?

Also, have you looked at the approach used in 
arch/arm/mach-omap2/board-rx51-sdram.c.  That seems like a better way?

>    * Adding the ability to use the clock API to select the divider for sys_clkout2
>    * Making the GPRC timing API aware of the time-granularity flag
> 
> Let me know if there are any comments or questions.
> 
> Cheers,
> Laine Walker-Avina
> PASCO scientific
> 
> ----
> 
> Laine Walker-Avina (5):
>   OMAP: Add in helper macros for the SDRAM timings
>   OMAP: Convert the sdram-*.h timings to use the SDRAM timing macros
>   OMAP: Add SDRAM timings for Micron mt46h16m32lf-6
>   OMAP: Add support for setting the divider for sys_clkout2 using
>     clk_set_rate
>   OMAP: Make set_gpmc_timing_reg aware of the TIMEPARAGRANULARITY flag
> 
>  arch/arm/mach-omap2/clock3xxx_data.c               |    1 +
>  arch/arm/mach-omap2/gpmc.c                         |   14 +++-
>  arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h |   44 ++++++++-----
>  arch/arm/mach-omap2/sdram-micron-mt46h16m32lf-6.h  |   67 ++++++++++++++++++++
>  arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h  |   44 ++++++++-----
>  arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h     |   52 +++++++++------
>  .../mach-omap2/sdram-qimonda-hyb18m512160af-6.h    |   50 +++++++++------
>  arch/arm/plat-omap/include/plat/sdrc.h             |   23 +++++++
>  8 files changed, 220 insertions(+), 75 deletions(-)
>  create mode 100644 arch/arm/mach-omap2/sdram-micron-mt46h16m32lf-6.h
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 


- Paul

Re: [PATCH 4/5] OMAP: Add support for setting the divider for sys_clkout2 using clk_set_rate

[Paul Walmsley]

Hello Laine,

two minor comments:

On Tue, 6 Apr 2010, Laine Walker-Avina wrote:

> 
> Signed-off-by: Laine Walker-Avina <lwalkera@ieee.org>

Please add a brief changelog.  Nothing fancy needed...

> ---
>  arch/arm/mach-omap2/clock3xxx_data.c |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
> index d5153b6..2a62779 100644
> --- a/arch/arm/mach-omap2/clock3xxx_data.c
> +++ b/arch/arm/mach-omap2/clock3xxx_data.c
> @@ -1111,6 +1111,7 @@ static struct clk sys_clkout2 = {
>  	.clksel_mask	= OMAP3430_CLKOUT2_DIV_MASK,
>  	.clksel		= sys_clkout2_clksel,
>  	.recalc		= &omap2_clksel_recalc,

Please add a .round_rate function pointer here also, pointing to 
omap2_clksel_round_rate.

> +	.set_rate	= &omap2_clksel_set_rate,
>  };
>  
>  /* CM OUTPUT CLOCKS */
> -- 
> 1.6.3.3


- Paul

Re: [PATCH 4/5] OMAP: Add support for setting the divider for sys_clkout2 using clk_set_rate

[Paul Walmsley]

On Thu, 22 Apr 2010, Paul Walmsley wrote:

> Hello Laine,
> 
> two minor comments:
> 
> On Tue, 6 Apr 2010, Laine Walker-Avina wrote:
> 
> > 
> > Signed-off-by: Laine Walker-Avina <lwalkera@ieee.org>
> 
> Please add a brief changelog.  Nothing fancy needed...
> 
> > ---
> >  arch/arm/mach-omap2/clock3xxx_data.c |    1 +
> >  1 files changed, 1 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
> > index d5153b6..2a62779 100644
> > --- a/arch/arm/mach-omap2/clock3xxx_data.c
> > +++ b/arch/arm/mach-omap2/clock3xxx_data.c
> > @@ -1111,6 +1111,7 @@ static struct clk sys_clkout2 = {
> >  	.clksel_mask	= OMAP3430_CLKOUT2_DIV_MASK,
> >  	.clksel		= sys_clkout2_clksel,
> >  	.recalc		= &omap2_clksel_recalc,
> 
> Please add a .round_rate function pointer here also, pointing to 
> omap2_clksel_round_rate.
> 
> > +	.set_rate	= &omap2_clksel_set_rate,
> >  };
> >  
> >  /* CM OUTPUT CLOCKS */

Haven't heard anything further on this.  The changes needed are 
straightforward enough that I'll make them here and queue it for 2.6.35.


- Paul

[PATCH v2] OMAP: Make set_gpmc_timing_reg aware of the TIMEPARAGRANULARITY flag

[Laine Walker-Avina]

This patch modifies the math used to convert clock ticks to nanoseconds
so that it is aware of the effect of the TIMEPARAGRANULARITY flag which
acts as a divide by 2 to the GPMC timing registers. This enables the use
of slower devices on the GPMC bus.
---
 arch/arm/mach-omap2/gpmc.c |   11 +++++++----
 1 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 5bc3ca0..6c3a786 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -171,12 +171,15 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
 #endif
 {
 	u32 l;
-	int ticks, mask, nr_bits;
+	int ticks, mask, nr_bits, para_gran;
+
+	para_gran = (gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1) &
+		GPMC_CONFIG1_TIME_PARA_GRAN ? 2:1);
 
 	if (time == 0)
 		ticks = 0;
 	else
-		ticks = gpmc_ns_to_ticks(time);
+		ticks = gpmc_ns_to_ticks(time/para_gran);
 	nr_bits = end_bit - st_bit + 1;
 	if (ticks >= 1 << nr_bits) {
 #ifdef DEBUG
@@ -191,8 +194,8 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
 #ifdef DEBUG
 	printk(KERN_INFO
 		"GPMC CS%d: %-10s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n",
-	       cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000,
-			(l >> st_bit) & mask, time);
+	       cs, name, ticks, gpmc_get_fclk_period() * para_gran *
+		   ticks / 1000, (l >> st_bit) & mask, time);
 #endif
 	l &= ~(mask << st_bit);
 	l |= ticks << st_bit;
-- 
1.6.3.3