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From: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
To: Leonid Komarianskyi <Leonid_Komarianskyi@epam.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Julien Grall <julien@xen.org>,
	Bertrand Marquis <bertrand.marquis@arm.com>,
	Michal Orzel <michal.orzel@amd.com>
Subject: Re: [PATCH v2 02/10] xen/arm: gic: implement helper functions for INTID checks
Date: Thu, 21 Aug 2025 15:39:13 +0000	[thread overview]
Message-ID: <877bywfzvj.fsf@epam.com> (raw)
In-Reply-To: <51a017aeab39af14ba40ab76b56f317270c7afaa.1754568795.git.leonid_komarianskyi@epam.com> (Leonid Komarianskyi's message of "Thu, 7 Aug 2025 12:33:30 +0000")


Hi Leonid,

Leonid Komarianskyi <Leonid_Komarianskyi@epam.com> writes:

> Introduced two new helper functions: gic_is_valid_irq and
> gic_is_shared_irq. The first function helps determine whether an IRQ
> number is less than the number of lines supported by hardware. The
> second function additionally checks if the IRQ number falls within the
> SPI range. Also, updated the appropriate checks to use these new helper
> functions.
>
> The current checks for the real GIC are very similar to those for the
> vGIC but serve a different purpose. For GIC-related code, the interrupt
> numbers should be validated based on whether the hardware can operate
> with such interrupts. On the other hand, for the vGIC, the indexes must
> also be verified to ensure they are available for a specific domain. The
> first reason for introducing these helper functions is to avoid
> potential confusion with vGIC-related checks. The second reason is to
> consolidate similar code into separate functions, which can be more
> easily extended by additional conditions, e.g., when implementing
> extended SPI interrupts.
>
> The changes, which replace open-coded checks with the use of the new
> helper functions, do not introduce any functional changes, as the helper
> functions follow the current IRQ index verification logic.
>
> Signed-off-by: Leonid Komarianskyi <leonid_komarianskyi@epam.com>
>
> ---
> Changes in V2:
> - introduced this patch
> ---
>  xen/arch/arm/gic.c             | 2 +-
>  xen/arch/arm/include/asm/gic.h | 9 +++++++++
>  xen/arch/arm/irq.c             | 2 +-
>  3 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
> index e80fe0ca24..eb0346a898 100644
> --- a/xen/arch/arm/gic.c
> +++ b/xen/arch/arm/gic.c
> @@ -111,7 +111,7 @@ static void gic_set_irq_priority(struct irq_desc *desc, unsigned int priority)
>  void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority)
>  {
>      ASSERT(priority <= 0xff);     /* Only 8 bits of priority */
> -    ASSERT(desc->irq < gic_number_lines());/* Can't route interrupts that don't exist */
> +    ASSERT(gic_is_valid_irq(desc->irq));/* Can't route interrupts that don't exist */
>      ASSERT(test_bit(_IRQ_DISABLED, &desc->status));
>      ASSERT(spin_is_locked(&desc->lock));
>  
> diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h
> index 541f0eeb80..ac0b7b783e 100644
> --- a/xen/arch/arm/include/asm/gic.h
> +++ b/xen/arch/arm/include/asm/gic.h
> @@ -306,6 +306,15 @@ extern void gic_dump_vgic_info(struct vcpu *v);
>  
>  /* Number of interrupt lines */
>  extern unsigned int gic_number_lines(void);
> +static inline bool gic_is_valid_irq(unsigned int irq)

We need to do something about naming, because this function completely
ignores presence of LPIs. What I mean, that it will return "false" for
any LPI, while you can't argue that LPI is a valid interrupt :)
I understand that this is expected behavior by current callers, but the
function name is misleading.

Name like "gic_is_valid_non_lpi()" seems to mouthful, but it is the best
I can come up with.

> +{
> +    return irq < gic_number_lines();
> +}
> +
> +static inline bool gic_is_shared_irq(unsigned int irq)
> +{
> +    return (irq >= NR_LOCAL_IRQS && gic_is_valid_irq(irq));

Again, because of misleading name of gic_is_valid_irq() it may seem that
this function will return "true" for LPIs as well...

> +}
>  
>  /* IRQ translation function for the device tree */
>  int gic_irq_xlate(const u32 *intspec, unsigned int intsize,
> diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
> index 03fbb90c6c..12c70d02cc 100644
> --- a/xen/arch/arm/irq.c
> +++ b/xen/arch/arm/irq.c
> @@ -415,7 +415,7 @@ err:
>  bool is_assignable_irq(unsigned int irq)
>  {
>      /* For now, we can only route SPIs to the guest */
> -    return (irq >= NR_LOCAL_IRQS) && (irq < gic_number_lines());
> +    return gic_is_shared_irq(irq);
>  }
>  
>  /*

-- 
WBR, Volodymyr

  reply	other threads:[~2025-08-21 15:39 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-07 12:33 [PATCH v2 00/10] Introduce eSPI support Leonid Komarianskyi
2025-08-07 12:33 ` [PATCH v2 01/10] xen/arm: gicv3: refactor obtaining GIC addresses for common operations Leonid Komarianskyi
2025-08-07 12:33   ` [PATCH v2 03/10] xen/arm: vgic: implement helper functions for virq checks Leonid Komarianskyi
2025-08-21 15:46     ` Volodymyr Babchuk
2025-08-22  7:55       ` Leonid Komarianskyi
2025-08-22 12:28         ` Volodymyr Babchuk
2025-08-22 15:08           ` Leonid Komarianskyi
2025-08-23 12:29     ` Oleksandr Tyshchenko
2025-08-24 18:08       ` Leonid Komarianskyi
2025-08-07 12:33   ` [PATCH v2 02/10] xen/arm: gic: implement helper functions for INTID checks Leonid Komarianskyi
2025-08-21 15:39     ` Volodymyr Babchuk [this message]
2025-08-21 16:24       ` Julien Grall
2025-08-22  7:30         ` Leonid Komarianskyi
2025-08-07 12:33   ` [PATCH v2 04/10] xen/arm/irq: add handling for IRQs in the eSPI range Leonid Komarianskyi
2025-08-21 15:59     ` Volodymyr Babchuk
2025-08-21 16:46       ` Julien Grall
2025-08-21 16:59         ` Volodymyr Babchuk
2025-08-21 17:13           ` Julien Grall
2025-08-21 17:38             ` Volodymyr Babchuk
2025-08-22 12:41             ` Leonid Komarianskyi
2025-08-22 12:59       ` Leonid Komarianskyi
2025-08-07 12:33   ` [PATCH v2 05/10] xen/arm: gicv3: implement handling of GICv3.1 eSPI Leonid Komarianskyi
2025-08-21 16:16     ` Volodymyr Babchuk
2025-08-22 14:39       ` Leonid Komarianskyi
2025-08-23 14:23     ` Oleksandr Tyshchenko
2025-08-24 18:17       ` Leonid Komarianskyi
2025-08-07 12:33   ` [PATCH v2 06/10] xen/arm/irq: allow eSPI processing in the do_IRQ function Leonid Komarianskyi
2025-08-07 12:33   ` [PATCH v2 07/10] xen/arm: gicv3: modify ICH_LR_PHYSICAL_MASK to allow eSPI processing Leonid Komarianskyi
2025-08-21 16:27     ` Volodymyr Babchuk
2025-08-22  6:56       ` Leonid Komarianskyi
2025-08-07 12:33   ` [PATCH v2 08/10] xen/arm: vgic: add resource management for extended SPIs Leonid Komarianskyi
2025-08-21 16:43     ` Volodymyr Babchuk
2025-08-22  8:27       ` Leonid Komarianskyi
2025-08-23 14:39     ` Oleksandr Tyshchenko
2025-08-24 18:28       ` Leonid Komarianskyi
2025-08-07 12:33   ` [PATCH v2 09/10] xen/arm: domain_build: adjust Dom0 IRQ handling to support eSPIs Leonid Komarianskyi
2025-08-21 16:46     ` Volodymyr Babchuk
2025-08-22  7:08       ` Leonid Komarianskyi
2025-08-22 12:26         ` Volodymyr Babchuk
2025-08-22 15:03           ` Leonid Komarianskyi
2025-08-23 13:02     ` Oleksandr Tyshchenko
2025-08-24 18:47       ` Leonid Komarianskyi
2025-08-07 12:33   ` [PATCH v2 10/10] xen/arm: vgic-v3: add emulation of GICv3.1 eSPI registers Leonid Komarianskyi
2025-08-21 16:17     ` Oleksandr Tyshchenko
2025-08-22 10:47       ` Leonid Komarianskyi
2025-08-21 17:26     ` Volodymyr Babchuk
2025-08-22 10:00       ` Leonid Komarianskyi
2025-08-25 14:07       ` Leonid Komarianskyi
2025-08-21 16:00   ` [PATCH v2 01/10] xen/arm: gicv3: refactor obtaining GIC addresses for common operations Volodymyr Babchuk
2025-08-21 16:14   ` Julien Grall
2025-08-22  9:09     ` Leonid Komarianskyi
2025-08-22  9:38       ` Julien Grall
2025-08-22 10:09         ` Leonid Komarianskyi
2025-08-24 17:21 ` [PATCH v2 00/10] Introduce eSPI support Oleksandr Tyshchenko
2025-08-24 18:58   ` Leonid Komarianskyi

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