From: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
To: Leonid Komarianskyi <Leonid_Komarianskyi@epam.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
Stefano Stabellini <sstabellini@kernel.org>,
Julien Grall <julien@xen.org>,
Bertrand Marquis <bertrand.marquis@arm.com>,
Michal Orzel <michal.orzel@amd.com>
Subject: Re: [PATCH v2 03/10] xen/arm: vgic: implement helper functions for virq checks
Date: Fri, 22 Aug 2025 12:28:08 +0000 [thread overview]
Message-ID: <87sehjbkx4.fsf@epam.com> (raw)
In-Reply-To: <7360fa14-2c55-4aa8-bbba-e355a47d2928@epam.com> (Leonid Komarianskyi's message of "Fri, 22 Aug 2025 07:55:07 +0000")
Leonid,
Leonid Komarianskyi <Leonid_Komarianskyi@epam.com> writes:
> Hi Volodymyr,
>
> Thank you for you comment.
>
> On 21.08.25 18:46, Volodymyr Babchuk wrote:
>>
>> Leonid Komarianskyi <Leonid_Komarianskyi@epam.com> writes:
>>
>>> Introduced two new helper functions for vGIC: vgic_is_valid_irq and
>>> vgic_is_shared_irq. The functions are similar to the newly introduced
>>> gic_is_valid_irq and gic_is_shared_irq, but they verify whether a vIRQ
>>> is available for a specific domain, while GIC-specific functions
>>> validate INTIDs for the real GIC hardware. For example, the GIC may
>>> support all 992 SPI lines, but the domain may use only some part of them
>>> (e.g., 640), depending on the highest IRQ number defined in the domain
>>> configuration. Therefore, for vGIC-related code and checks, the
>>> appropriate functions should be used. Also, updated the appropriate
>>> checks to use these new helper functions.
>>>
>>> The purpose of introducing new helper functions for vGIC is essentially
>>> the same as for GIC: to avoid potential confusion with GIC-related
>>> checks and to consolidate similar code into separate functions, which
>>> can be more easily extended by additional conditions, e.g., when
>>> implementing extended SPI interrupts.
>>>
>>> Only the validation change in vgic_inject_irq may affect existing
>>> functionality, as it currently checks whether the vIRQ is less than or
>>> equal to vgic_num_irqs. Since IRQ indexes start from 0 (where 32 is the
>>> first SPI), the check should behave consistently with similar logic in
>>> other places and should check if the vIRQ number is less than
>>> vgic_num_irqs. The remaining changes, which replace open-coded checks
>>> with the use of these new helper functions, do not introduce any
>>> functional changes, as the helper functions follow the current vIRQ
>>> index verification logic.
>>>
>>> Signed-off-by: Leonid Komarianskyi <leonid_komarianskyi@epam.com>
>>>
>>> ---
>>> Changes in V2:
>>> - introduced this patch
>>> ---
>>> xen/arch/arm/gic.c | 3 +--
>>> xen/arch/arm/include/asm/vgic.h | 7 +++++++
>>> xen/arch/arm/irq.c | 4 ++--
>>> xen/arch/arm/vgic.c | 10 ++++++++--
>>> 4 files changed, 18 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
>>> index eb0346a898..47fccf21d8 100644
>>> --- a/xen/arch/arm/gic.c
>>> +++ b/xen/arch/arm/gic.c
>>> @@ -133,8 +133,7 @@ int gic_route_irq_to_guest(struct domain *d, unsigned int virq,
>>>
>>> ASSERT(spin_is_locked(&desc->lock));
>>> /* Caller has already checked that the IRQ is an SPI */
>>> - ASSERT(virq >= 32);
>>> - ASSERT(virq < vgic_num_irqs(d));
>>> + ASSERT(vgic_is_shared_irq(d, virq));
>>> ASSERT(!is_lpi(virq));
>>>
>>> ret = vgic_connect_hw_irq(d, NULL, virq, desc, true);
>>> diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgic.h
>>> index 35c0c6a8b0..45201f4ca5 100644
>>> --- a/xen/arch/arm/include/asm/vgic.h
>>> +++ b/xen/arch/arm/include/asm/vgic.h
>>> @@ -335,6 +335,13 @@ extern void vgic_check_inflight_irqs_pending(struct vcpu *v,
>>> /* Default number of vGIC SPIs. 32 are substracted to cover local IRQs. */
>>> #define VGIC_DEF_NR_SPIS (min(gic_number_lines(), VGIC_MAX_IRQS) - 32)
>>>
>>> +extern bool vgic_is_valid_irq(struct domain *d, unsigned int virq);
>>> +
>>> +static inline bool vgic_is_shared_irq(struct domain *d, unsigned int virq)
>>> +{
>>> + return (virq >= NR_LOCAL_IRQS && vgic_is_valid_irq(d, virq));
>>> +}
>>> +
>>> /*
>>> * Allocate a guest VIRQ
>>> * - spi == 0 => allocate a PPI. It will be the same on every vCPU
>>> diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
>>> index 12c70d02cc..50e57aaea7 100644
>>> --- a/xen/arch/arm/irq.c
>>> +++ b/xen/arch/arm/irq.c
>>> @@ -442,7 +442,7 @@ int route_irq_to_guest(struct domain *d, unsigned int virq,
>>> unsigned long flags;
>>> int retval = 0;
>>>
>>> - if ( virq >= vgic_num_irqs(d) )
>>> + if ( !vgic_is_valid_irq(d, virq) )
>>> {
>>> printk(XENLOG_G_ERR
>>> "the vIRQ number %u is too high for domain %u (max = %u)\n",
>>> @@ -560,7 +560,7 @@ int release_guest_irq(struct domain *d, unsigned int virq)
>>> int ret;
>>>
>>> /* Only SPIs are supported */
>>> - if ( virq < NR_LOCAL_IRQS || virq >= vgic_num_irqs(d) )
>>> + if ( !vgic_is_shared_irq(d, virq) )
>>> return -EINVAL;
>>>
>>> desc = vgic_get_hw_irq_desc(d, NULL, virq);
>>> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
>>> index c563ba93af..48fbaf56fb 100644
>>> --- a/xen/arch/arm/vgic.c
>>> +++ b/xen/arch/arm/vgic.c
>>> @@ -24,6 +24,12 @@
>>> #include <asm/gic.h>
>>> #include <asm/vgic.h>
>>>
>>> +
>>> +bool vgic_is_valid_irq(struct domain *d, unsigned int virq)
>>
>> I have the same comment as for the previous patch. This function
>> completely ignores LPIs presence, while you can't argue that LPIs as
>> valid. Again, function callers are expecting this behavior, so this is
>> fine, but function name should better reflect its behavior.
>>
>> [...]
>>
>
> Would it be okay to rename these functions as proposed in the previous
> patch discussion:
> vgic_is_valid_irq -> vgic_is_valid_line
> vgic_is_shared_irq -> vgic_is_spi?
>
> Or, in the case of vgic, is it not a good idea to use the "line" suffix
> because vgic does not have physical interrupt lines? Would it be better
> to rename it to vgic_is_valid_non_lpi instead?
I think it is better to follow the pGIC naming convention. While there
is no physical IRQ lines in vGIC, it emulates real GIC anyways.
--
WBR, Volodymyr
next prev parent reply other threads:[~2025-08-22 12:28 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-07 12:33 [PATCH v2 00/10] Introduce eSPI support Leonid Komarianskyi
2025-08-07 12:33 ` [PATCH v2 01/10] xen/arm: gicv3: refactor obtaining GIC addresses for common operations Leonid Komarianskyi
2025-08-07 12:33 ` [PATCH v2 03/10] xen/arm: vgic: implement helper functions for virq checks Leonid Komarianskyi
2025-08-21 15:46 ` Volodymyr Babchuk
2025-08-22 7:55 ` Leonid Komarianskyi
2025-08-22 12:28 ` Volodymyr Babchuk [this message]
2025-08-22 15:08 ` Leonid Komarianskyi
2025-08-23 12:29 ` Oleksandr Tyshchenko
2025-08-24 18:08 ` Leonid Komarianskyi
2025-08-07 12:33 ` [PATCH v2 02/10] xen/arm: gic: implement helper functions for INTID checks Leonid Komarianskyi
2025-08-21 15:39 ` Volodymyr Babchuk
2025-08-21 16:24 ` Julien Grall
2025-08-22 7:30 ` Leonid Komarianskyi
2025-08-07 12:33 ` [PATCH v2 04/10] xen/arm/irq: add handling for IRQs in the eSPI range Leonid Komarianskyi
2025-08-21 15:59 ` Volodymyr Babchuk
2025-08-21 16:46 ` Julien Grall
2025-08-21 16:59 ` Volodymyr Babchuk
2025-08-21 17:13 ` Julien Grall
2025-08-21 17:38 ` Volodymyr Babchuk
2025-08-22 12:41 ` Leonid Komarianskyi
2025-08-22 12:59 ` Leonid Komarianskyi
2025-08-07 12:33 ` [PATCH v2 05/10] xen/arm: gicv3: implement handling of GICv3.1 eSPI Leonid Komarianskyi
2025-08-21 16:16 ` Volodymyr Babchuk
2025-08-22 14:39 ` Leonid Komarianskyi
2025-08-23 14:23 ` Oleksandr Tyshchenko
2025-08-24 18:17 ` Leonid Komarianskyi
2025-08-07 12:33 ` [PATCH v2 06/10] xen/arm/irq: allow eSPI processing in the do_IRQ function Leonid Komarianskyi
2025-08-07 12:33 ` [PATCH v2 07/10] xen/arm: gicv3: modify ICH_LR_PHYSICAL_MASK to allow eSPI processing Leonid Komarianskyi
2025-08-21 16:27 ` Volodymyr Babchuk
2025-08-22 6:56 ` Leonid Komarianskyi
2025-08-07 12:33 ` [PATCH v2 08/10] xen/arm: vgic: add resource management for extended SPIs Leonid Komarianskyi
2025-08-21 16:43 ` Volodymyr Babchuk
2025-08-22 8:27 ` Leonid Komarianskyi
2025-08-23 14:39 ` Oleksandr Tyshchenko
2025-08-24 18:28 ` Leonid Komarianskyi
2025-08-07 12:33 ` [PATCH v2 09/10] xen/arm: domain_build: adjust Dom0 IRQ handling to support eSPIs Leonid Komarianskyi
2025-08-21 16:46 ` Volodymyr Babchuk
2025-08-22 7:08 ` Leonid Komarianskyi
2025-08-22 12:26 ` Volodymyr Babchuk
2025-08-22 15:03 ` Leonid Komarianskyi
2025-08-23 13:02 ` Oleksandr Tyshchenko
2025-08-24 18:47 ` Leonid Komarianskyi
2025-08-07 12:33 ` [PATCH v2 10/10] xen/arm: vgic-v3: add emulation of GICv3.1 eSPI registers Leonid Komarianskyi
2025-08-21 16:17 ` Oleksandr Tyshchenko
2025-08-22 10:47 ` Leonid Komarianskyi
2025-08-21 17:26 ` Volodymyr Babchuk
2025-08-22 10:00 ` Leonid Komarianskyi
2025-08-25 14:07 ` Leonid Komarianskyi
2025-08-21 16:00 ` [PATCH v2 01/10] xen/arm: gicv3: refactor obtaining GIC addresses for common operations Volodymyr Babchuk
2025-08-21 16:14 ` Julien Grall
2025-08-22 9:09 ` Leonid Komarianskyi
2025-08-22 9:38 ` Julien Grall
2025-08-22 10:09 ` Leonid Komarianskyi
2025-08-24 17:21 ` [PATCH v2 00/10] Introduce eSPI support Oleksandr Tyshchenko
2025-08-24 18:58 ` Leonid Komarianskyi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87sehjbkx4.fsf@epam.com \
--to=volodymyr_babchuk@epam.com \
--cc=Leonid_Komarianskyi@epam.com \
--cc=bertrand.marquis@arm.com \
--cc=julien@xen.org \
--cc=michal.orzel@amd.com \
--cc=sstabellini@kernel.org \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.