Re: [PATCH v1 08/15] tcg/riscv: Add support for basic vector opcodes

[LIU Zhiwei <zhiwei_liu@linux.alibaba.com>]

On 2024/8/14 17:13, Richard Henderson wrote:
> On 8/13/24 21:34, LIU Zhiwei wrote:
>> From: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
>>
>> Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
>> Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
>> ---
>>   tcg/riscv/tcg-target-con-set.h |  1 +
>>   tcg/riscv/tcg-target.c.inc     | 33 +++++++++++++++++++++++++++++++++
>>   2 files changed, 34 insertions(+)
>>
>> diff --git a/tcg/riscv/tcg-target-con-set.h 
>> b/tcg/riscv/tcg-target-con-set.h
>> index d73a62b0f2..8a0de18257 100644
>> --- a/tcg/riscv/tcg-target-con-set.h
>> +++ b/tcg/riscv/tcg-target-con-set.h
>> @@ -23,3 +23,4 @@ C_O1_I4(r, r, rI, rM, rM)
>>   C_O2_I4(r, r, rZ, rZ, rM, rM)
>>   C_O0_I2(v, r)
>>   C_O1_I1(v, r)
>> +C_O1_I2(v, v, v)
>> diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
>> index f60913e805..650b5eff1a 100644
>> --- a/tcg/riscv/tcg-target.c.inc
>> +++ b/tcg/riscv/tcg-target.c.inc
>> @@ -289,6 +289,12 @@ typedef enum {
>>       OPC_VSE32_V = 0x6027 | V_SUMOP,
>>       OPC_VSE64_V = 0x7027 | V_SUMOP,
>>   +    OPC_VADD_VV = 0x57 | V_OPIVV,
>> +    OPC_VSUB_VV = 0x8000057 | V_OPIVV,
>> +    OPC_VAND_VV = 0x24000057 | V_OPIVV,
>> +    OPC_VOR_VV = 0x28000057 | V_OPIVV,
>> +    OPC_VXOR_VV = 0x2c000057 | V_OPIVV,
>> +
>>       OPC_VMV_V_V = 0x5e000057 | V_OPIVV,
>>       OPC_VMV_V_I = 0x5e000057 | V_OPIVI,
>>       OPC_VMV_V_X = 0x5e000057 | V_OPIVX,
>> @@ -2158,6 +2164,21 @@ static void tcg_out_vec_op(TCGContext *s, 
>> TCGOpcode opc,
>>       case INDEX_op_st_vec:
>>           tcg_out_st(s, type, a0, a1, a2);
>>           break;
>> +    case INDEX_op_add_vec:
>> +        tcg_out_opc_vv(s, OPC_VADD_VV, a0, a1, a2, true);
>> +        break;
>> +    case INDEX_op_sub_vec:
>> +        tcg_out_opc_vv(s, OPC_VSUB_VV, a0, a1, a2, true);
>> +        break;
>> +    case INDEX_op_and_vec:
>> +        tcg_out_opc_vv(s, OPC_VAND_VV, a0, a1, a2, true);
>> +        break;
>> +    case INDEX_op_or_vec:
>> +        tcg_out_opc_vv(s, OPC_VOR_VV, a0, a1, a2, true);
>> +        break;
>> +    case INDEX_op_xor_vec:
>> +        tcg_out_opc_vv(s, OPC_VXOR_VV, a0, a1, a2, true);
>> +        break;
>
> As with load/store/move, and/or/xor can avoid changing element type.
> Thus I think the vtype setup before the switch is premature.

Agree. We have implemented this feature on the v2 patch set.

Thanks,
Zhiwei

>
>
> r~