From: Marc Zyngier <maz@kernel.org>
To: "\"qinjian[覃健]\"" <qinjian@cqplus1.com>
Cc: "robh+dt@kernel.org" <robh+dt@kernel.org>,
"mturquette@baylibre.com" <mturquette@baylibre.com>,
"sboyd@kernel.org" <sboyd@kernel.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
"broonie@kernel.org" <broonie@kernel.org>,
"arnd@arndb.de" <arnd@arndb.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"Wells Lu 呂芳騰" <wells.lu@sunplus.com>
Subject: Re: [PATCH v5 08/10] irqchip: Add Sunplus SP7021 interrupt controller driver
Date: Wed, 08 Dec 2021 16:02:16 +0000 [thread overview]
Message-ID: <87a6hb13w7.wl-maz@kernel.org> (raw)
In-Reply-To: <8fa00c3b55874e90b5baae1f84010997@cqplus1.com>
On Wed, 08 Dec 2021 09:28:42 +0000,
"qinjian[覃健]" <qinjian@cqplus1.com> wrote:
>
> > -----Original Message-----
> > From: Marc Zyngier <maz@kernel.org>
> > Sent: Wednesday, December 8, 2021 3:45 PM
> > To: qinjian[覃健] <qinjian@cqplus1.com>
> > Cc: robh+dt@kernel.org; mturquette@baylibre.com; sboyd@kernel.org; tglx@linutronix.de; p.zabel@pengutronix.de;
> > linux@armlinux.org.uk; broonie@kernel.org; arnd@arndb.de; linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; linux-
> > kernel@vger.kernel.org; linux-clk@vger.kernel.org; Wells Lu 呂芳騰 <wells.lu@sunplus.com>
> > Subject: Re: [PATCH v5 08/10] irqchip: Add Sunplus SP7021 interrupt controller driver
> >
> > On 2021-12-08 07:15, qinjian[覃健] wrote:
> > >> > +void sp_intc_set_ext(u32 hwirq, int ext_num)
> > >> > +{
> > >> > + sp_intc_assign_bit(hwirq, REG_INTR_PRIORITY, !ext_num);
> > >> > +}
> > >> > +EXPORT_SYMBOL_GPL(sp_intc_set_ext);
> > >>
> > >> No way. We don't export random symbols without a good justification,
> > >> and you didn't give any.
> > >>
> > >
> > > This function called by SP7021 display driver to decide DISPLAY_IRQ
> > > routing to which parent irq (EXT_INT0 or EXT_INT1).
> >
> > Based on what? How can a display driver decide which parent is
> > appropriate? What improvement does this bring?
>
> In default, all IRQ routing to EXT_INT0, which processed by CPU0
> Some device's IRQ need low latency, like display, so routing
> DISPLAY_IRQ to EXT_INT1, which processed by CPU1 (set
> /proc/irq/<EXT_INT1>/smp_affinity_list)
Why would that have a lower latency? What if CPU1 is busy with
interrupts disabled most of the time? How does the display driver
finds out what is better?
And if you really wanted a lower latency, why route the interrupt via
a secondary interrupt controller, instead of attaching it directly to
the upstream GIC?
I really don't think this is an acceptable thing to do. Configure the
interrupt route statically if you want, but we're not exposing this
sort of SoC-specific API to other drivers.
M.
--
Without deviation from the norm, progress is not possible.
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: "\"qinjian[覃健]\"" <qinjian@cqplus1.com>
Cc: "robh+dt@kernel.org" <robh+dt@kernel.org>,
"mturquette@baylibre.com" <mturquette@baylibre.com>,
"sboyd@kernel.org" <sboyd@kernel.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
"broonie@kernel.org" <broonie@kernel.org>,
"arnd@arndb.de" <arnd@arndb.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"Wells Lu 呂芳騰" <wells.lu@sunplus.com>
Subject: Re: [PATCH v5 08/10] irqchip: Add Sunplus SP7021 interrupt controller driver
Date: Wed, 08 Dec 2021 16:02:16 +0000 [thread overview]
Message-ID: <87a6hb13w7.wl-maz@kernel.org> (raw)
In-Reply-To: <8fa00c3b55874e90b5baae1f84010997@cqplus1.com>
On Wed, 08 Dec 2021 09:28:42 +0000,
"qinjian[覃健]" <qinjian@cqplus1.com> wrote:
>
> > -----Original Message-----
> > From: Marc Zyngier <maz@kernel.org>
> > Sent: Wednesday, December 8, 2021 3:45 PM
> > To: qinjian[覃健] <qinjian@cqplus1.com>
> > Cc: robh+dt@kernel.org; mturquette@baylibre.com; sboyd@kernel.org; tglx@linutronix.de; p.zabel@pengutronix.de;
> > linux@armlinux.org.uk; broonie@kernel.org; arnd@arndb.de; linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; linux-
> > kernel@vger.kernel.org; linux-clk@vger.kernel.org; Wells Lu 呂芳騰 <wells.lu@sunplus.com>
> > Subject: Re: [PATCH v5 08/10] irqchip: Add Sunplus SP7021 interrupt controller driver
> >
> > On 2021-12-08 07:15, qinjian[覃健] wrote:
> > >> > +void sp_intc_set_ext(u32 hwirq, int ext_num)
> > >> > +{
> > >> > + sp_intc_assign_bit(hwirq, REG_INTR_PRIORITY, !ext_num);
> > >> > +}
> > >> > +EXPORT_SYMBOL_GPL(sp_intc_set_ext);
> > >>
> > >> No way. We don't export random symbols without a good justification,
> > >> and you didn't give any.
> > >>
> > >
> > > This function called by SP7021 display driver to decide DISPLAY_IRQ
> > > routing to which parent irq (EXT_INT0 or EXT_INT1).
> >
> > Based on what? How can a display driver decide which parent is
> > appropriate? What improvement does this bring?
>
> In default, all IRQ routing to EXT_INT0, which processed by CPU0
> Some device's IRQ need low latency, like display, so routing
> DISPLAY_IRQ to EXT_INT1, which processed by CPU1 (set
> /proc/irq/<EXT_INT1>/smp_affinity_list)
Why would that have a lower latency? What if CPU1 is busy with
interrupts disabled most of the time? How does the display driver
finds out what is better?
And if you really wanted a lower latency, why route the interrupt via
a secondary interrupt controller, instead of attaching it directly to
the upstream GIC?
I really don't think this is an acceptable thing to do. Configure the
interrupt route statically if you want, but we're not exposing this
sort of SoC-specific API to other drivers.
M.
--
Without deviation from the norm, progress is not possible.
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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-12-08 16:02 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-03 7:34 [PATCH v5 00/10] Add Sunplus SP7021 SoC Support Qin Jian
2021-12-03 7:34 ` Qin Jian
2021-12-03 7:34 ` [PATCH v5 01/10] dt-bindings: vendor-prefixes: Add Sunplus Qin Jian
2021-12-03 7:34 ` Qin Jian
2021-12-03 7:34 ` [PATCH v5 02/10] dt-bindings: arm: sunplus: Add bindings for Sunplus SP7021 SoC boards Qin Jian
2021-12-03 7:34 ` Qin Jian
2021-12-03 7:34 ` [PATCH v5 03/10] dt-bindings: reset: Add bindings for SP7021 reset driver Qin Jian
2021-12-03 7:34 ` Qin Jian
2021-12-03 7:34 ` [PATCH v5 04/10] reset: Add Sunplus " Qin Jian
2021-12-03 7:34 ` Qin Jian
2021-12-07 8:35 ` Philipp Zabel
2021-12-07 8:35 ` Philipp Zabel
2021-12-03 7:34 ` [PATCH v5 05/10] dt-bindings: clock: Add bindings for SP7021 clock driver Qin Jian
2021-12-03 7:34 ` Qin Jian
2021-12-16 6:43 ` Stephen Boyd
2021-12-16 6:43 ` Stephen Boyd
2021-12-03 7:34 ` [PATCH v5 06/10] clk: Add Sunplus " Qin Jian
2021-12-03 7:34 ` Qin Jian
2021-12-03 16:09 ` kernel test robot
2021-12-03 16:09 ` kernel test robot
2021-12-16 6:42 ` Stephen Boyd
2021-12-16 6:42 ` Stephen Boyd
2021-12-03 7:34 ` [PATCH v5 07/10] dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller Qin Jian
2021-12-03 7:34 ` Qin Jian
2021-12-03 7:34 ` [PATCH v5 08/10] irqchip: Add Sunplus SP7021 interrupt controller driver Qin Jian
2021-12-03 7:34 ` Qin Jian
2021-12-03 17:41 ` kernel test robot
2021-12-03 17:41 ` kernel test robot
2021-12-03 17:41 ` kernel test robot
2021-12-03 17:41 ` kernel test robot
2021-12-03 17:41 ` kernel test robot
2021-12-03 18:01 ` kernel test robot
2021-12-03 18:01 ` kernel test robot
2021-12-07 9:02 ` Marc Zyngier
2021-12-07 9:02 ` Marc Zyngier
2021-12-08 7:15 ` qinjian[覃健]
2021-12-08 7:15 ` qinjian[覃健]
2021-12-08 7:45 ` Marc Zyngier
2021-12-08 7:45 ` Marc Zyngier
2021-12-08 9:28 ` qinjian[覃健]
2021-12-08 16:02 ` Marc Zyngier [this message]
2021-12-08 16:02 ` Marc Zyngier
2021-12-03 7:34 ` [PATCH v5 09/10] ARM: sunplus: Add initial support for Sunplus SP7021 SoC Qin Jian
2021-12-03 7:34 ` Qin Jian
2021-12-03 12:59 ` Arnd Bergmann
2021-12-03 12:59 ` Arnd Bergmann
2021-12-07 7:21 ` qinjian[覃健]
2021-12-07 7:21 ` qinjian[覃健]
2021-12-07 9:11 ` Arnd Bergmann
2021-12-07 9:11 ` Arnd Bergmann
2021-12-09 8:49 ` qinjian[覃健]
2021-12-09 9:58 ` Arnd Bergmann
2021-12-09 9:58 ` Arnd Bergmann
2021-12-09 10:12 ` Ard Biesheuvel
2021-12-09 10:12 ` Ard Biesheuvel
2021-12-03 7:34 ` [PATCH v5 10/10] ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig Qin Jian
2021-12-03 7:34 ` Qin Jian
2021-12-03 12:49 ` Arnd Bergmann
2021-12-03 12:49 ` Arnd Bergmann
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