From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 04/15] drm/i915: Flush the execlist ports if idle
Date: Thu, 20 Jul 2017 16:12:07 +0300 [thread overview]
Message-ID: <87d18v6ymw.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20170717091141.23102-4-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> When doing a GPU reset, the CSB register will be trashed and we will
> lose any context-switch notifications that happened since the tasklet
> was disabled. If we find that all requests on this engine were
> completed, we want to make sure that the ELSP tracker is similarly empty
> so that we do not feed back in the completed requests upon recovering
> from the reset.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 36 ++++++++++++++++++++++++++----------
> 1 file changed, 26 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 3c83f2dd6798..ad61d1998fb7 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1327,6 +1327,31 @@ static void reset_common_ring(struct intel_engine_cs *engine,
> {
> struct execlist_port *port = engine->execlist_port;
> struct intel_context *ce;
> + unsigned int n;
> +
> + /*
> + * Catch up with any missed context-switch interrupts.
> + *
> + * Ideally we would just read the remaining CSB entries now that we
> + * know the gpu is idle. However, the CSB registers are sometimes^W
> + * often trashed across a GPU reset! Instead we have to rely on
> + * guessing the missed context-switch events by looking at what
> + * requests were completed.
> + */
> + if (!request) {
> + for (n = 0; n < ARRAY_SIZE(engine->execlist_port); n++)
> + i915_gem_request_put(port_request(&port[n]));
> + memset(engine->execlist_port, 0, sizeof(engine->execlist_port));
> + return;
> + }
> +
> + if (request->ctx != port_request(port)->ctx) {
> + i915_gem_request_put(port_request(port));
> + port[0] = port[1];
> + memset(&port[1], 0, sizeof(port[1]));
> + }
> +
> + GEM_BUG_ON(request->ctx != port_request(port)->ctx);
>
> /* If the request was innocent, we leave the request in the ELSP
> * and will try to replay it on restarting. The context image may
> @@ -1338,7 +1363,7 @@ static void reset_common_ring(struct intel_engine_cs *engine,
> * and have to at least restore the RING register in the context
> * image back to the expected values to skip over the guilty request.
> */
> - if (!request || request->fence.error != -EIO)
> + if (request->fence.error != -EIO)
> return;
>
> /* We want a simple context + ring to execute the breadcrumb update.
> @@ -1360,15 +1385,6 @@ static void reset_common_ring(struct intel_engine_cs *engine,
> request->ring->head = request->postfix;
> intel_ring_update_space(request->ring);
>
> - /* Catch up with any missed context-switch interrupts */
> - if (request->ctx != port_request(port)->ctx) {
> - i915_gem_request_put(port_request(port));
> - port[0] = port[1];
> - memset(&port[1], 0, sizeof(port[1]));
> - }
> -
> - GEM_BUG_ON(request->ctx != port_request(port)->ctx);
> -
> /* Reset WaIdleLiteRestore:bdw,skl as well */
> request->tail =
> intel_ring_wrap(request->ring,
> --
> 2.13.2
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next prev parent reply other threads:[~2017-07-20 13:13 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-17 9:11 [PATCH 01/15] drm/i915: Report execlists irq bit in debugfs Chris Wilson
2017-07-17 9:11 ` [PATCH 02/15] drm/i915: Reset context image on engines after triggering the reset Chris Wilson
2017-07-17 9:11 ` [PATCH 03/15] drm/i915: Serialize per-engine resets against new requests Chris Wilson
2017-07-17 21:58 ` Michel Thierry
2017-07-17 9:11 ` [PATCH 04/15] drm/i915: Flush the execlist ports if idle Chris Wilson
2017-07-20 12:18 ` Mika Kuoppala
2017-07-20 12:28 ` Chris Wilson
2017-07-20 13:12 ` Mika Kuoppala [this message]
2017-07-17 9:11 ` [PATCH 05/15] drm/i915: Check execlist/ring status during hangcheck Chris Wilson
2017-07-17 23:11 ` Michel Thierry
2017-07-17 9:11 ` [PATCH 06/15] drm/i915: Check the execlist queue for pending requests before declaring idle Chris Wilson
2017-07-20 12:23 ` Mika Kuoppala
2017-07-17 9:11 ` [PATCH 07/15] drm/i915: Move idle checks before intel_engine_init_global_seqno() Chris Wilson
2017-07-20 13:16 ` Mika Kuoppala
2017-07-17 9:11 ` [PATCH 08/15] drm/i915: Clear execlist port[] before updating seqno on wedging Chris Wilson
2017-07-20 13:31 ` Mika Kuoppala
2017-07-20 13:54 ` Chris Wilson
2017-07-20 14:14 ` Mika Kuoppala
2017-07-17 9:11 ` [PATCH 09/15] drm/i915: Wake up waiters after setting the WEDGED bit Chris Wilson
2017-07-20 13:48 ` Mika Kuoppala
2017-07-17 9:11 ` [PATCH 10/15] drm/i915: Assert that machine is wedged for nop_submit_request Chris Wilson
2017-07-18 0:15 ` Michel Thierry
2017-07-20 12:51 ` Chris Wilson
2017-07-20 17:10 ` Michel Thierry
2017-07-17 9:11 ` [PATCH 11/15] drm/i915: Clear engine irq posted following a reset Chris Wilson
2017-07-17 22:05 ` Michel Thierry
2017-07-17 9:11 ` [PATCH 12/15] drm/i915: Make i915_gem_context_mark_guilty() safe for unlocked updates Chris Wilson
2017-07-17 9:11 ` [PATCH 13/15] drm/i915: Emit a user level message when resetting the GPU (or engine) Chris Wilson
2017-07-18 0:22 ` Michel Thierry
2017-07-20 12:52 ` Chris Wilson
2017-07-17 9:11 ` [PATCH 14/15] drm/i915: Disable per-engine reset for Broxton Chris Wilson
2017-07-17 23:57 ` Michel Thierry
2017-07-17 9:11 ` [PATCH 15/15] drm/i915/selftests: Exercise independence of per-engine resets Chris Wilson
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