From: "Nutty Liu" <liujingqi@lanxincomputing.com>
To: "Anup Patel" <apatel@ventanamicro.com>,
"Atish Patra" <atish.patra@linux.dev>
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Anup Patel" <anup@brainfault.org>, <kvm@vger.kernel.org>,
<kvm-riscv@lists.infradead.org>,
<linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
"Atish Patra" <atishp@rivosinc.com>
Subject: Re: [PATCH v3 06/12] RISC-V: KVM: Implement kvm_arch_flush_remote_tlbs_range()
Date: Wed, 25 Jun 2025 15:39:02 +0800 [thread overview]
Message-ID: <87fda112-4ecd-4631-98be-da420aa59dd5@lanxincomputing.com> (raw)
In-Reply-To: <20250618113532.471448-7-apatel@ventanamicro.com>
On 6/18/2025 7:35 PM, Anup Patel wrote:
> The kvm_arch_flush_remote_tlbs_range() expected by KVM core can be
> easily implemented for RISC-V using kvm_riscv_hfence_gvma_vmid_gpa()
> hence provide it.
>
> Also with kvm_arch_flush_remote_tlbs_range() available for RISC-V, the
> mmu_wp_memory_region() can happily use kvm_flush_remote_tlbs_memslot()
> instead of kvm_flush_remote_tlbs().
>
> Reviewed-by: Atish Patra <atishp@rivosinc.com>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/include/asm/kvm_host.h | 2 ++
> arch/riscv/kvm/mmu.c | 2 +-
> arch/riscv/kvm/tlb.c | 8 ++++++++
> 3 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
> index ff1f76d6f177..6162575e2177 100644
> --- a/arch/riscv/include/asm/kvm_host.h
> +++ b/arch/riscv/include/asm/kvm_host.h
> @@ -43,6 +43,8 @@
> KVM_ARCH_REQ_FLAGS(5, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
> #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(6)
>
> +#define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS_RANGE
> +
> #define KVM_HEDELEG_DEFAULT (BIT(EXC_INST_MISALIGNED) | \
> BIT(EXC_BREAKPOINT) | \
> BIT(EXC_SYSCALL) | \
> diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c
> index 29f1bd853a66..a5387927a1c1 100644
> --- a/arch/riscv/kvm/mmu.c
> +++ b/arch/riscv/kvm/mmu.c
> @@ -344,7 +344,7 @@ static void gstage_wp_memory_region(struct kvm *kvm, int slot)
> spin_lock(&kvm->mmu_lock);
> gstage_wp_range(kvm, start, end);
> spin_unlock(&kvm->mmu_lock);
> - kvm_flush_remote_tlbs(kvm);
> + kvm_flush_remote_tlbs_memslot(kvm, memslot);
> }
>
> int kvm_riscv_gstage_ioremap(struct kvm *kvm, gpa_t gpa,
> diff --git a/arch/riscv/kvm/tlb.c b/arch/riscv/kvm/tlb.c
> index da98ca801d31..f46a27658c2e 100644
> --- a/arch/riscv/kvm/tlb.c
> +++ b/arch/riscv/kvm/tlb.c
> @@ -403,3 +403,11 @@ void kvm_riscv_hfence_vvma_all(struct kvm *kvm,
> make_xfence_request(kvm, hbase, hmask, KVM_REQ_HFENCE_VVMA_ALL,
> KVM_REQ_HFENCE_VVMA_ALL, NULL);
> }
> +
> +int kvm_arch_flush_remote_tlbs_range(struct kvm *kvm, gfn_t gfn, u64 nr_pages)
> +{
> + kvm_riscv_hfence_gvma_vmid_gpa(kvm, -1UL, 0,
> + gfn << PAGE_SHIFT, nr_pages << PAGE_SHIFT,
> + PAGE_SHIFT);
> + return 0;
> +}
Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com>
Thanks,
Nutty
--
kvm-riscv mailing list
kvm-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kvm-riscv
WARNING: multiple messages have this Message-ID (diff)
From: "Nutty Liu" <liujingqi@lanxincomputing.com>
To: "Anup Patel" <apatel@ventanamicro.com>,
"Atish Patra" <atish.patra@linux.dev>
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Anup Patel" <anup@brainfault.org>, <kvm@vger.kernel.org>,
<kvm-riscv@lists.infradead.org>,
<linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
"Atish Patra" <atishp@rivosinc.com>
Subject: Re: [PATCH v3 06/12] RISC-V: KVM: Implement kvm_arch_flush_remote_tlbs_range()
Date: Wed, 25 Jun 2025 15:39:02 +0800 [thread overview]
Message-ID: <87fda112-4ecd-4631-98be-da420aa59dd5@lanxincomputing.com> (raw)
In-Reply-To: <20250618113532.471448-7-apatel@ventanamicro.com>
On 6/18/2025 7:35 PM, Anup Patel wrote:
> The kvm_arch_flush_remote_tlbs_range() expected by KVM core can be
> easily implemented for RISC-V using kvm_riscv_hfence_gvma_vmid_gpa()
> hence provide it.
>
> Also with kvm_arch_flush_remote_tlbs_range() available for RISC-V, the
> mmu_wp_memory_region() can happily use kvm_flush_remote_tlbs_memslot()
> instead of kvm_flush_remote_tlbs().
>
> Reviewed-by: Atish Patra <atishp@rivosinc.com>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/include/asm/kvm_host.h | 2 ++
> arch/riscv/kvm/mmu.c | 2 +-
> arch/riscv/kvm/tlb.c | 8 ++++++++
> 3 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
> index ff1f76d6f177..6162575e2177 100644
> --- a/arch/riscv/include/asm/kvm_host.h
> +++ b/arch/riscv/include/asm/kvm_host.h
> @@ -43,6 +43,8 @@
> KVM_ARCH_REQ_FLAGS(5, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
> #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(6)
>
> +#define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS_RANGE
> +
> #define KVM_HEDELEG_DEFAULT (BIT(EXC_INST_MISALIGNED) | \
> BIT(EXC_BREAKPOINT) | \
> BIT(EXC_SYSCALL) | \
> diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c
> index 29f1bd853a66..a5387927a1c1 100644
> --- a/arch/riscv/kvm/mmu.c
> +++ b/arch/riscv/kvm/mmu.c
> @@ -344,7 +344,7 @@ static void gstage_wp_memory_region(struct kvm *kvm, int slot)
> spin_lock(&kvm->mmu_lock);
> gstage_wp_range(kvm, start, end);
> spin_unlock(&kvm->mmu_lock);
> - kvm_flush_remote_tlbs(kvm);
> + kvm_flush_remote_tlbs_memslot(kvm, memslot);
> }
>
> int kvm_riscv_gstage_ioremap(struct kvm *kvm, gpa_t gpa,
> diff --git a/arch/riscv/kvm/tlb.c b/arch/riscv/kvm/tlb.c
> index da98ca801d31..f46a27658c2e 100644
> --- a/arch/riscv/kvm/tlb.c
> +++ b/arch/riscv/kvm/tlb.c
> @@ -403,3 +403,11 @@ void kvm_riscv_hfence_vvma_all(struct kvm *kvm,
> make_xfence_request(kvm, hbase, hmask, KVM_REQ_HFENCE_VVMA_ALL,
> KVM_REQ_HFENCE_VVMA_ALL, NULL);
> }
> +
> +int kvm_arch_flush_remote_tlbs_range(struct kvm *kvm, gfn_t gfn, u64 nr_pages)
> +{
> + kvm_riscv_hfence_gvma_vmid_gpa(kvm, -1UL, 0,
> + gfn << PAGE_SHIFT, nr_pages << PAGE_SHIFT,
> + PAGE_SHIFT);
> + return 0;
> +}
Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com>
Thanks,
Nutty
WARNING: multiple messages have this Message-ID (diff)
From: "Nutty Liu" <liujingqi@lanxincomputing.com>
To: "Anup Patel" <apatel@ventanamicro.com>,
"Atish Patra" <atish.patra@linux.dev>
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Anup Patel" <anup@brainfault.org>, <kvm@vger.kernel.org>,
<kvm-riscv@lists.infradead.org>,
<linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
"Atish Patra" <atishp@rivosinc.com>
Subject: Re: [PATCH v3 06/12] RISC-V: KVM: Implement kvm_arch_flush_remote_tlbs_range()
Date: Wed, 25 Jun 2025 15:39:02 +0800 [thread overview]
Message-ID: <87fda112-4ecd-4631-98be-da420aa59dd5@lanxincomputing.com> (raw)
In-Reply-To: <20250618113532.471448-7-apatel@ventanamicro.com>
On 6/18/2025 7:35 PM, Anup Patel wrote:
> The kvm_arch_flush_remote_tlbs_range() expected by KVM core can be
> easily implemented for RISC-V using kvm_riscv_hfence_gvma_vmid_gpa()
> hence provide it.
>
> Also with kvm_arch_flush_remote_tlbs_range() available for RISC-V, the
> mmu_wp_memory_region() can happily use kvm_flush_remote_tlbs_memslot()
> instead of kvm_flush_remote_tlbs().
>
> Reviewed-by: Atish Patra <atishp@rivosinc.com>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/include/asm/kvm_host.h | 2 ++
> arch/riscv/kvm/mmu.c | 2 +-
> arch/riscv/kvm/tlb.c | 8 ++++++++
> 3 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
> index ff1f76d6f177..6162575e2177 100644
> --- a/arch/riscv/include/asm/kvm_host.h
> +++ b/arch/riscv/include/asm/kvm_host.h
> @@ -43,6 +43,8 @@
> KVM_ARCH_REQ_FLAGS(5, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
> #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(6)
>
> +#define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS_RANGE
> +
> #define KVM_HEDELEG_DEFAULT (BIT(EXC_INST_MISALIGNED) | \
> BIT(EXC_BREAKPOINT) | \
> BIT(EXC_SYSCALL) | \
> diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c
> index 29f1bd853a66..a5387927a1c1 100644
> --- a/arch/riscv/kvm/mmu.c
> +++ b/arch/riscv/kvm/mmu.c
> @@ -344,7 +344,7 @@ static void gstage_wp_memory_region(struct kvm *kvm, int slot)
> spin_lock(&kvm->mmu_lock);
> gstage_wp_range(kvm, start, end);
> spin_unlock(&kvm->mmu_lock);
> - kvm_flush_remote_tlbs(kvm);
> + kvm_flush_remote_tlbs_memslot(kvm, memslot);
> }
>
> int kvm_riscv_gstage_ioremap(struct kvm *kvm, gpa_t gpa,
> diff --git a/arch/riscv/kvm/tlb.c b/arch/riscv/kvm/tlb.c
> index da98ca801d31..f46a27658c2e 100644
> --- a/arch/riscv/kvm/tlb.c
> +++ b/arch/riscv/kvm/tlb.c
> @@ -403,3 +403,11 @@ void kvm_riscv_hfence_vvma_all(struct kvm *kvm,
> make_xfence_request(kvm, hbase, hmask, KVM_REQ_HFENCE_VVMA_ALL,
> KVM_REQ_HFENCE_VVMA_ALL, NULL);
> }
> +
> +int kvm_arch_flush_remote_tlbs_range(struct kvm *kvm, gfn_t gfn, u64 nr_pages)
> +{
> + kvm_riscv_hfence_gvma_vmid_gpa(kvm, -1UL, 0,
> + gfn << PAGE_SHIFT, nr_pages << PAGE_SHIFT,
> + PAGE_SHIFT);
> + return 0;
> +}
Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com>
Thanks,
Nutty
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2025-06-25 8:36 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-18 11:35 [PATCH v3 00/12] MMU related improvements for KVM RISC-V Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` [PATCH v3 01/12] RISC-V: KVM: Check kvm_riscv_vcpu_alloc_vector_context() return value Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-24 3:32 ` Atish Patra
2025-06-24 3:32 ` Atish Patra
2025-06-24 3:32 ` Atish Patra
2025-06-25 6:48 ` Nutty Liu
2025-06-25 6:48 ` Nutty Liu
2025-06-25 6:48 ` Nutty Liu
2025-06-18 11:35 ` [PATCH v3 02/12] RISC-V: KVM: Drop the return value of kvm_riscv_vcpu_aia_init() Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-24 3:35 ` Atish Patra
2025-06-24 3:35 ` Atish Patra
2025-06-24 3:35 ` Atish Patra
2025-06-25 6:50 ` Nutty Liu
2025-06-25 6:50 ` Nutty Liu
2025-06-25 6:50 ` Nutty Liu
2025-06-18 11:35 ` [PATCH v3 03/12] RISC-V: KVM: Rename and move kvm_riscv_local_tlb_sanitize() Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` [PATCH v3 04/12] RISC-V: KVM: Replace KVM_REQ_HFENCE_GVMA_VMID_ALL with KVM_REQ_TLB_FLUSH Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-25 7:35 ` Nutty Liu
2025-06-25 7:35 ` Nutty Liu
2025-06-25 7:35 ` Nutty Liu
2025-06-18 11:35 ` [PATCH v3 05/12] RISC-V: KVM: Don't flush TLB when PTE is unchanged Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-25 7:38 ` Nutty Liu
2025-06-25 7:38 ` Nutty Liu
2025-06-25 7:38 ` Nutty Liu
2025-06-18 11:35 ` [PATCH v3 06/12] RISC-V: KVM: Implement kvm_arch_flush_remote_tlbs_range() Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-25 7:39 ` Nutty Liu [this message]
2025-06-25 7:39 ` Nutty Liu
2025-06-25 7:39 ` Nutty Liu
2025-06-18 11:35 ` [PATCH v3 07/12] RISC-V: KVM: Use ncsr_xyz() in kvm_riscv_vcpu_trap_redirect() Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-25 7:39 ` Nutty Liu
2025-06-25 7:39 ` Nutty Liu
2025-06-25 7:39 ` Nutty Liu
2025-06-18 11:35 ` [PATCH v3 08/12] RISC-V: KVM: Factor-out MMU related declarations into separate headers Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-25 7:40 ` Nutty Liu
2025-06-25 7:40 ` Nutty Liu
2025-06-25 7:40 ` Nutty Liu
2025-06-18 11:35 ` [PATCH v3 09/12] RISC-V: KVM: Introduce struct kvm_gstage_mapping Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-25 7:43 ` Nutty Liu
2025-06-25 7:43 ` Nutty Liu
2025-06-25 7:43 ` Nutty Liu
2025-06-18 11:35 ` [PATCH v3 10/12] RISC-V: KVM: Add vmid field to struct kvm_riscv_hfence Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-25 7:55 ` Nutty Liu
2025-06-25 7:55 ` Nutty Liu
2025-06-25 7:55 ` Nutty Liu
2025-06-18 11:35 ` [PATCH v3 11/12] RISC-V: KVM: Factor-out g-stage page table management Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-25 7:57 ` Nutty Liu
2025-06-25 7:57 ` Nutty Liu
2025-06-25 7:57 ` Nutty Liu
2025-06-18 11:35 ` [PATCH v3 12/12] RISC-V: KVM: Pass VMID as parameter to kvm_riscv_hfence_xyz() APIs Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-18 11:35 ` Anup Patel
2025-06-25 7:58 ` Nutty Liu
2025-06-25 7:58 ` Nutty Liu
2025-06-25 7:58 ` Nutty Liu
2025-06-24 6:16 ` [PATCH v3 00/12] MMU related improvements for KVM RISC-V Anup Patel
2025-06-24 6:16 ` Anup Patel
2025-06-24 6:16 ` Anup Patel
2025-06-25 7:59 ` Atish Patra
2025-06-25 7:59 ` Atish Patra
2025-06-25 7:59 ` Atish Patra
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