Re: [PATCH v2 1/3] mtd: rawnand: cadence: support deferred prob when DMA is not ready

[Miquel Raynal <miquel.raynal@bootlin.com>]

On 04/02/2025 at 10:43:20 GMT, "Rabara, Niravkumar L" <niravkumar.l.rabara@intel.com> wrote:

> Hi Miquel,
>
>> -----Original Message-----
>> From: Miquel Raynal <miquel.raynal@bootlin.com>
>> Sent: Tuesday, 4 February, 2025 5:20 PM
>> To: Rabara, Niravkumar L <niravkumar.l.rabara@intel.com>
>> Cc: Richard Weinberger <richard@nod.at>; Vignesh Raghavendra
>> <vigneshr@ti.com>; linux@treblig.org; Shen Lichuan <shenlichuan@vivo.com>;
>> Jinjie Ruan <ruanjinjie@huawei.com>; u.kleine-koenig@baylibre.com; linux-
>> mtd@lists.infradead.org; linux-kernel@vger.kernel.org; stable@vger.kernel.org
>> Subject: Re: [PATCH v2 1/3] mtd: rawnand: cadence: support deferred prob when
>> DMA is not ready
>> 
>> Hello,
>> 
>> > My apologies for the confusion.
>> > Slave DMA terminology used in cadence nand controller bindings and
>> > driver is indeed confusing.
>> >
>> > To answer your question it is,
>> > 1 - External DMA (Generic DMA controller).
>> >
>> > Nand controller IP do not have embedded DMA controller (2 - peripheral
>> DMA).
>> >
>> > FYR, how external DMA is used.
>> > https://elixir.bootlin.com/linux/v6.13.1/source/drivers/mtd/nand/raw/c
>> > adence-nand-controller.c#L1962
>> 
>> In this case we should have a dmas property (and perhaps dma-names), no?
>> 
> No, I believe.
> Cadence NAND controller IP do not have dedicated handshake interface to connect
> with DMA controller.
> My understanding is dmas (and dma-names) are only used for the dedicated handshake
> interface between peripheral and the DMA controller.

I don't see well how you can defer if there is no resource to grab. And
if there is a resource to grab, why is it not described anywhere?

Thanks,
Miquèl

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