[PATCH 0/3] docs/devel/tcg-ops: Minor documentation updates

[PATCH 0/3] docs/devel/tcg-ops: Minor documentation updates

[Philippe Mathieu-Daudé]

Update TCG opcode list.

Philippe Mathieu-Daudé (3):
  docs/devel/tcg-ops: Stop listing dup2_vec()
  docs/devel/tcg-ops: List more vector opcodes
  docs/devel/tcg-ops: Slightly expand on discard() opcode

 docs/devel/tcg-ops.rst | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

-- 
2.53.0

[PATCH 1/3] docs/devel/tcg-ops: Stop listing dup2_vec()

[Philippe Mathieu-Daudé]

dup2_vec() opcode was removed in commit 6e7b13936d4
("tcg: Remove INDEX_op_dup2_vec").

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 docs/devel/tcg-ops.rst | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst
index fd3a50bf4c4..c417ebe65a8 100644
--- a/docs/devel/tcg-ops.rst
+++ b/docs/devel/tcg-ops.rst
@@ -769,11 +769,6 @@ specifies the length of the element (if applicable) in log2 8-bit units.
      - | Similarly, for a constant.
        | Smaller values will be replicated to host register size by the expanders.
 
-   * - dup2_vec *v0*, *r1*, *r2*
-
-     - | Duplicate *r2*:*r1* into TYPE/64 copies across *v0*. This opcode is
-         only present for 32-bit hosts.
-
    * - add_vec *v0*, *v1*, *v2*
 
      - | *v0* = *v1* + *v2*, in elements across the vector.
-- 
2.53.0

[PATCH 2/3] docs/devel/tcg-ops: List more vector opcodes

[Philippe Mathieu-Daudé]

Few logical and arithmetic vector opcodes are missing, list them.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 docs/devel/tcg-ops.rst | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst
index c417ebe65a8..56c0b0bd3de 100644
--- a/docs/devel/tcg-ops.rst
+++ b/docs/devel/tcg-ops.rst
@@ -816,10 +816,16 @@ specifies the length of the element (if applicable) in log2 8-bit units.
 
    * - and_vec *v0*, *v1*, *v2*
 
+       nand_vec *v0*, *v1*, *v2*
+
        or_vec *v0*, *v1*, *v2*
 
+       nor_vec *v0*, *v1*, *v2*
+
        xor_vec *v0*, *v1*, *v2*
 
+       eqv_vec *v0*, *v1*, *v2*
+
        andc_vec *v0*, *v1*, *v2*
 
        orc_vec *v0*, *v1*, *v2*
@@ -852,6 +858,8 @@ specifies the length of the element (if applicable) in log2 8-bit units.
 
        sars_vec *v0*, *v1*, *s2*
 
+       rotls_vec *v0*, *v1*, *s2*
+
      - | Similarly for logical and arithmetic right shift, and left rotate.
 
    * - shlv_vec *v0*, *v1*, *v2*
-- 
2.53.0

[PATCH 3/3] docs/devel/tcg-ops: Slightly expand on discard() opcode

[Philippe Mathieu-Daudé]

No need to precise the argument size.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 docs/devel/tcg-ops.rst | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst
index 56c0b0bd3de..73d8bdcf942 100644
--- a/docs/devel/tcg-ops.rst
+++ b/docs/devel/tcg-ops.rst
@@ -437,10 +437,11 @@ Misc
          for consistency with the other bswap opcodes. For future
          compatibility, the flags should be zero.
 
-   * - discard_i32/i64 *t0*
+   * - discard *t0*
 
-     - | Indicate that the value of *t0* won't be used later. It is useful to
-         force dead code elimination.
+     - | Indicate that the value of *t0* won't be used later. This is used to
+         force dead code elimination, particularly for condition code
+         optimizations where TCG might otherwise assume a global is still live.
 
    * - deposit *dest*, *t1*, *t2*, *pos*, *len*
 
-- 
2.53.0

Re: [PATCH 1/3] docs/devel/tcg-ops: Stop listing dup2_vec()

[Pierrick Bouvier]

On 5/4/2026 5:50 AM, Philippe Mathieu-Daudé wrote:
> dup2_vec() opcode was removed in commit 6e7b13936d4
> ("tcg: Remove INDEX_op_dup2_vec").
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>  docs/devel/tcg-ops.rst | 5 -----
>  1 file changed, 5 deletions(-)
> 

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>

Re: [PATCH 2/3] docs/devel/tcg-ops: List more vector opcodes

[Pierrick Bouvier]

On 5/4/2026 5:50 AM, Philippe Mathieu-Daudé wrote:
> Few logical and arithmetic vector opcodes are missing, list them.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>  docs/devel/tcg-ops.rst | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>

Re: [PATCH 3/3] docs/devel/tcg-ops: Slightly expand on discard() opcode

[Pierrick Bouvier]

On 5/4/2026 5:50 AM, Philippe Mathieu-Daudé wrote:
> No need to precise the argument size.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>  docs/devel/tcg-ops.rst | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>

Re: [PATCH 0/3] docs/devel/tcg-ops: Minor documentation updates

[Pierrick Bouvier]

On 5/4/2026 5:50 AM, Philippe Mathieu-Daudé wrote:
> Update TCG opcode list.
> 
> Philippe Mathieu-Daudé (3):
>   docs/devel/tcg-ops: Stop listing dup2_vec()
>   docs/devel/tcg-ops: List more vector opcodes
>   docs/devel/tcg-ops: Slightly expand on discard() opcode
> 
>  docs/devel/tcg-ops.rst | 20 ++++++++++++--------
>  1 file changed, 12 insertions(+), 8 deletions(-)
> 

I will let Richard pull that as part of tcg subsystem except if he
prefers me to pull it through docs.

Regards,
Pierrick

Re: [PATCH 0/3] docs/devel/tcg-ops: Minor documentation updates

[Philippe Mathieu-Daudé]

On 4/5/26 19:24, Pierrick Bouvier wrote:
> On 5/4/2026 5:50 AM, Philippe Mathieu-Daudé wrote:
>> Update TCG opcode list.
>>
>> Philippe Mathieu-Daudé (3):
>>    docs/devel/tcg-ops: Stop listing dup2_vec()
>>    docs/devel/tcg-ops: List more vector opcodes
>>    docs/devel/tcg-ops: Slightly expand on discard() opcode
>>
>>   docs/devel/tcg-ops.rst | 20 ++++++++++++--------
>>   1 file changed, 12 insertions(+), 8 deletions(-)
>>
> 
> I will let Richard pull that as part of tcg subsystem except if he
> prefers me to pull it through docs.

OK.

Re: [PATCH 2/3] docs/devel/tcg-ops: List more vector opcodes

[Alex Bennée]

Philippe Mathieu-Daudé <philmd@linaro.org> writes:

> Few logical and arithmetic vector opcodes are missing, list them.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>  docs/devel/tcg-ops.rst | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst
> index c417ebe65a8..56c0b0bd3de 100644
> --- a/docs/devel/tcg-ops.rst
> +++ b/docs/devel/tcg-ops.rst
> @@ -816,10 +816,16 @@ specifies the length of the element (if applicable) in log2 8-bit units.
>  
>     * - and_vec *v0*, *v1*, *v2*
>  
> +       nand_vec *v0*, *v1*, *v2*
> +
>         or_vec *v0*, *v1*, *v2*
>  
> +       nor_vec *v0*, *v1*, *v2*
> +
>         xor_vec *v0*, *v1*, *v2*
>  
> +       eqv_vec *v0*, *v1*, *v2*
> +
>         andc_vec *v0*, *v1*, *v2*
>  
>         orc_vec *v0*, *v1*, *v2*
> @@ -852,6 +858,8 @@ specifies the length of the element (if applicable) in log2 8-bit units.
>  
>         sars_vec *v0*, *v1*, *s2*
>  
> +       rotls_vec *v0*, *v1*, *s2*
> +
>       - | Similarly for logical and arithmetic right shift, and left rotate.
>  
>     * - shlv_vec *v0*, *v1*, *v2*

Longer term it would be nice to just auto-generate these from tcg-op.h
and tcg-op-common.h but I guess we would need to see if kdoc can handle
grouping of sets of ops rather than having to exhaustively enumerate
every bitop with comments. 

Anyway:

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

-- 
Alex Bennée
Virtualisation Tech Lead @ Linaro