From: Marc Zyngier <maz@kernel.org>
To: yu harry <harry.yu185@gmail.com>
Cc: corbet@lwn.net, catalin.marinas@arm.com, will@kernel.org,
tglx@linutronix.de, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] irqchip/gic-v3: Add Allwinner sunxi001 erratum workaround
Date: Sun, 02 Jun 2024 14:53:02 +0100 [thread overview]
Message-ID: <87ikyr30zl.wl-maz@kernel.org> (raw)
In-Reply-To: <CAAmx-DzLh7TYub-PDSX+A7h6KuPYAr9WeBFmhknPjxAr2dPBnA@mail.gmail.com>
On Sun, 02 Jun 2024 14:23:43 +0100,
yu harry <harry.yu185@gmail.com> wrote:
>
> On Sun, Jun 2, 2024 at 5:25 PM Marc Zyngier <maz@kernel.org> wrote:
> >
> > On Sun, 02 Jun 2024 08:10:58 +0100,
> > "harry.yu185" <harry.yu185@gmail.com> wrote:
> > >
> > > Allwinner A523 GIC600 integration does not support the
> > > sharability feature. So assigned Erratum ID #sunxi001 for this
> > > issue.
> > >
> > > That the 0x0201643b ID is not Allwinner specific and thus
> > > there is an extra of_machine_is_compatible() check.
> > >
> > > Note, because more than one soc may have this problem, the 'sunxi'
> > > name is used instead of a fixed soc name like A523.
> > >
> > > Signed-off-by: harry.yu185 <harry.yu185@gmail.com>
> >
> > No, this is all already handled by the driver already (since 6.6).
> >
> > Please fix your DT to include the "dma-noncoherent" property in the
> > GIC and ITS nodes, which should paper over the integration bug.
> >
> > Thanks,
> >
> > M.
> >
> > --
> > Without deviation from the norm, progress is not possible.
>
> Thank you for your reply,
> the method you said may not be suitable, because this SOC
> also needs RDIST_FLAGS_FORCE_NON_SHAREABLE,
> just like RK3588, but it is different from the RK3588 version.
Who is talking of RK3588? Have you read what I wrote? Have you
actually looked at what these attributes do?
For context, here's what you're proposing:
+static bool __maybe_unused its_enable_sunxi001(void *data)
+{
+ struct its_node *its = data;
+
+ if (!of_machine_is_compatible("arm,sun55iw3p1"))
+ return false;
+
+ its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE;
+ gic_rdists->flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE;
+
+ return true;
+}
+
"dma-noncoherent" on the GIC node provides:
static bool rd_set_non_coherent(void *data)
{
struct gic_chip_data *d = data;
d->rdists.flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE;
return true;
}
"dma-noncoherent" on the ITS node provides:
static bool its_set_non_coherent(void *data)
{
struct its_node *its = data;
its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE;
return true;
}
So please do explain how the combination of the two isn't equivalent
to your patch. How does it fail to provide the required workaround?
M.
--
Without deviation from the norm, progress is not possible.
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: yu harry <harry.yu185@gmail.com>
Cc: corbet@lwn.net, catalin.marinas@arm.com, will@kernel.org,
tglx@linutronix.de, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] irqchip/gic-v3: Add Allwinner sunxi001 erratum workaround
Date: Sun, 02 Jun 2024 14:53:02 +0100 [thread overview]
Message-ID: <87ikyr30zl.wl-maz@kernel.org> (raw)
In-Reply-To: <CAAmx-DzLh7TYub-PDSX+A7h6KuPYAr9WeBFmhknPjxAr2dPBnA@mail.gmail.com>
On Sun, 02 Jun 2024 14:23:43 +0100,
yu harry <harry.yu185@gmail.com> wrote:
>
> On Sun, Jun 2, 2024 at 5:25 PM Marc Zyngier <maz@kernel.org> wrote:
> >
> > On Sun, 02 Jun 2024 08:10:58 +0100,
> > "harry.yu185" <harry.yu185@gmail.com> wrote:
> > >
> > > Allwinner A523 GIC600 integration does not support the
> > > sharability feature. So assigned Erratum ID #sunxi001 for this
> > > issue.
> > >
> > > That the 0x0201643b ID is not Allwinner specific and thus
> > > there is an extra of_machine_is_compatible() check.
> > >
> > > Note, because more than one soc may have this problem, the 'sunxi'
> > > name is used instead of a fixed soc name like A523.
> > >
> > > Signed-off-by: harry.yu185 <harry.yu185@gmail.com>
> >
> > No, this is all already handled by the driver already (since 6.6).
> >
> > Please fix your DT to include the "dma-noncoherent" property in the
> > GIC and ITS nodes, which should paper over the integration bug.
> >
> > Thanks,
> >
> > M.
> >
> > --
> > Without deviation from the norm, progress is not possible.
>
> Thank you for your reply,
> the method you said may not be suitable, because this SOC
> also needs RDIST_FLAGS_FORCE_NON_SHAREABLE,
> just like RK3588, but it is different from the RK3588 version.
Who is talking of RK3588? Have you read what I wrote? Have you
actually looked at what these attributes do?
For context, here's what you're proposing:
+static bool __maybe_unused its_enable_sunxi001(void *data)
+{
+ struct its_node *its = data;
+
+ if (!of_machine_is_compatible("arm,sun55iw3p1"))
+ return false;
+
+ its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE;
+ gic_rdists->flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE;
+
+ return true;
+}
+
"dma-noncoherent" on the GIC node provides:
static bool rd_set_non_coherent(void *data)
{
struct gic_chip_data *d = data;
d->rdists.flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE;
return true;
}
"dma-noncoherent" on the ITS node provides:
static bool its_set_non_coherent(void *data)
{
struct its_node *its = data;
its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE;
return true;
}
So please do explain how the combination of the two isn't equivalent
to your patch. How does it fail to provide the required workaround?
M.
--
Without deviation from the norm, progress is not possible.
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-06-02 13:53 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-02 7:10 [PATCH] irqchip/gic-v3: Add Allwinner sunxi001 erratum workaround harry.yu185
2024-06-02 7:10 ` harry.yu185
2024-06-02 9:25 ` Marc Zyngier
2024-06-02 9:25 ` Marc Zyngier
2024-06-02 13:23 ` yu harry
2024-06-02 13:23 ` yu harry
2024-06-02 13:53 ` Marc Zyngier [this message]
2024-06-02 13:53 ` Marc Zyngier
2024-06-02 20:15 ` Andre Przywara
2024-06-02 20:15 ` Andre Przywara
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