* [PATCH v3 1/8] drm/xe: Modify stepping info directly in xe_step_*_get()
2026-03-09 20:07 [PATCH v3 0/8] Extra enabling patches for NVL-P Gustavo Sousa
@ 2026-03-09 20:07 ` Gustavo Sousa
2026-03-09 20:07 ` [PATCH v3 2/8] drm/xe: Drop unused IS_PLATFORM_STEP() and IS_SUBPLATFORM_STEP() Gustavo Sousa
` (8 subsequent siblings)
9 siblings, 0 replies; 18+ messages in thread
From: Gustavo Sousa @ 2026-03-09 20:07 UTC (permalink / raw)
To: intel-xe; +Cc: Gustavo Sousa, Matt Roper
In an upcoming change, we will add a member to struct xe_step_info to
represent the platform-level stepping. As such, we should stop assigning
the value returned by functions xe_step_pre_gmdid_get() and
xe_step_gmdid_get() directly to xe->info.step.
Since there are no other users for those functions, let's simply update
them to modify xe->info.step directly.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
| 6 ++---
| 52 +++++++++++++++++++++++++-------------------
| 8 +++----
3 files changed, 36 insertions(+), 30 deletions(-)
--git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 29f976e66848..72d4131e9775 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -914,7 +914,7 @@ static int xe_info_init(struct xe_device *xe,
if (desc->pre_gmdid_graphics_ip) {
graphics_ip = desc->pre_gmdid_graphics_ip;
media_ip = desc->pre_gmdid_media_ip;
- xe->info.step = xe_step_pre_gmdid_get(xe);
+ xe_step_pre_gmdid_get(xe);
} else {
xe_assert(xe, !desc->pre_gmdid_media_ip);
ret = handle_gmdid(xe, &graphics_ip, &media_ip,
@@ -922,9 +922,7 @@ static int xe_info_init(struct xe_device *xe,
if (ret)
return ret;
- xe->info.step = xe_step_gmdid_get(xe,
- graphics_gmdid_revid,
- media_gmdid_revid);
+ xe_step_gmdid_get(xe, graphics_gmdid_revid, media_gmdid_revid);
}
/*
--git a/drivers/gpu/drm/xe/xe_step.c b/drivers/gpu/drm/xe/xe_step.c
index 2860986f82f7..064b604b5b94 100644
--- a/drivers/gpu/drm/xe/xe_step.c
+++ b/drivers/gpu/drm/xe/xe_step.c
@@ -115,15 +115,17 @@ __diag_pop();
* Convert the PCI revid into proper IP steppings. This should only be
* used on platforms that do not have GMD_ID support.
*/
-struct xe_step_info xe_step_pre_gmdid_get(struct xe_device *xe)
+void xe_step_pre_gmdid_get(struct xe_device *xe)
{
const struct xe_step_info *revids = NULL;
- struct xe_step_info step = {};
u16 revid = xe->info.revid;
int size = 0;
const int *basedie_info = NULL;
int basedie_size = 0;
int baseid = 0;
+ u8 graphics = STEP_NONE;
+ u8 media = STEP_NONE;
+ u8 basedie = STEP_NONE;
if (xe->info.platform == XE_PVC) {
baseid = FIELD_GET(GENMASK(5, 3), xe->info.revid);
@@ -166,10 +168,12 @@ struct xe_step_info xe_step_pre_gmdid_get(struct xe_device *xe)
/* Not using the stepping scheme for the platform yet. */
if (!revids)
- return step;
+ goto done;
if (revid < size && revids[revid].graphics != STEP_NONE) {
- step = revids[revid];
+ graphics = revids[revid].graphics;
+ media = revids[revid].media;
+ basedie = revids[revid].basedie;
} else {
drm_warn(&xe->drm, "Unknown revid 0x%02x\n", revid);
@@ -187,25 +191,30 @@ struct xe_step_info xe_step_pre_gmdid_get(struct xe_device *xe)
if (revid < size) {
drm_dbg(&xe->drm, "Using steppings for revid 0x%02x\n",
revid);
- step = revids[revid];
+ graphics = revids[revid].graphics;
+ media = revids[revid].media;
+ basedie = revids[revid].basedie;
} else {
drm_dbg(&xe->drm, "Using future steppings\n");
- step.graphics = STEP_FUTURE;
+ graphics = STEP_FUTURE;
}
}
- drm_WARN_ON(&xe->drm, step.graphics == STEP_NONE);
+ drm_WARN_ON(&xe->drm, graphics == STEP_NONE);
if (basedie_info && basedie_size) {
if (baseid < basedie_size && basedie_info[baseid] != STEP_NONE) {
- step.basedie = basedie_info[baseid];
+ basedie = basedie_info[baseid];
} else {
drm_warn(&xe->drm, "Unknown baseid 0x%02x\n", baseid);
- step.basedie = STEP_FUTURE;
+ basedie = STEP_FUTURE;
}
}
- return step;
+done:
+ xe->info.step.graphics = graphics;
+ xe->info.step.media = media;
+ xe->info.step.basedie = basedie;
}
/**
@@ -220,28 +229,27 @@ struct xe_step_info xe_step_pre_gmdid_get(struct xe_device *xe)
* all platforms: major steppings (A0, B0, etc.) are 4 apart, with minor
* steppings (A1, A2, etc.) taking the values in between.
*/
-struct xe_step_info xe_step_gmdid_get(struct xe_device *xe,
- u32 graphics_gmdid_revid,
- u32 media_gmdid_revid)
+void xe_step_gmdid_get(struct xe_device *xe,
+ u32 graphics_gmdid_revid,
+ u32 media_gmdid_revid)
{
- struct xe_step_info step = {
- .graphics = STEP_A0 + graphics_gmdid_revid,
- .media = STEP_A0 + media_gmdid_revid,
- };
+ u8 graphics = STEP_A0 + graphics_gmdid_revid;
+ u8 media = STEP_A0 + media_gmdid_revid;
- if (step.graphics >= STEP_FUTURE) {
- step.graphics = STEP_FUTURE;
+ if (graphics >= STEP_FUTURE) {
+ graphics = STEP_FUTURE;
drm_dbg(&xe->drm, "Graphics GMD_ID revid value %d treated as future stepping\n",
graphics_gmdid_revid);
}
- if (step.media >= STEP_FUTURE) {
- step.media = STEP_FUTURE;
+ if (media >= STEP_FUTURE) {
+ media = STEP_FUTURE;
drm_dbg(&xe->drm, "Media GMD_ID revid value %d treated as future stepping\n",
media_gmdid_revid);
}
- return step;
+ xe->info.step.graphics = graphics;
+ xe->info.step.media = media;
}
#define STEP_NAME_CASE(name) \
--git a/drivers/gpu/drm/xe/xe_step.h b/drivers/gpu/drm/xe/xe_step.h
index 686cb59200c2..6febb7fac476 100644
--- a/drivers/gpu/drm/xe/xe_step.h
+++ b/drivers/gpu/drm/xe/xe_step.h
@@ -12,10 +12,10 @@
struct xe_device;
-struct xe_step_info xe_step_pre_gmdid_get(struct xe_device *xe);
-struct xe_step_info xe_step_gmdid_get(struct xe_device *xe,
- u32 graphics_gmdid_revid,
- u32 media_gmdid_revid);
+void xe_step_pre_gmdid_get(struct xe_device *xe);
+void xe_step_gmdid_get(struct xe_device *xe,
+ u32 graphics_gmdid_revid,
+ u32 media_gmdid_revid);
static inline u32 xe_step_to_gmdid(enum xe_step step) { return step - STEP_A0; }
const char *xe_step_name(enum xe_step step);
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v3 2/8] drm/xe: Drop unused IS_PLATFORM_STEP() and IS_SUBPLATFORM_STEP()
2026-03-09 20:07 [PATCH v3 0/8] Extra enabling patches for NVL-P Gustavo Sousa
2026-03-09 20:07 ` [PATCH v3 1/8] drm/xe: Modify stepping info directly in xe_step_*_get() Gustavo Sousa
@ 2026-03-09 20:07 ` Gustavo Sousa
2026-03-09 20:07 ` [PATCH v3 3/8] drm/xe/nvlp: Read platform-level stepping info Gustavo Sousa
` (7 subsequent siblings)
9 siblings, 0 replies; 18+ messages in thread
From: Gustavo Sousa @ 2026-03-09 20:07 UTC (permalink / raw)
To: intel-xe; +Cc: Gustavo Sousa, Matt Roper
The macros IS_PLATFORM_STEP() and IS_SUBPLATFORM_STEP() are unused since
commit 87c299fa3a97 ("drm/xe/guc: Port Wa_14014475959 to xe_wa and fix
it") and commit 63bbd800ff01 ("drm/xe/guc: Port
Wa_22012727170/Wa_22012727685 to xe_wa"), respectively, and we can drop
them now. Furthermore, in upcoming changes we will add logic to read
platform-level step information from PCI RevID and keeping those macros
around would potentially cause confusion.
v2:
- Cite commits that made the macros unused. (Matt)
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
| 10 ----------
1 file changed, 10 deletions(-)
--git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 3e04e80e0815..615218d775b1 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -82,16 +82,6 @@ enum xe_wedged_mode {
#define XE_MAX_ASID (BIT(20))
-#define IS_PLATFORM_STEP(_xe, _platform, min_step, max_step) \
- ((_xe)->info.platform == (_platform) && \
- (_xe)->info.step.graphics >= (min_step) && \
- (_xe)->info.step.graphics < (max_step))
-#define IS_SUBPLATFORM_STEP(_xe, _platform, sub, min_step, max_step) \
- ((_xe)->info.platform == (_platform) && \
- (_xe)->info.subplatform == (sub) && \
- (_xe)->info.step.graphics >= (min_step) && \
- (_xe)->info.step.graphics < (max_step))
-
/**
* struct xe_device - Top level struct of Xe device
*/
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v3 3/8] drm/xe/nvlp: Read platform-level stepping info
2026-03-09 20:07 [PATCH v3 0/8] Extra enabling patches for NVL-P Gustavo Sousa
2026-03-09 20:07 ` [PATCH v3 1/8] drm/xe: Modify stepping info directly in xe_step_*_get() Gustavo Sousa
2026-03-09 20:07 ` [PATCH v3 2/8] drm/xe: Drop unused IS_PLATFORM_STEP() and IS_SUBPLATFORM_STEP() Gustavo Sousa
@ 2026-03-09 20:07 ` Gustavo Sousa
2026-03-09 20:07 ` [PATCH v3 4/8] drm/xe/rtp: Add support for matching platform-level stepping Gustavo Sousa
` (6 subsequent siblings)
9 siblings, 0 replies; 18+ messages in thread
From: Gustavo Sousa @ 2026-03-09 20:07 UTC (permalink / raw)
To: intel-xe; +Cc: Gustavo Sousa, Matt Roper
There will be a NVL-P workaround for which we will need to know the
platform-level stepping information in order to decide whether to apply
it or not.
While NVL-P has a nice mapping between the PCI revid and our symbolic
stepping enumeration, not all platforms are like that: (i) Some
platforms will have a single PCI revid used for a set platform level
steppings (ii) and some might even require specific mappings.
To make things simpler, let's include stepping information in the device
info only on demand, for those platforms where it is needed for
workaround checks.
v2:
- Call xe_step_platform_get() very early, to allow device workarounds
to use it in early stages of device initialization. (Matt)
Bspec: 74201
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com> # v1
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
| 2 ++
| 22 ++++++++++++++++++++++
| 2 ++
| 1 +
4 files changed, 27 insertions(+)
--git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 72d4131e9775..189e2a1c29f9 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -780,6 +780,8 @@ static int xe_info_init_early(struct xe_device *xe,
xe->info.max_gt_per_tile = desc->max_gt_per_tile;
xe->info.tile_count = 1 + desc->max_remote_tiles;
+ xe_step_platform_get(xe);
+
err = xe_tile_init_early(xe_device_get_root_tile(xe), xe, 0);
if (err)
return err;
--git a/drivers/gpu/drm/xe/xe_step.c b/drivers/gpu/drm/xe/xe_step.c
index 064b604b5b94..d0f888c31831 100644
--- a/drivers/gpu/drm/xe/xe_step.c
+++ b/drivers/gpu/drm/xe/xe_step.c
@@ -108,6 +108,28 @@ static const int pvc_basedie_subids[] = {
__diag_pop();
+/**
+ * xe_step_platform_get - Determine platform-level stepping from PCI revid
+ * @xe: Xe device
+ *
+ * Convert the PCI revid into a platform-level stepping value and store that
+ * in the device info.
+ */
+void xe_step_platform_get(struct xe_device *xe)
+{
+ /*
+ * Not all platforms map PCI revid directly into our symbolic stepping
+ * enumeration. Some platforms will have a single PCI revid used for a
+ * range platform level steppings and some might even require specific
+ * mappings. So prefer to err on the side of caution and include only
+ * the platforms from which we need the stepping info for workaround
+ * checks.
+ */
+
+ if (xe->info.platform == XE_NOVALAKE_P)
+ xe->info.step.platform = STEP_A0 + xe->info.revid;
+}
+
/**
* xe_step_pre_gmdid_get - Determine IP steppings from PCI revid
* @xe: Xe device
--git a/drivers/gpu/drm/xe/xe_step.h b/drivers/gpu/drm/xe/xe_step.h
index 6febb7fac476..41f1c95c46e5 100644
--- a/drivers/gpu/drm/xe/xe_step.h
+++ b/drivers/gpu/drm/xe/xe_step.h
@@ -12,6 +12,8 @@
struct xe_device;
+void xe_step_platform_get(struct xe_device *xe);
+
void xe_step_pre_gmdid_get(struct xe_device *xe);
void xe_step_gmdid_get(struct xe_device *xe,
u32 graphics_gmdid_revid,
--git a/drivers/gpu/drm/xe/xe_step_types.h b/drivers/gpu/drm/xe/xe_step_types.h
index d978cc2512f2..43ca73850739 100644
--- a/drivers/gpu/drm/xe/xe_step_types.h
+++ b/drivers/gpu/drm/xe/xe_step_types.h
@@ -9,6 +9,7 @@
#include <linux/types.h>
struct xe_step_info {
+ u8 platform;
u8 graphics;
u8 media;
u8 basedie;
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v3 4/8] drm/xe/rtp: Add support for matching platform-level stepping
2026-03-09 20:07 [PATCH v3 0/8] Extra enabling patches for NVL-P Gustavo Sousa
` (2 preceding siblings ...)
2026-03-09 20:07 ` [PATCH v3 3/8] drm/xe/nvlp: Read platform-level stepping info Gustavo Sousa
@ 2026-03-09 20:07 ` Gustavo Sousa
2026-03-09 20:07 ` [PATCH v3 5/8] drm/xe: Call xe_wa_process_device_oob() after xe_sriov_probe_early() Gustavo Sousa
` (5 subsequent siblings)
9 siblings, 0 replies; 18+ messages in thread
From: Gustavo Sousa @ 2026-03-09 20:07 UTC (permalink / raw)
To: intel-xe; +Cc: Gustavo Sousa, Matt Roper
Add support for matching platform-level stepping, which will be used for
an upcoming NVL-P workaround.
As support for reading platform-level stepping information is added only
as needed in the driver, add a warning when the rule finds a STEP_NONE
value, which is an indication that the driver is missing such a support.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
| 7 +++++++
| 20 ++++++++++++++++++++
| 1 +
3 files changed, 28 insertions(+)
--git a/drivers/gpu/drm/xe/xe_rtp.c b/drivers/gpu/drm/xe/xe_rtp.c
index 7bfdc6795ce6..991f218f1cc3 100644
--- a/drivers/gpu/drm/xe/xe_rtp.c
+++ b/drivers/gpu/drm/xe/xe_rtp.c
@@ -55,6 +55,13 @@ static bool rule_matches(const struct xe_device *xe,
match = xe->info.platform == r->platform &&
xe->info.subplatform == r->subplatform;
break;
+ case XE_RTP_MATCH_PLATFORM_STEP:
+ if (drm_WARN_ON(&xe->drm, xe->info.step.platform == STEP_NONE))
+ return false;
+
+ match = xe->info.step.platform >= r->step_start &&
+ xe->info.step.platform < r->step_end;
+ break;
case XE_RTP_MATCH_GRAPHICS_VERSION:
if (drm_WARN_ON(&xe->drm, !gt))
return false;
--git a/drivers/gpu/drm/xe/xe_rtp.h b/drivers/gpu/drm/xe/xe_rtp.h
index be4195264286..7d6daa7eb1e4 100644
--- a/drivers/gpu/drm/xe/xe_rtp.h
+++ b/drivers/gpu/drm/xe/xe_rtp.h
@@ -35,6 +35,10 @@ struct xe_reg_sr;
{ .match_type = XE_RTP_MATCH_SUBPLATFORM, \
.platform = plat__, .subplatform = sub__ }
+#define _XE_RTP_RULE_PLATFORM_STEP(start__, end__) \
+ { .match_type = XE_RTP_MATCH_PLATFORM_STEP, \
+ .step_start = start__, .step_end = end__ }
+
#define _XE_RTP_RULE_GRAPHICS_STEP(start__, end__) \
{ .match_type = XE_RTP_MATCH_GRAPHICS_STEP, \
.step_start = start__, .step_end = end__ }
@@ -66,6 +70,22 @@ struct xe_reg_sr;
#define XE_RTP_RULE_SUBPLATFORM(plat_, sub_) \
_XE_RTP_RULE_SUBPLATFORM(XE_##plat_, XE_SUBPLATFORM_##plat_##_##sub_)
+/**
+ * XE_RTP_RULE_PLATFORM_STEP - Create rule matching platform-level stepping
+ * @start_: First stepping matching the rule
+ * @end_: First stepping that does not match the rule
+ *
+ * Note that the range matching this rule is [ @start_, @end_ ), i.e. inclusive
+ * on the left, exclusive on the right.
+ *
+ * You need to make sure that proper support for reading platform-level stepping
+ * information is present for the target platform before using this rule.
+ *
+ * Refer to XE_RTP_RULES() for expected usage.
+ */
+#define XE_RTP_RULE_PLATFORM_STEP(start_, end_) \
+ _XE_RTP_RULE_PLATFORM_STEP(STEP_##start_, STEP_##end_)
+
/**
* XE_RTP_RULE_GRAPHICS_STEP - Create rule matching graphics stepping
* @start_: First stepping matching the rule
--git a/drivers/gpu/drm/xe/xe_rtp_types.h b/drivers/gpu/drm/xe/xe_rtp_types.h
index 6ba7f226c227..166251615be1 100644
--- a/drivers/gpu/drm/xe/xe_rtp_types.h
+++ b/drivers/gpu/drm/xe/xe_rtp_types.h
@@ -41,6 +41,7 @@ struct xe_rtp_action {
enum {
XE_RTP_MATCH_PLATFORM,
XE_RTP_MATCH_SUBPLATFORM,
+ XE_RTP_MATCH_PLATFORM_STEP,
XE_RTP_MATCH_GRAPHICS_VERSION,
XE_RTP_MATCH_GRAPHICS_VERSION_RANGE,
XE_RTP_MATCH_GRAPHICS_VERSION_ANY_GT,
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v3 5/8] drm/xe: Call xe_wa_process_device_oob() after xe_sriov_probe_early()
2026-03-09 20:07 [PATCH v3 0/8] Extra enabling patches for NVL-P Gustavo Sousa
` (3 preceding siblings ...)
2026-03-09 20:07 ` [PATCH v3 4/8] drm/xe/rtp: Add support for matching platform-level stepping Gustavo Sousa
@ 2026-03-09 20:07 ` Gustavo Sousa
2026-03-09 20:19 ` Matt Roper
2026-03-09 20:20 ` Michal Wajdeczko
2026-03-09 20:07 ` [PATCH v3 6/8] drm/xe/nvlp: Implement Wa_14026539277 Gustavo Sousa
` (4 subsequent siblings)
9 siblings, 2 replies; 18+ messages in thread
From: Gustavo Sousa @ 2026-03-09 20:07 UTC (permalink / raw)
To: intel-xe; +Cc: Gustavo Sousa
We will need to use FUNC(xe_rtp_match_not_sriov_vf) in an upcoming
device OOB workaround and we need the SRIOV mode already defined by the
time that workaround check is done. Move the call to
xe_wa_process_device_oob() to happen after xe_sriov_probe_early() to
allow usage of FUNC(xe_rtp_match_not_sriov_vf).
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
| 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 3462645ca13c..5651bcdc6752 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -699,15 +699,15 @@ int xe_device_probe_early(struct xe_device *xe)
{
int err;
- xe_wa_device_init(xe);
- xe_wa_process_device_oob(xe);
-
err = xe_mmio_probe_early(xe);
if (err)
return err;
xe_sriov_probe_early(xe);
+ xe_wa_device_init(xe);
+ xe_wa_process_device_oob(xe);
+
if (IS_SRIOV_VF(xe))
vf_update_device_info(xe);
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v3 5/8] drm/xe: Call xe_wa_process_device_oob() after xe_sriov_probe_early()
2026-03-09 20:07 ` [PATCH v3 5/8] drm/xe: Call xe_wa_process_device_oob() after xe_sriov_probe_early() Gustavo Sousa
@ 2026-03-09 20:19 ` Matt Roper
2026-03-09 20:20 ` Michal Wajdeczko
1 sibling, 0 replies; 18+ messages in thread
From: Matt Roper @ 2026-03-09 20:19 UTC (permalink / raw)
To: Gustavo Sousa; +Cc: intel-xe
On Mon, Mar 09, 2026 at 05:07:33PM -0300, Gustavo Sousa wrote:
> We will need to use FUNC(xe_rtp_match_not_sriov_vf) in an upcoming
> device OOB workaround and we need the SRIOV mode already defined by the
> time that workaround check is done. Move the call to
> xe_wa_process_device_oob() to happen after xe_sriov_probe_early() to
> allow usage of FUNC(xe_rtp_match_not_sriov_vf).
>
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Seems okay for now.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Like you said earlier, we might need to make additional changes to the
device workarounds at some point in the future to allow different
subsets of device workarounds to be processed and checked with varying
levels of driver initialization. Maybe extra flags in xe->wa_active to
keep track of which parts of driver initialization are done and which
kinds of rules are usable.
In theory we could wind up with device workarounds in the future that
need to be processed and checked solely based on the PCI config space,
before we even map the BARs and have register access. But we can cross
that bridge if/when we come to it.
Matt
> ---
> drivers/gpu/drm/xe/xe_device.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 3462645ca13c..5651bcdc6752 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -699,15 +699,15 @@ int xe_device_probe_early(struct xe_device *xe)
> {
> int err;
>
> - xe_wa_device_init(xe);
> - xe_wa_process_device_oob(xe);
> -
> err = xe_mmio_probe_early(xe);
> if (err)
> return err;
>
> xe_sriov_probe_early(xe);
>
> + xe_wa_device_init(xe);
> + xe_wa_process_device_oob(xe);
> +
> if (IS_SRIOV_VF(xe))
> vf_update_device_info(xe);
>
>
> --
> 2.52.0
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v3 5/8] drm/xe: Call xe_wa_process_device_oob() after xe_sriov_probe_early()
2026-03-09 20:07 ` [PATCH v3 5/8] drm/xe: Call xe_wa_process_device_oob() after xe_sriov_probe_early() Gustavo Sousa
2026-03-09 20:19 ` Matt Roper
@ 2026-03-09 20:20 ` Michal Wajdeczko
2026-03-09 21:24 ` Gustavo Sousa
1 sibling, 1 reply; 18+ messages in thread
From: Michal Wajdeczko @ 2026-03-09 20:20 UTC (permalink / raw)
To: Gustavo Sousa, intel-xe
On 3/9/2026 9:07 PM, Gustavo Sousa wrote:
> We will need to use FUNC(xe_rtp_match_not_sriov_vf) in an upcoming
> device OOB workaround and we need the SRIOV mode already defined by the
> time that workaround check is done. Move the call to
> xe_wa_process_device_oob() to happen after xe_sriov_probe_early() to
> allow usage of FUNC(xe_rtp_match_not_sriov_vf).
>
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
> ---
> drivers/gpu/drm/xe/xe_device.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 3462645ca13c..5651bcdc6752 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -699,15 +699,15 @@ int xe_device_probe_early(struct xe_device *xe)
> {
> int err;
>
> - xe_wa_device_init(xe);
> - xe_wa_process_device_oob(xe);
> -
> err = xe_mmio_probe_early(xe);
> if (err)
> return err;
>
> xe_sriov_probe_early(xe);
>
> + xe_wa_device_init(xe);
> + xe_wa_process_device_oob(xe);
maybe it would be better to move wa_init after below vf_update call
to keep SRIOV related functions together ? also the vf_update will
clear some feature flags, maybe it's also better to do that before
any wa processing?
> +
> if (IS_SRIOV_VF(xe))
> vf_update_device_info(xe);
>
>
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v3 5/8] drm/xe: Call xe_wa_process_device_oob() after xe_sriov_probe_early()
2026-03-09 20:20 ` Michal Wajdeczko
@ 2026-03-09 21:24 ` Gustavo Sousa
0 siblings, 0 replies; 18+ messages in thread
From: Gustavo Sousa @ 2026-03-09 21:24 UTC (permalink / raw)
To: Michal Wajdeczko, intel-xe
Michal Wajdeczko <michal.wajdeczko@intel.com> writes:
> On 3/9/2026 9:07 PM, Gustavo Sousa wrote:
>> We will need to use FUNC(xe_rtp_match_not_sriov_vf) in an upcoming
>> device OOB workaround and we need the SRIOV mode already defined by the
>> time that workaround check is done. Move the call to
>> xe_wa_process_device_oob() to happen after xe_sriov_probe_early() to
>> allow usage of FUNC(xe_rtp_match_not_sriov_vf).
>>
>> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_device.c | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
>> index 3462645ca13c..5651bcdc6752 100644
>> --- a/drivers/gpu/drm/xe/xe_device.c
>> +++ b/drivers/gpu/drm/xe/xe_device.c
>> @@ -699,15 +699,15 @@ int xe_device_probe_early(struct xe_device *xe)
>> {
>> int err;
>>
>> - xe_wa_device_init(xe);
>> - xe_wa_process_device_oob(xe);
>> -
>> err = xe_mmio_probe_early(xe);
>> if (err)
>> return err;
>>
>> xe_sriov_probe_early(xe);
>>
>> + xe_wa_device_init(xe);
>> + xe_wa_process_device_oob(xe);
>
> maybe it would be better to move wa_init after below vf_update call
> to keep SRIOV related functions together ? also the vf_update will
> clear some feature flags, maybe it's also better to do that before
> any wa processing?
I don't think there are device OOB workarounds that need that
information right now, but, yeah, keeping SRIOV-related functions
together sounds fair.
--
Gustavo Sousa
>
>> +
>> if (IS_SRIOV_VF(xe))
>> vf_update_device_info(xe);
>>
>>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v3 6/8] drm/xe/nvlp: Implement Wa_14026539277
2026-03-09 20:07 [PATCH v3 0/8] Extra enabling patches for NVL-P Gustavo Sousa
` (4 preceding siblings ...)
2026-03-09 20:07 ` [PATCH v3 5/8] drm/xe: Call xe_wa_process_device_oob() after xe_sriov_probe_early() Gustavo Sousa
@ 2026-03-09 20:07 ` Gustavo Sousa
2026-03-09 20:13 ` Matt Roper
2026-03-09 20:07 ` [PATCH v3 7/8] drm/xe/xe3p: Drop Wa_16028780921 Gustavo Sousa
` (3 subsequent siblings)
9 siblings, 1 reply; 18+ messages in thread
From: Gustavo Sousa @ 2026-03-09 20:07 UTC (permalink / raw)
To: intel-xe; +Cc: Gustavo Sousa, Matt Roper
Implement the KMD part of Wa_14026539277, which applies to NVL-P A0.
The KMD implementation is just one component of the workaround, which
also depends on Pcode to implement its part in order to be complete.
v2:
- Add FUNC(xe_rtp_match_not_sriov_vf) to skip applying the workaround
to SRIOV VFs. (Matt)
v3:
- Make Wa_14026539277 a device workaround instead of a GT workaround.
(Matt)
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
| 4 ++++
| 1 +
| 27 +++++++++++++++++++++++++++
3 files changed, 32 insertions(+)
--git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 66ddad767ad4..a83cafbe03fd 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -452,6 +452,10 @@
#define XEHPC_L3CLOS_MASK(i) XE_REG_MCR(0xb194 + (i) * 8)
+#define L2COMPUTESIDECTRL XE_REG_MCR(0xb1c0)
+#define CECTRL REG_GENMASK(2, 1)
+#define CECTRL_CENODATA_ALWAYS REG_FIELD_PREP(CECTRL, 0x0)
+
#define XE2_GLOBAL_INVAL XE_REG(0xb404)
#define XE2LPM_L3SQCREG2 XE_REG_MCR(0xb604)
--git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
index 55ba01bc8f38..7a1d1f9072b1 100644
--- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
@@ -3,3 +3,4 @@
PLATFORM(PANTHERLAKE)
22019338487_display PLATFORM(LUNARLAKE)
14022085890 SUBPLATFORM(BATTLEMAGE, G21)
+14026539277 PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0), FUNC(xe_rtp_match_not_sriov_vf)
--git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index f3bb856aad2a..bbb2fb86d3cd 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -10,6 +10,7 @@
#include <drm/drm_managed.h>
#include <uapi/drm/xe_drm.h>
+#include <generated/xe_device_wa_oob.h>
#include <generated/xe_wa_oob.h>
#include "instructions/xe_alu_commands.h"
@@ -451,6 +452,23 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
return err;
}
+static void wa_14026539277(struct xe_gt *gt)
+{
+ struct xe_device *xe = gt_to_xe(gt);
+ u32 val;
+
+ if (!XE_DEVICE_WA(xe, 14026539277))
+ return;
+
+ if (!xe_gt_is_main_type(gt))
+ return;
+
+ val = xe_gt_mcr_unicast_read_any(gt, L2COMPUTESIDECTRL);
+ val &= ~CECTRL;
+ val |= CECTRL_CENODATA_ALWAYS;
+ xe_gt_mcr_multicast_write(gt, L2COMPUTESIDECTRL, val);
+}
+
int xe_gt_init_early(struct xe_gt *gt)
{
int err;
@@ -576,6 +594,15 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt)
*/
gt->info.gmdid = xe_mmio_read32(>->mmio, GMD_ID);
+ /*
+ * Wa_14026539277 can't be implemented as a regular GT workaround (i.e.
+ * as an entry in gt_was[]) for two reasons: it is actually a device
+ * workaround that happens to involve programming a GT register; and it
+ * needs to be applied early to avoid getting the hardware in a bad
+ * state before we have a chance to do the necessary programming.
+ */
+ wa_14026539277(gt);
+
return 0;
}
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v3 6/8] drm/xe/nvlp: Implement Wa_14026539277
2026-03-09 20:07 ` [PATCH v3 6/8] drm/xe/nvlp: Implement Wa_14026539277 Gustavo Sousa
@ 2026-03-09 20:13 ` Matt Roper
0 siblings, 0 replies; 18+ messages in thread
From: Matt Roper @ 2026-03-09 20:13 UTC (permalink / raw)
To: Gustavo Sousa; +Cc: intel-xe
On Mon, Mar 09, 2026 at 05:07:34PM -0300, Gustavo Sousa wrote:
> Implement the KMD part of Wa_14026539277, which applies to NVL-P A0.
> The KMD implementation is just one component of the workaround, which
> also depends on Pcode to implement its part in order to be complete.
>
> v2:
> - Add FUNC(xe_rtp_match_not_sriov_vf) to skip applying the workaround
> to SRIOV VFs. (Matt)
> v3:
> - Make Wa_14026539277 a device workaround instead of a GT workaround.
> (Matt)
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 4 ++++
> drivers/gpu/drm/xe/xe_device_wa_oob.rules | 1 +
> drivers/gpu/drm/xe/xe_gt.c | 27 +++++++++++++++++++++++++++
> 3 files changed, 32 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 66ddad767ad4..a83cafbe03fd 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -452,6 +452,10 @@
>
> #define XEHPC_L3CLOS_MASK(i) XE_REG_MCR(0xb194 + (i) * 8)
>
> +#define L2COMPUTESIDECTRL XE_REG_MCR(0xb1c0)
> +#define CECTRL REG_GENMASK(2, 1)
> +#define CECTRL_CENODATA_ALWAYS REG_FIELD_PREP(CECTRL, 0x0)
> +
> #define XE2_GLOBAL_INVAL XE_REG(0xb404)
>
> #define XE2LPM_L3SQCREG2 XE_REG_MCR(0xb604)
> diff --git a/drivers/gpu/drm/xe/xe_device_wa_oob.rules b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> index 55ba01bc8f38..7a1d1f9072b1 100644
> --- a/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_device_wa_oob.rules
> @@ -3,3 +3,4 @@
> PLATFORM(PANTHERLAKE)
> 22019338487_display PLATFORM(LUNARLAKE)
> 14022085890 SUBPLATFORM(BATTLEMAGE, G21)
> +14026539277 PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0), FUNC(xe_rtp_match_not_sriov_vf)
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index f3bb856aad2a..bbb2fb86d3cd 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -10,6 +10,7 @@
> #include <drm/drm_managed.h>
> #include <uapi/drm/xe_drm.h>
>
> +#include <generated/xe_device_wa_oob.h>
> #include <generated/xe_wa_oob.h>
>
> #include "instructions/xe_alu_commands.h"
> @@ -451,6 +452,23 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
> return err;
> }
>
> +static void wa_14026539277(struct xe_gt *gt)
> +{
> + struct xe_device *xe = gt_to_xe(gt);
> + u32 val;
> +
> + if (!XE_DEVICE_WA(xe, 14026539277))
> + return;
> +
> + if (!xe_gt_is_main_type(gt))
> + return;
> +
> + val = xe_gt_mcr_unicast_read_any(gt, L2COMPUTESIDECTRL);
> + val &= ~CECTRL;
> + val |= CECTRL_CENODATA_ALWAYS;
> + xe_gt_mcr_multicast_write(gt, L2COMPUTESIDECTRL, val);
> +}
> +
> int xe_gt_init_early(struct xe_gt *gt)
> {
> int err;
> @@ -576,6 +594,15 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt)
> */
> gt->info.gmdid = xe_mmio_read32(>->mmio, GMD_ID);
>
> + /*
> + * Wa_14026539277 can't be implemented as a regular GT workaround (i.e.
> + * as an entry in gt_was[]) for two reasons: it is actually a device
> + * workaround that happens to involve programming a GT register; and it
> + * needs to be applied early to avoid getting the hardware in a bad
> + * state before we have a chance to do the necessary programming.
> + */
> + wa_14026539277(gt);
> +
> return 0;
> }
>
>
> --
> 2.52.0
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v3 7/8] drm/xe/xe3p: Drop Wa_16028780921
2026-03-09 20:07 [PATCH v3 0/8] Extra enabling patches for NVL-P Gustavo Sousa
` (5 preceding siblings ...)
2026-03-09 20:07 ` [PATCH v3 6/8] drm/xe/nvlp: Implement Wa_14026539277 Gustavo Sousa
@ 2026-03-09 20:07 ` Gustavo Sousa
2026-03-09 20:07 ` [PATCH v3 8/8] drm/xe: Translate C-state "reset value" into RC6 Gustavo Sousa
` (2 subsequent siblings)
9 siblings, 0 replies; 18+ messages in thread
From: Gustavo Sousa @ 2026-03-09 20:07 UTC (permalink / raw)
To: intel-xe; +Cc: Gustavo Sousa, Matt Roper
Wa_16028780921 involves writing to a register that is locked by firmware
prior to driver loading and doesn't have any effect if implemented by
the KMD. Since the implementation of the workaround actually belongs
the firmware, just drop the ineffective implementation by the KMD.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
| 3 ---
| 4 ----
2 files changed, 7 deletions(-)
--git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index a83cafbe03fd..f49a28f4a330 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -218,9 +218,6 @@
#define GSCPSMI_BASE XE_REG(0x880c)
-#define CCCHKNREG2 XE_REG_MCR(0x881c)
-#define LOCALITYDIS REG_BIT(7)
-
#define CCCHKNREG1 XE_REG_MCR(0x8828)
#define L3CMPCTRL REG_BIT(23)
#define ENCOMPPERFFIX REG_BIT(18)
--git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 183c5c86c35a..38881b1aaeb1 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -287,10 +287,6 @@ static const struct xe_rtp_entry_sr gt_was[] = {
XE_RTP_ACTIONS(SET(MMIOATSREQLIMIT_GAM_WALK_3D,
DIS_ATS_WRONLY_PG))
},
- { XE_RTP_NAME("16028780921"),
- XE_RTP_RULES(GRAPHICS_VERSION(3510), GRAPHICS_STEP(A0, B0)),
- XE_RTP_ACTIONS(SET(CCCHKNREG2, LOCALITYDIS))
- },
{ XE_RTP_NAME("14026144927"),
XE_RTP_RULES(GRAPHICS_VERSION(3510), GRAPHICS_STEP(A0, B0)),
XE_RTP_ACTIONS(SET(L3SQCREG2, L3_SQ_DISABLE_COAMA_2WAY_COH |
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v3 8/8] drm/xe: Translate C-state "reset value" into RC6
2026-03-09 20:07 [PATCH v3 0/8] Extra enabling patches for NVL-P Gustavo Sousa
` (6 preceding siblings ...)
2026-03-09 20:07 ` [PATCH v3 7/8] drm/xe/xe3p: Drop Wa_16028780921 Gustavo Sousa
@ 2026-03-09 20:07 ` Gustavo Sousa
2026-03-09 20:14 ` ✓ CI.KUnit: success for Extra enabling patches for NVL-P (rev3) Patchwork
2026-03-09 21:02 ` ✗ Xe.CI.BAT: failure " Patchwork
9 siblings, 0 replies; 18+ messages in thread
From: Gustavo Sousa @ 2026-03-09 20:07 UTC (permalink / raw)
To: intel-xe; +Cc: Gustavo Sousa, Matt Roper
There are higher level sleep states that will cause RC6 state readout to
come back with an "in-reset" value. That is the case with NVL-P. As
those states are only possible if the GT is already in C6, let's just
translate the "reset value" into C6 when doing the readout.
Bspec: 67651
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
| 1 +
| 8 ++++++++
2 files changed, 9 insertions(+)
--git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index f49a28f4a330..1cc8c7c2d379 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -20,6 +20,7 @@
#define MTL_MIRROR_TARGET_WP1 XE_REG(0xc60)
#define MTL_CAGF_MASK REG_GENMASK(8, 0)
#define MTL_CC_MASK REG_GENMASK(12, 9)
+#define MTL_CRST 0xf
/* RPM unit config (Gen8+) */
#define RPM_CONFIG0 XE_REG(0xd00)
--git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
index 21fe73ab4583..bb8c4e793492 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.c
+++ b/drivers/gpu/drm/xe/xe_guc_pc.c
@@ -756,6 +756,14 @@ enum xe_gt_idle_state xe_guc_pc_c_status(struct xe_guc_pc *pc)
if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270) {
reg = xe_mmio_read32(>->mmio, MTL_MIRROR_TARGET_WP1);
gt_c_state = REG_FIELD_GET(MTL_CC_MASK, reg);
+
+ /*
+ * There are higher level sleep states that will cause this
+ * field to read out as its reset state, and those are only
+ * possible after the GT is already in C6.
+ */
+ if (gt_c_state == MTL_CRST)
+ gt_c_state = GT_C6;
} else {
reg = xe_mmio_read32(>->mmio, GT_CORE_STATUS);
gt_c_state = REG_FIELD_GET(RCN_MASK, reg);
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* ✓ CI.KUnit: success for Extra enabling patches for NVL-P (rev3)
2026-03-09 20:07 [PATCH v3 0/8] Extra enabling patches for NVL-P Gustavo Sousa
` (7 preceding siblings ...)
2026-03-09 20:07 ` [PATCH v3 8/8] drm/xe: Translate C-state "reset value" into RC6 Gustavo Sousa
@ 2026-03-09 20:14 ` Patchwork
2026-03-09 21:02 ` ✗ Xe.CI.BAT: failure " Patchwork
9 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-03-09 20:14 UTC (permalink / raw)
To: Gustavo Sousa; +Cc: intel-xe
== Series Details ==
Series: Extra enabling patches for NVL-P (rev3)
URL : https://patchwork.freedesktop.org/series/162666/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:12:51] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:12:55] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:13:26] Starting KUnit Kernel (1/1)...
[20:13:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:13:26] ================== guc_buf (11 subtests) ===================
[20:13:26] [PASSED] test_smallest
[20:13:26] [PASSED] test_largest
[20:13:26] [PASSED] test_granular
[20:13:26] [PASSED] test_unique
[20:13:26] [PASSED] test_overlap
[20:13:26] [PASSED] test_reusable
[20:13:26] [PASSED] test_too_big
[20:13:26] [PASSED] test_flush
[20:13:26] [PASSED] test_lookup
[20:13:26] [PASSED] test_data
[20:13:26] [PASSED] test_class
[20:13:26] ===================== [PASSED] guc_buf =====================
[20:13:26] =================== guc_dbm (7 subtests) ===================
[20:13:26] [PASSED] test_empty
[20:13:26] [PASSED] test_default
[20:13:26] ======================== test_size ========================
[20:13:26] [PASSED] 4
[20:13:26] [PASSED] 8
[20:13:26] [PASSED] 32
[20:13:26] [PASSED] 256
[20:13:26] ==================== [PASSED] test_size ====================
[20:13:26] ======================= test_reuse ========================
[20:13:26] [PASSED] 4
[20:13:26] [PASSED] 8
[20:13:26] [PASSED] 32
[20:13:26] [PASSED] 256
[20:13:26] =================== [PASSED] test_reuse ====================
[20:13:26] =================== test_range_overlap ====================
[20:13:26] [PASSED] 4
[20:13:26] [PASSED] 8
[20:13:26] [PASSED] 32
[20:13:26] [PASSED] 256
[20:13:26] =============== [PASSED] test_range_overlap ================
[20:13:26] =================== test_range_compact ====================
[20:13:26] [PASSED] 4
[20:13:26] [PASSED] 8
[20:13:26] [PASSED] 32
[20:13:26] [PASSED] 256
[20:13:26] =============== [PASSED] test_range_compact ================
[20:13:26] ==================== test_range_spare =====================
[20:13:26] [PASSED] 4
[20:13:26] [PASSED] 8
[20:13:26] [PASSED] 32
[20:13:26] [PASSED] 256
[20:13:26] ================ [PASSED] test_range_spare =================
[20:13:26] ===================== [PASSED] guc_dbm =====================
[20:13:26] =================== guc_idm (6 subtests) ===================
[20:13:26] [PASSED] bad_init
[20:13:26] [PASSED] no_init
[20:13:26] [PASSED] init_fini
[20:13:26] [PASSED] check_used
[20:13:26] [PASSED] check_quota
[20:13:26] [PASSED] check_all
[20:13:26] ===================== [PASSED] guc_idm =====================
[20:13:26] ================== no_relay (3 subtests) ===================
[20:13:26] [PASSED] xe_drops_guc2pf_if_not_ready
[20:13:26] [PASSED] xe_drops_guc2vf_if_not_ready
[20:13:26] [PASSED] xe_rejects_send_if_not_ready
[20:13:26] ==================== [PASSED] no_relay =====================
[20:13:26] ================== pf_relay (14 subtests) ==================
[20:13:26] [PASSED] pf_rejects_guc2pf_too_short
[20:13:26] [PASSED] pf_rejects_guc2pf_too_long
[20:13:26] [PASSED] pf_rejects_guc2pf_no_payload
[20:13:26] [PASSED] pf_fails_no_payload
[20:13:26] [PASSED] pf_fails_bad_origin
[20:13:26] [PASSED] pf_fails_bad_type
[20:13:26] [PASSED] pf_txn_reports_error
[20:13:26] [PASSED] pf_txn_sends_pf2guc
[20:13:26] [PASSED] pf_sends_pf2guc
[20:13:26] [SKIPPED] pf_loopback_nop
[20:13:26] [SKIPPED] pf_loopback_echo
[20:13:26] [SKIPPED] pf_loopback_fail
[20:13:26] [SKIPPED] pf_loopback_busy
[20:13:26] [SKIPPED] pf_loopback_retry
[20:13:26] ==================== [PASSED] pf_relay =====================
[20:13:26] ================== vf_relay (3 subtests) ===================
[20:13:26] [PASSED] vf_rejects_guc2vf_too_short
[20:13:26] [PASSED] vf_rejects_guc2vf_too_long
[20:13:26] [PASSED] vf_rejects_guc2vf_no_payload
[20:13:26] ==================== [PASSED] vf_relay =====================
[20:13:26] ================ pf_gt_config (9 subtests) =================
[20:13:26] [PASSED] fair_contexts_1vf
[20:13:26] [PASSED] fair_doorbells_1vf
[20:13:26] [PASSED] fair_ggtt_1vf
[20:13:26] ====================== fair_vram_1vf ======================
[20:13:26] [PASSED] 3.50 GiB
[20:13:26] [PASSED] 11.5 GiB
[20:13:26] [PASSED] 15.5 GiB
[20:13:26] [PASSED] 31.5 GiB
[20:13:26] [PASSED] 63.5 GiB
[20:13:26] [PASSED] 1.91 GiB
[20:13:26] ================== [PASSED] fair_vram_1vf ==================
[20:13:26] ================ fair_vram_1vf_admin_only =================
[20:13:26] [PASSED] 3.50 GiB
[20:13:26] [PASSED] 11.5 GiB
[20:13:26] [PASSED] 15.5 GiB
[20:13:26] [PASSED] 31.5 GiB
[20:13:26] [PASSED] 63.5 GiB
[20:13:26] [PASSED] 1.91 GiB
[20:13:26] ============ [PASSED] fair_vram_1vf_admin_only =============
[20:13:26] ====================== fair_contexts ======================
[20:13:26] [PASSED] 1 VF
[20:13:26] [PASSED] 2 VFs
[20:13:26] [PASSED] 3 VFs
[20:13:26] [PASSED] 4 VFs
[20:13:26] [PASSED] 5 VFs
[20:13:26] [PASSED] 6 VFs
[20:13:26] [PASSED] 7 VFs
[20:13:26] [PASSED] 8 VFs
[20:13:26] [PASSED] 9 VFs
[20:13:26] [PASSED] 10 VFs
[20:13:26] [PASSED] 11 VFs
[20:13:26] [PASSED] 12 VFs
[20:13:26] [PASSED] 13 VFs
[20:13:26] [PASSED] 14 VFs
[20:13:26] [PASSED] 15 VFs
[20:13:26] [PASSED] 16 VFs
[20:13:26] [PASSED] 17 VFs
[20:13:26] [PASSED] 18 VFs
[20:13:26] [PASSED] 19 VFs
[20:13:26] [PASSED] 20 VFs
[20:13:26] [PASSED] 21 VFs
[20:13:26] [PASSED] 22 VFs
[20:13:26] [PASSED] 23 VFs
[20:13:26] [PASSED] 24 VFs
[20:13:26] [PASSED] 25 VFs
[20:13:26] [PASSED] 26 VFs
[20:13:26] [PASSED] 27 VFs
[20:13:26] [PASSED] 28 VFs
[20:13:26] [PASSED] 29 VFs
[20:13:26] [PASSED] 30 VFs
[20:13:26] [PASSED] 31 VFs
[20:13:26] [PASSED] 32 VFs
[20:13:26] [PASSED] 33 VFs
[20:13:26] [PASSED] 34 VFs
[20:13:26] [PASSED] 35 VFs
[20:13:26] [PASSED] 36 VFs
[20:13:26] [PASSED] 37 VFs
[20:13:26] [PASSED] 38 VFs
[20:13:26] [PASSED] 39 VFs
[20:13:26] [PASSED] 40 VFs
[20:13:26] [PASSED] 41 VFs
[20:13:26] [PASSED] 42 VFs
[20:13:26] [PASSED] 43 VFs
[20:13:26] [PASSED] 44 VFs
[20:13:26] [PASSED] 45 VFs
[20:13:26] [PASSED] 46 VFs
[20:13:26] [PASSED] 47 VFs
[20:13:26] [PASSED] 48 VFs
[20:13:26] [PASSED] 49 VFs
[20:13:26] [PASSED] 50 VFs
[20:13:26] [PASSED] 51 VFs
[20:13:26] [PASSED] 52 VFs
[20:13:26] [PASSED] 53 VFs
[20:13:26] [PASSED] 54 VFs
[20:13:26] [PASSED] 55 VFs
[20:13:26] [PASSED] 56 VFs
[20:13:26] [PASSED] 57 VFs
[20:13:26] [PASSED] 58 VFs
[20:13:26] [PASSED] 59 VFs
[20:13:26] [PASSED] 60 VFs
[20:13:26] [PASSED] 61 VFs
[20:13:26] [PASSED] 62 VFs
[20:13:26] [PASSED] 63 VFs
[20:13:26] ================== [PASSED] fair_contexts ==================
[20:13:26] ===================== fair_doorbells ======================
[20:13:26] [PASSED] 1 VF
[20:13:26] [PASSED] 2 VFs
[20:13:26] [PASSED] 3 VFs
[20:13:26] [PASSED] 4 VFs
[20:13:26] [PASSED] 5 VFs
[20:13:26] [PASSED] 6 VFs
[20:13:26] [PASSED] 7 VFs
[20:13:26] [PASSED] 8 VFs
[20:13:26] [PASSED] 9 VFs
[20:13:26] [PASSED] 10 VFs
[20:13:26] [PASSED] 11 VFs
[20:13:26] [PASSED] 12 VFs
[20:13:26] [PASSED] 13 VFs
[20:13:26] [PASSED] 14 VFs
[20:13:26] [PASSED] 15 VFs
[20:13:26] [PASSED] 16 VFs
[20:13:26] [PASSED] 17 VFs
[20:13:26] [PASSED] 18 VFs
[20:13:26] [PASSED] 19 VFs
[20:13:26] [PASSED] 20 VFs
[20:13:26] [PASSED] 21 VFs
[20:13:26] [PASSED] 22 VFs
[20:13:26] [PASSED] 23 VFs
[20:13:26] [PASSED] 24 VFs
[20:13:26] [PASSED] 25 VFs
[20:13:26] [PASSED] 26 VFs
[20:13:26] [PASSED] 27 VFs
[20:13:26] [PASSED] 28 VFs
[20:13:26] [PASSED] 29 VFs
[20:13:26] [PASSED] 30 VFs
[20:13:26] [PASSED] 31 VFs
[20:13:26] [PASSED] 32 VFs
[20:13:26] [PASSED] 33 VFs
[20:13:26] [PASSED] 34 VFs
[20:13:26] [PASSED] 35 VFs
[20:13:26] [PASSED] 36 VFs
[20:13:26] [PASSED] 37 VFs
[20:13:26] [PASSED] 38 VFs
[20:13:26] [PASSED] 39 VFs
[20:13:26] [PASSED] 40 VFs
[20:13:26] [PASSED] 41 VFs
[20:13:26] [PASSED] 42 VFs
[20:13:26] [PASSED] 43 VFs
[20:13:26] [PASSED] 44 VFs
[20:13:26] [PASSED] 45 VFs
[20:13:26] [PASSED] 46 VFs
[20:13:26] [PASSED] 47 VFs
[20:13:26] [PASSED] 48 VFs
[20:13:26] [PASSED] 49 VFs
[20:13:26] [PASSED] 50 VFs
[20:13:26] [PASSED] 51 VFs
[20:13:26] [PASSED] 52 VFs
[20:13:26] [PASSED] 53 VFs
[20:13:26] [PASSED] 54 VFs
[20:13:26] [PASSED] 55 VFs
[20:13:26] [PASSED] 56 VFs
[20:13:26] [PASSED] 57 VFs
[20:13:26] [PASSED] 58 VFs
[20:13:26] [PASSED] 59 VFs
[20:13:26] [PASSED] 60 VFs
[20:13:26] [PASSED] 61 VFs
[20:13:26] [PASSED] 62 VFs
[20:13:26] [PASSED] 63 VFs
[20:13:26] ================= [PASSED] fair_doorbells ==================
[20:13:26] ======================== fair_ggtt ========================
[20:13:26] [PASSED] 1 VF
[20:13:26] [PASSED] 2 VFs
[20:13:26] [PASSED] 3 VFs
[20:13:26] [PASSED] 4 VFs
[20:13:26] [PASSED] 5 VFs
[20:13:26] [PASSED] 6 VFs
[20:13:26] [PASSED] 7 VFs
[20:13:26] [PASSED] 8 VFs
[20:13:26] [PASSED] 9 VFs
[20:13:26] [PASSED] 10 VFs
[20:13:26] [PASSED] 11 VFs
[20:13:26] [PASSED] 12 VFs
[20:13:26] [PASSED] 13 VFs
[20:13:26] [PASSED] 14 VFs
[20:13:26] [PASSED] 15 VFs
[20:13:26] [PASSED] 16 VFs
[20:13:26] [PASSED] 17 VFs
[20:13:26] [PASSED] 18 VFs
[20:13:26] [PASSED] 19 VFs
[20:13:26] [PASSED] 20 VFs
[20:13:26] [PASSED] 21 VFs
[20:13:26] [PASSED] 22 VFs
[20:13:26] [PASSED] 23 VFs
[20:13:26] [PASSED] 24 VFs
[20:13:26] [PASSED] 25 VFs
[20:13:26] [PASSED] 26 VFs
[20:13:26] [PASSED] 27 VFs
[20:13:26] [PASSED] 28 VFs
[20:13:26] [PASSED] 29 VFs
[20:13:26] [PASSED] 30 VFs
[20:13:26] [PASSED] 31 VFs
[20:13:26] [PASSED] 32 VFs
[20:13:26] [PASSED] 33 VFs
[20:13:26] [PASSED] 34 VFs
[20:13:26] [PASSED] 35 VFs
[20:13:26] [PASSED] 36 VFs
[20:13:26] [PASSED] 37 VFs
[20:13:26] [PASSED] 38 VFs
[20:13:26] [PASSED] 39 VFs
[20:13:26] [PASSED] 40 VFs
[20:13:26] [PASSED] 41 VFs
[20:13:26] [PASSED] 42 VFs
[20:13:26] [PASSED] 43 VFs
[20:13:26] [PASSED] 44 VFs
[20:13:26] [PASSED] 45 VFs
[20:13:26] [PASSED] 46 VFs
[20:13:26] [PASSED] 47 VFs
[20:13:26] [PASSED] 48 VFs
[20:13:26] [PASSED] 49 VFs
[20:13:26] [PASSED] 50 VFs
[20:13:26] [PASSED] 51 VFs
[20:13:26] [PASSED] 52 VFs
[20:13:26] [PASSED] 53 VFs
[20:13:26] [PASSED] 54 VFs
[20:13:26] [PASSED] 55 VFs
[20:13:26] [PASSED] 56 VFs
[20:13:26] [PASSED] 57 VFs
[20:13:26] [PASSED] 58 VFs
[20:13:26] [PASSED] 59 VFs
[20:13:26] [PASSED] 60 VFs
[20:13:26] [PASSED] 61 VFs
[20:13:26] [PASSED] 62 VFs
[20:13:26] [PASSED] 63 VFs
[20:13:26] ==================== [PASSED] fair_ggtt ====================
[20:13:26] ======================== fair_vram ========================
[20:13:26] [PASSED] 1 VF
[20:13:26] [PASSED] 2 VFs
[20:13:26] [PASSED] 3 VFs
[20:13:26] [PASSED] 4 VFs
[20:13:26] [PASSED] 5 VFs
[20:13:26] [PASSED] 6 VFs
[20:13:26] [PASSED] 7 VFs
[20:13:26] [PASSED] 8 VFs
[20:13:26] [PASSED] 9 VFs
[20:13:26] [PASSED] 10 VFs
[20:13:26] [PASSED] 11 VFs
[20:13:26] [PASSED] 12 VFs
[20:13:26] [PASSED] 13 VFs
[20:13:26] [PASSED] 14 VFs
[20:13:26] [PASSED] 15 VFs
[20:13:26] [PASSED] 16 VFs
[20:13:26] [PASSED] 17 VFs
[20:13:26] [PASSED] 18 VFs
[20:13:26] [PASSED] 19 VFs
[20:13:26] [PASSED] 20 VFs
[20:13:26] [PASSED] 21 VFs
[20:13:26] [PASSED] 22 VFs
[20:13:26] [PASSED] 23 VFs
[20:13:26] [PASSED] 24 VFs
[20:13:26] [PASSED] 25 VFs
[20:13:26] [PASSED] 26 VFs
[20:13:26] [PASSED] 27 VFs
[20:13:26] [PASSED] 28 VFs
[20:13:26] [PASSED] 29 VFs
[20:13:26] [PASSED] 30 VFs
[20:13:26] [PASSED] 31 VFs
[20:13:26] [PASSED] 32 VFs
[20:13:26] [PASSED] 33 VFs
[20:13:26] [PASSED] 34 VFs
[20:13:26] [PASSED] 35 VFs
[20:13:26] [PASSED] 36 VFs
[20:13:26] [PASSED] 37 VFs
[20:13:26] [PASSED] 38 VFs
[20:13:26] [PASSED] 39 VFs
[20:13:26] [PASSED] 40 VFs
[20:13:26] [PASSED] 41 VFs
[20:13:26] [PASSED] 42 VFs
[20:13:26] [PASSED] 43 VFs
[20:13:26] [PASSED] 44 VFs
[20:13:26] [PASSED] 45 VFs
[20:13:26] [PASSED] 46 VFs
[20:13:26] [PASSED] 47 VFs
[20:13:26] [PASSED] 48 VFs
[20:13:26] [PASSED] 49 VFs
[20:13:26] [PASSED] 50 VFs
[20:13:26] [PASSED] 51 VFs
[20:13:26] [PASSED] 52 VFs
[20:13:26] [PASSED] 53 VFs
[20:13:26] [PASSED] 54 VFs
[20:13:26] [PASSED] 55 VFs
[20:13:26] [PASSED] 56 VFs
[20:13:26] [PASSED] 57 VFs
[20:13:26] [PASSED] 58 VFs
[20:13:26] [PASSED] 59 VFs
[20:13:26] [PASSED] 60 VFs
[20:13:26] [PASSED] 61 VFs
[20:13:26] [PASSED] 62 VFs
[20:13:26] [PASSED] 63 VFs
[20:13:26] ==================== [PASSED] fair_vram ====================
[20:13:26] ================== [PASSED] pf_gt_config ===================
[20:13:26] ===================== lmtt (1 subtest) =====================
[20:13:26] ======================== test_ops =========================
[20:13:26] [PASSED] 2-level
[20:13:26] [PASSED] multi-level
[20:13:26] ==================== [PASSED] test_ops =====================
[20:13:26] ====================== [PASSED] lmtt =======================
[20:13:26] ================= pf_service (11 subtests) =================
[20:13:26] [PASSED] pf_negotiate_any
[20:13:26] [PASSED] pf_negotiate_base_match
[20:13:26] [PASSED] pf_negotiate_base_newer
[20:13:26] [PASSED] pf_negotiate_base_next
[20:13:26] [SKIPPED] pf_negotiate_base_older
[20:13:26] [PASSED] pf_negotiate_base_prev
[20:13:26] [PASSED] pf_negotiate_latest_match
[20:13:26] [PASSED] pf_negotiate_latest_newer
[20:13:26] [PASSED] pf_negotiate_latest_next
[20:13:26] [SKIPPED] pf_negotiate_latest_older
[20:13:26] [SKIPPED] pf_negotiate_latest_prev
[20:13:26] =================== [PASSED] pf_service ====================
[20:13:26] ================= xe_guc_g2g (2 subtests) ==================
[20:13:26] ============== xe_live_guc_g2g_kunit_default ==============
[20:13:26] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[20:13:26] ============== xe_live_guc_g2g_kunit_allmem ===============
[20:13:26] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[20:13:26] =================== [SKIPPED] xe_guc_g2g ===================
[20:13:26] =================== xe_mocs (2 subtests) ===================
[20:13:26] ================ xe_live_mocs_kernel_kunit ================
[20:13:26] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:13:26] ================ xe_live_mocs_reset_kunit =================
[20:13:26] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:13:26] ==================== [SKIPPED] xe_mocs =====================
[20:13:26] ================= xe_migrate (2 subtests) ==================
[20:13:26] ================= xe_migrate_sanity_kunit =================
[20:13:26] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:13:26] ================== xe_validate_ccs_kunit ==================
[20:13:26] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:13:26] =================== [SKIPPED] xe_migrate ===================
[20:13:26] ================== xe_dma_buf (1 subtest) ==================
[20:13:26] ==================== xe_dma_buf_kunit =====================
[20:13:26] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:13:26] =================== [SKIPPED] xe_dma_buf ===================
[20:13:26] ================= xe_bo_shrink (1 subtest) =================
[20:13:26] =================== xe_bo_shrink_kunit ====================
[20:13:26] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:13:26] ================== [SKIPPED] xe_bo_shrink ==================
[20:13:26] ==================== xe_bo (2 subtests) ====================
[20:13:26] ================== xe_ccs_migrate_kunit ===================
[20:13:26] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[20:13:26] ==================== xe_bo_evict_kunit ====================
[20:13:26] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:13:26] ===================== [SKIPPED] xe_bo ======================
[20:13:26] ==================== args (13 subtests) ====================
[20:13:26] [PASSED] count_args_test
[20:13:26] [PASSED] call_args_example
[20:13:26] [PASSED] call_args_test
[20:13:26] [PASSED] drop_first_arg_example
[20:13:26] [PASSED] drop_first_arg_test
[20:13:26] [PASSED] first_arg_example
[20:13:26] [PASSED] first_arg_test
[20:13:26] [PASSED] last_arg_example
[20:13:26] [PASSED] last_arg_test
[20:13:26] [PASSED] pick_arg_example
[20:13:26] [PASSED] if_args_example
[20:13:26] [PASSED] if_args_test
[20:13:26] [PASSED] sep_comma_example
[20:13:26] ====================== [PASSED] args =======================
[20:13:26] =================== xe_pci (3 subtests) ====================
[20:13:26] ==================== check_graphics_ip ====================
[20:13:26] [PASSED] 12.00 Xe_LP
[20:13:26] [PASSED] 12.10 Xe_LP+
[20:13:26] [PASSED] 12.55 Xe_HPG
[20:13:26] [PASSED] 12.60 Xe_HPC
[20:13:26] [PASSED] 12.70 Xe_LPG
[20:13:26] [PASSED] 12.71 Xe_LPG
[20:13:26] [PASSED] 12.74 Xe_LPG+
[20:13:26] [PASSED] 20.01 Xe2_HPG
[20:13:26] [PASSED] 20.02 Xe2_HPG
[20:13:26] [PASSED] 20.04 Xe2_LPG
[20:13:26] [PASSED] 30.00 Xe3_LPG
[20:13:26] [PASSED] 30.01 Xe3_LPG
[20:13:26] [PASSED] 30.03 Xe3_LPG
[20:13:26] [PASSED] 30.04 Xe3_LPG
[20:13:26] [PASSED] 30.05 Xe3_LPG
[20:13:26] [PASSED] 35.10 Xe3p_LPG
[20:13:26] [PASSED] 35.11 Xe3p_XPC
[20:13:26] ================ [PASSED] check_graphics_ip ================
[20:13:26] ===================== check_media_ip ======================
[20:13:26] [PASSED] 12.00 Xe_M
[20:13:26] [PASSED] 12.55 Xe_HPM
[20:13:26] [PASSED] 13.00 Xe_LPM+
[20:13:26] [PASSED] 13.01 Xe2_HPM
[20:13:26] [PASSED] 20.00 Xe2_LPM
[20:13:26] [PASSED] 30.00 Xe3_LPM
[20:13:26] [PASSED] 30.02 Xe3_LPM
[20:13:26] [PASSED] 35.00 Xe3p_LPM
[20:13:26] [PASSED] 35.03 Xe3p_HPM
[20:13:26] ================= [PASSED] check_media_ip ==================
[20:13:26] =================== check_platform_desc ===================
[20:13:26] [PASSED] 0x9A60 (TIGERLAKE)
[20:13:26] [PASSED] 0x9A68 (TIGERLAKE)
[20:13:26] [PASSED] 0x9A70 (TIGERLAKE)
[20:13:26] [PASSED] 0x9A40 (TIGERLAKE)
[20:13:26] [PASSED] 0x9A49 (TIGERLAKE)
[20:13:26] [PASSED] 0x9A59 (TIGERLAKE)
[20:13:26] [PASSED] 0x9A78 (TIGERLAKE)
[20:13:26] [PASSED] 0x9AC0 (TIGERLAKE)
[20:13:26] [PASSED] 0x9AC9 (TIGERLAKE)
[20:13:26] [PASSED] 0x9AD9 (TIGERLAKE)
[20:13:26] [PASSED] 0x9AF8 (TIGERLAKE)
[20:13:26] [PASSED] 0x4C80 (ROCKETLAKE)
[20:13:26] [PASSED] 0x4C8A (ROCKETLAKE)
[20:13:26] [PASSED] 0x4C8B (ROCKETLAKE)
[20:13:26] [PASSED] 0x4C8C (ROCKETLAKE)
[20:13:26] [PASSED] 0x4C90 (ROCKETLAKE)
[20:13:26] [PASSED] 0x4C9A (ROCKETLAKE)
[20:13:26] [PASSED] 0x4680 (ALDERLAKE_S)
[20:13:26] [PASSED] 0x4682 (ALDERLAKE_S)
[20:13:26] [PASSED] 0x4688 (ALDERLAKE_S)
[20:13:26] [PASSED] 0x468A (ALDERLAKE_S)
[20:13:26] [PASSED] 0x468B (ALDERLAKE_S)
[20:13:26] [PASSED] 0x4690 (ALDERLAKE_S)
[20:13:26] [PASSED] 0x4692 (ALDERLAKE_S)
[20:13:26] [PASSED] 0x4693 (ALDERLAKE_S)
[20:13:26] [PASSED] 0x46A0 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46A1 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46A2 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46A3 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46A6 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46A8 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46AA (ALDERLAKE_P)
[20:13:26] [PASSED] 0x462A (ALDERLAKE_P)
[20:13:26] [PASSED] 0x4626 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x4628 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46B0 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46B1 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46B2 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46B3 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46C0 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46C1 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46C2 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46C3 (ALDERLAKE_P)
[20:13:26] [PASSED] 0x46D0 (ALDERLAKE_N)
[20:13:26] [PASSED] 0x46D1 (ALDERLAKE_N)
[20:13:26] [PASSED] 0x46D2 (ALDERLAKE_N)
[20:13:26] [PASSED] 0x46D3 (ALDERLAKE_N)
[20:13:26] [PASSED] 0x46D4 (ALDERLAKE_N)
[20:13:26] [PASSED] 0xA721 (ALDERLAKE_P)
[20:13:26] [PASSED] 0xA7A1 (ALDERLAKE_P)
[20:13:26] [PASSED] 0xA7A9 (ALDERLAKE_P)
[20:13:26] [PASSED] 0xA7AC (ALDERLAKE_P)
[20:13:26] [PASSED] 0xA7AD (ALDERLAKE_P)
[20:13:26] [PASSED] 0xA720 (ALDERLAKE_P)
[20:13:26] [PASSED] 0xA7A0 (ALDERLAKE_P)
[20:13:26] [PASSED] 0xA7A8 (ALDERLAKE_P)
[20:13:26] [PASSED] 0xA7AA (ALDERLAKE_P)
[20:13:26] [PASSED] 0xA7AB (ALDERLAKE_P)
[20:13:26] [PASSED] 0xA780 (ALDERLAKE_S)
[20:13:26] [PASSED] 0xA781 (ALDERLAKE_S)
[20:13:26] [PASSED] 0xA782 (ALDERLAKE_S)
[20:13:26] [PASSED] 0xA783 (ALDERLAKE_S)
[20:13:26] [PASSED] 0xA788 (ALDERLAKE_S)
[20:13:26] [PASSED] 0xA789 (ALDERLAKE_S)
[20:13:26] [PASSED] 0xA78A (ALDERLAKE_S)
[20:13:26] [PASSED] 0xA78B (ALDERLAKE_S)
[20:13:26] [PASSED] 0x4905 (DG1)
[20:13:26] [PASSED] 0x4906 (DG1)
[20:13:26] [PASSED] 0x4907 (DG1)
[20:13:26] [PASSED] 0x4908 (DG1)
[20:13:26] [PASSED] 0x4909 (DG1)
[20:13:26] [PASSED] 0x56C0 (DG2)
[20:13:26] [PASSED] 0x56C2 (DG2)
[20:13:26] [PASSED] 0x56C1 (DG2)
[20:13:26] [PASSED] 0x7D51 (METEORLAKE)
[20:13:26] [PASSED] 0x7DD1 (METEORLAKE)
[20:13:26] [PASSED] 0x7D41 (METEORLAKE)
[20:13:26] [PASSED] 0x7D67 (METEORLAKE)
[20:13:26] [PASSED] 0xB640 (METEORLAKE)
[20:13:26] [PASSED] 0x56A0 (DG2)
[20:13:26] [PASSED] 0x56A1 (DG2)
[20:13:26] [PASSED] 0x56A2 (DG2)
[20:13:26] [PASSED] 0x56BE (DG2)
[20:13:26] [PASSED] 0x56BF (DG2)
[20:13:26] [PASSED] 0x5690 (DG2)
[20:13:26] [PASSED] 0x5691 (DG2)
[20:13:26] [PASSED] 0x5692 (DG2)
[20:13:26] [PASSED] 0x56A5 (DG2)
[20:13:26] [PASSED] 0x56A6 (DG2)
[20:13:26] [PASSED] 0x56B0 (DG2)
[20:13:26] [PASSED] 0x56B1 (DG2)
[20:13:26] [PASSED] 0x56BA (DG2)
[20:13:26] [PASSED] 0x56BB (DG2)
[20:13:26] [PASSED] 0x56BC (DG2)
[20:13:26] [PASSED] 0x56BD (DG2)
[20:13:26] [PASSED] 0x5693 (DG2)
[20:13:26] [PASSED] 0x5694 (DG2)
[20:13:26] [PASSED] 0x5695 (DG2)
[20:13:26] [PASSED] 0x56A3 (DG2)
[20:13:26] [PASSED] 0x56A4 (DG2)
[20:13:26] [PASSED] 0x56B2 (DG2)
[20:13:26] [PASSED] 0x56B3 (DG2)
[20:13:26] [PASSED] 0x5696 (DG2)
[20:13:26] [PASSED] 0x5697 (DG2)
[20:13:26] [PASSED] 0xB69 (PVC)
[20:13:26] [PASSED] 0xB6E (PVC)
[20:13:26] [PASSED] 0xBD4 (PVC)
[20:13:26] [PASSED] 0xBD5 (PVC)
[20:13:26] [PASSED] 0xBD6 (PVC)
[20:13:26] [PASSED] 0xBD7 (PVC)
[20:13:26] [PASSED] 0xBD8 (PVC)
[20:13:26] [PASSED] 0xBD9 (PVC)
[20:13:26] [PASSED] 0xBDA (PVC)
[20:13:26] [PASSED] 0xBDB (PVC)
[20:13:26] [PASSED] 0xBE0 (PVC)
[20:13:26] [PASSED] 0xBE1 (PVC)
[20:13:26] [PASSED] 0xBE5 (PVC)
[20:13:26] [PASSED] 0x7D40 (METEORLAKE)
[20:13:26] [PASSED] 0x7D45 (METEORLAKE)
[20:13:26] [PASSED] 0x7D55 (METEORLAKE)
[20:13:26] [PASSED] 0x7D60 (METEORLAKE)
[20:13:26] [PASSED] 0x7DD5 (METEORLAKE)
[20:13:26] [PASSED] 0x6420 (LUNARLAKE)
[20:13:26] [PASSED] 0x64A0 (LUNARLAKE)
[20:13:26] [PASSED] 0x64B0 (LUNARLAKE)
[20:13:26] [PASSED] 0xE202 (BATTLEMAGE)
[20:13:26] [PASSED] 0xE209 (BATTLEMAGE)
[20:13:26] [PASSED] 0xE20B (BATTLEMAGE)
[20:13:26] [PASSED] 0xE20C (BATTLEMAGE)
[20:13:26] [PASSED] 0xE20D (BATTLEMAGE)
[20:13:26] [PASSED] 0xE210 (BATTLEMAGE)
[20:13:26] [PASSED] 0xE211 (BATTLEMAGE)
[20:13:26] [PASSED] 0xE212 (BATTLEMAGE)
[20:13:26] [PASSED] 0xE216 (BATTLEMAGE)
[20:13:26] [PASSED] 0xE220 (BATTLEMAGE)
[20:13:26] [PASSED] 0xE221 (BATTLEMAGE)
[20:13:26] [PASSED] 0xE222 (BATTLEMAGE)
[20:13:26] [PASSED] 0xE223 (BATTLEMAGE)
[20:13:26] [PASSED] 0xB080 (PANTHERLAKE)
[20:13:26] [PASSED] 0xB081 (PANTHERLAKE)
[20:13:26] [PASSED] 0xB082 (PANTHERLAKE)
[20:13:26] [PASSED] 0xB083 (PANTHERLAKE)
[20:13:26] [PASSED] 0xB084 (PANTHERLAKE)
[20:13:26] [PASSED] 0xB085 (PANTHERLAKE)
[20:13:26] [PASSED] 0xB086 (PANTHERLAKE)
[20:13:26] [PASSED] 0xB087 (PANTHERLAKE)
[20:13:26] [PASSED] 0xB08F (PANTHERLAKE)
[20:13:26] [PASSED] 0xB090 (PANTHERLAKE)
[20:13:26] [PASSED] 0xB0A0 (PANTHERLAKE)
[20:13:26] [PASSED] 0xB0B0 (PANTHERLAKE)
[20:13:26] [PASSED] 0xFD80 (PANTHERLAKE)
[20:13:26] [PASSED] 0xFD81 (PANTHERLAKE)
[20:13:26] [PASSED] 0xD740 (NOVALAKE_S)
[20:13:26] [PASSED] 0xD741 (NOVALAKE_S)
[20:13:26] [PASSED] 0xD742 (NOVALAKE_S)
[20:13:26] [PASSED] 0xD743 (NOVALAKE_S)
[20:13:26] [PASSED] 0xD744 (NOVALAKE_S)
[20:13:26] [PASSED] 0xD745 (NOVALAKE_S)
[20:13:26] [PASSED] 0x674C (CRESCENTISLAND)
[20:13:26] [PASSED] 0xD750 (NOVALAKE_P)
[20:13:26] [PASSED] 0xD751 (NOVALAKE_P)
[20:13:26] [PASSED] 0xD752 (NOVALAKE_P)
[20:13:26] [PASSED] 0xD753 (NOVALAKE_P)
[20:13:26] [PASSED] 0xD754 (NOVALAKE_P)
[20:13:26] [PASSED] 0xD755 (NOVALAKE_P)
[20:13:26] [PASSED] 0xD756 (NOVALAKE_P)
[20:13:26] [PASSED] 0xD757 (NOVALAKE_P)
[20:13:26] [PASSED] 0xD75F (NOVALAKE_P)
[20:13:26] =============== [PASSED] check_platform_desc ===============
[20:13:26] ===================== [PASSED] xe_pci ======================
[20:13:26] =================== xe_rtp (2 subtests) ====================
[20:13:26] =============== xe_rtp_process_to_sr_tests ================
[20:13:26] [PASSED] coalesce-same-reg
[20:13:26] [PASSED] no-match-no-add
[20:13:26] [PASSED] match-or
[20:13:26] [PASSED] match-or-xfail
[20:13:27] [PASSED] no-match-no-add-multiple-rules
[20:13:27] [PASSED] two-regs-two-entries
[20:13:27] [PASSED] clr-one-set-other
[20:13:27] [PASSED] set-field
[20:13:27] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[20:13:27] [PASSED] conflict-not-disjoint
[20:13:27] [PASSED] conflict-reg-type
[20:13:27] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:13:27] ================== xe_rtp_process_tests ===================
[20:13:27] [PASSED] active1
[20:13:27] [PASSED] active2
[20:13:27] [PASSED] active-inactive
[20:13:27] [PASSED] inactive-active
[20:13:27] [PASSED] inactive-1st_or_active-inactive
[20:13:27] [PASSED] inactive-2nd_or_active-inactive
[20:13:27] [PASSED] inactive-last_or_active-inactive
[20:13:27] [PASSED] inactive-no_or_active-inactive
[20:13:27] ============== [PASSED] xe_rtp_process_tests ===============
[20:13:27] ===================== [PASSED] xe_rtp ======================
[20:13:27] ==================== xe_wa (1 subtest) =====================
[20:13:27] ======================== xe_wa_gt =========================
[20:13:27] [PASSED] TIGERLAKE B0
[20:13:27] [PASSED] DG1 A0
[20:13:27] [PASSED] DG1 B0
[20:13:27] [PASSED] ALDERLAKE_S A0
[20:13:27] [PASSED] ALDERLAKE_S B0
[20:13:27] [PASSED] ALDERLAKE_S C0
[20:13:27] [PASSED] ALDERLAKE_S D0
[20:13:27] [PASSED] ALDERLAKE_P A0
[20:13:27] [PASSED] ALDERLAKE_P B0
[20:13:27] [PASSED] ALDERLAKE_P C0
[20:13:27] [PASSED] ALDERLAKE_S RPLS D0
[20:13:27] [PASSED] ALDERLAKE_P RPLU E0
[20:13:27] [PASSED] DG2 G10 C0
[20:13:27] [PASSED] DG2 G11 B1
[20:13:27] [PASSED] DG2 G12 A1
[20:13:27] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:13:27] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:13:27] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[20:13:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[20:13:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[20:13:27] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[20:13:27] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[20:13:27] ==================== [PASSED] xe_wa_gt =====================
[20:13:27] ====================== [PASSED] xe_wa ======================
[20:13:27] ============================================================
[20:13:27] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[20:13:27] Elapsed time: 35.471s total, 4.230s configuring, 30.625s building, 0.606s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:13:27] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:13:28] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:13:53] Starting KUnit Kernel (1/1)...
[20:13:53] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:13:53] ============ drm_test_pick_cmdline (2 subtests) ============
[20:13:53] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[20:13:53] =============== drm_test_pick_cmdline_named ===============
[20:13:53] [PASSED] NTSC
[20:13:53] [PASSED] NTSC-J
[20:13:53] [PASSED] PAL
[20:13:53] [PASSED] PAL-M
[20:13:53] =========== [PASSED] drm_test_pick_cmdline_named ===========
[20:13:53] ============== [PASSED] drm_test_pick_cmdline ==============
[20:13:53] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[20:13:53] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[20:13:53] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[20:13:53] =========== drm_validate_clone_mode (2 subtests) ===========
[20:13:53] ============== drm_test_check_in_clone_mode ===============
[20:13:53] [PASSED] in_clone_mode
[20:13:53] [PASSED] not_in_clone_mode
[20:13:53] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:13:53] =============== drm_test_check_valid_clones ===============
[20:13:53] [PASSED] not_in_clone_mode
[20:13:53] [PASSED] valid_clone
[20:13:53] [PASSED] invalid_clone
[20:13:53] =========== [PASSED] drm_test_check_valid_clones ===========
[20:13:53] ============= [PASSED] drm_validate_clone_mode =============
[20:13:53] ============= drm_validate_modeset (1 subtest) =============
[20:13:53] [PASSED] drm_test_check_connector_changed_modeset
[20:13:53] ============== [PASSED] drm_validate_modeset ===============
[20:13:53] ====== drm_test_bridge_get_current_state (2 subtests) ======
[20:13:53] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[20:13:53] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[20:13:53] ======== [PASSED] drm_test_bridge_get_current_state ========
[20:13:53] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[20:13:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[20:13:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[20:13:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[20:13:53] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[20:13:53] ============== drm_bridge_alloc (2 subtests) ===============
[20:13:53] [PASSED] drm_test_drm_bridge_alloc_basic
[20:13:53] [PASSED] drm_test_drm_bridge_alloc_get_put
[20:13:53] ================ [PASSED] drm_bridge_alloc =================
[20:13:53] ============= drm_cmdline_parser (40 subtests) =============
[20:13:53] [PASSED] drm_test_cmdline_force_d_only
[20:13:53] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:13:53] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:13:53] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:13:53] [PASSED] drm_test_cmdline_force_e_only
[20:13:53] [PASSED] drm_test_cmdline_res
[20:13:53] [PASSED] drm_test_cmdline_res_vesa
[20:13:53] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:13:53] [PASSED] drm_test_cmdline_res_rblank
[20:13:53] [PASSED] drm_test_cmdline_res_bpp
[20:13:53] [PASSED] drm_test_cmdline_res_refresh
[20:13:53] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:13:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:13:53] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:13:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:13:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:13:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:13:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:13:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:13:53] [PASSED] drm_test_cmdline_res_margins_force_on
[20:13:53] [PASSED] drm_test_cmdline_res_vesa_margins
[20:13:53] [PASSED] drm_test_cmdline_name
[20:13:53] [PASSED] drm_test_cmdline_name_bpp
[20:13:53] [PASSED] drm_test_cmdline_name_option
[20:13:53] [PASSED] drm_test_cmdline_name_bpp_option
[20:13:53] [PASSED] drm_test_cmdline_rotate_0
[20:13:53] [PASSED] drm_test_cmdline_rotate_90
[20:13:53] [PASSED] drm_test_cmdline_rotate_180
[20:13:53] [PASSED] drm_test_cmdline_rotate_270
[20:13:53] [PASSED] drm_test_cmdline_hmirror
[20:13:53] [PASSED] drm_test_cmdline_vmirror
[20:13:53] [PASSED] drm_test_cmdline_margin_options
[20:13:53] [PASSED] drm_test_cmdline_multiple_options
[20:13:53] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:13:53] [PASSED] drm_test_cmdline_extra_and_option
[20:13:53] [PASSED] drm_test_cmdline_freestanding_options
[20:13:53] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:13:53] [PASSED] drm_test_cmdline_panel_orientation
[20:13:53] ================ drm_test_cmdline_invalid =================
[20:13:53] [PASSED] margin_only
[20:13:53] [PASSED] interlace_only
[20:13:53] [PASSED] res_missing_x
[20:13:53] [PASSED] res_missing_y
[20:13:53] [PASSED] res_bad_y
[20:13:53] [PASSED] res_missing_y_bpp
[20:13:53] [PASSED] res_bad_bpp
[20:13:53] [PASSED] res_bad_refresh
[20:13:53] [PASSED] res_bpp_refresh_force_on_off
[20:13:53] [PASSED] res_invalid_mode
[20:13:53] [PASSED] res_bpp_wrong_place_mode
[20:13:53] [PASSED] name_bpp_refresh
[20:13:53] [PASSED] name_refresh
[20:13:53] [PASSED] name_refresh_wrong_mode
[20:13:53] [PASSED] name_refresh_invalid_mode
[20:13:53] [PASSED] rotate_multiple
[20:13:53] [PASSED] rotate_invalid_val
[20:13:53] [PASSED] rotate_truncated
[20:13:53] [PASSED] invalid_option
[20:13:53] [PASSED] invalid_tv_option
[20:13:53] [PASSED] truncated_tv_option
[20:13:53] ============ [PASSED] drm_test_cmdline_invalid =============
[20:13:53] =============== drm_test_cmdline_tv_options ===============
[20:13:53] [PASSED] NTSC
[20:13:53] [PASSED] NTSC_443
[20:13:53] [PASSED] NTSC_J
[20:13:53] [PASSED] PAL
[20:13:53] [PASSED] PAL_M
[20:13:53] [PASSED] PAL_N
[20:13:53] [PASSED] SECAM
[20:13:53] [PASSED] MONO_525
[20:13:53] [PASSED] MONO_625
[20:13:53] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:13:53] =============== [PASSED] drm_cmdline_parser ================
[20:13:53] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:13:53] [PASSED] drm_test_connector_hdmi_init_valid
[20:13:53] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:13:53] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:13:53] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:13:53] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:13:53] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:13:53] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:13:53] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:13:53] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:13:53] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:13:53] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:13:53] [PASSED] supported_formats=0x3 yuv420_allowed=1
[20:13:53] [PASSED] supported_formats=0x3 yuv420_allowed=0
[20:13:53] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:13:53] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:13:53] [PASSED] drm_test_connector_hdmi_init_null_product
[20:13:53] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:13:53] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:13:53] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:13:53] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:13:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:13:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:13:53] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:13:53] ========= drm_test_connector_hdmi_init_type_valid =========
[20:13:53] [PASSED] HDMI-A
[20:13:53] [PASSED] HDMI-B
[20:13:53] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:13:53] ======== drm_test_connector_hdmi_init_type_invalid ========
[20:13:53] [PASSED] Unknown
[20:13:53] [PASSED] VGA
[20:13:53] [PASSED] DVI-I
[20:13:53] [PASSED] DVI-D
[20:13:53] [PASSED] DVI-A
[20:13:53] [PASSED] Composite
[20:13:53] [PASSED] SVIDEO
[20:13:53] [PASSED] LVDS
[20:13:53] [PASSED] Component
[20:13:53] [PASSED] DIN
[20:13:53] [PASSED] DP
[20:13:53] [PASSED] TV
[20:13:53] [PASSED] eDP
[20:13:53] [PASSED] Virtual
[20:13:53] [PASSED] DSI
[20:13:53] [PASSED] DPI
[20:13:53] [PASSED] Writeback
[20:13:53] [PASSED] SPI
[20:13:53] [PASSED] USB
[20:13:53] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:13:53] ============ [PASSED] drmm_connector_hdmi_init =============
[20:13:53] ============= drmm_connector_init (3 subtests) =============
[20:13:53] [PASSED] drm_test_drmm_connector_init
[20:13:53] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:13:53] ========= drm_test_drmm_connector_init_type_valid =========
[20:13:53] [PASSED] Unknown
[20:13:53] [PASSED] VGA
[20:13:53] [PASSED] DVI-I
[20:13:53] [PASSED] DVI-D
[20:13:53] [PASSED] DVI-A
[20:13:53] [PASSED] Composite
[20:13:53] [PASSED] SVIDEO
[20:13:53] [PASSED] LVDS
[20:13:53] [PASSED] Component
[20:13:53] [PASSED] DIN
[20:13:53] [PASSED] DP
[20:13:53] [PASSED] HDMI-A
[20:13:53] [PASSED] HDMI-B
[20:13:53] [PASSED] TV
[20:13:53] [PASSED] eDP
[20:13:53] [PASSED] Virtual
[20:13:53] [PASSED] DSI
[20:13:53] [PASSED] DPI
[20:13:53] [PASSED] Writeback
[20:13:53] [PASSED] SPI
[20:13:53] [PASSED] USB
[20:13:53] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:13:53] =============== [PASSED] drmm_connector_init ===============
[20:13:53] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_init
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:13:53] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[20:13:53] [PASSED] Unknown
[20:13:53] [PASSED] VGA
[20:13:53] [PASSED] DVI-I
[20:13:53] [PASSED] DVI-D
[20:13:53] [PASSED] DVI-A
[20:13:53] [PASSED] Composite
[20:13:53] [PASSED] SVIDEO
[20:13:53] [PASSED] LVDS
[20:13:53] [PASSED] Component
[20:13:53] [PASSED] DIN
[20:13:53] [PASSED] DP
[20:13:53] [PASSED] HDMI-A
[20:13:53] [PASSED] HDMI-B
[20:13:53] [PASSED] TV
[20:13:53] [PASSED] eDP
[20:13:53] [PASSED] Virtual
[20:13:53] [PASSED] DSI
[20:13:53] [PASSED] DPI
[20:13:53] [PASSED] Writeback
[20:13:53] [PASSED] SPI
[20:13:53] [PASSED] USB
[20:13:53] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:13:53] ======== drm_test_drm_connector_dynamic_init_name =========
[20:13:53] [PASSED] Unknown
[20:13:53] [PASSED] VGA
[20:13:53] [PASSED] DVI-I
[20:13:53] [PASSED] DVI-D
[20:13:53] [PASSED] DVI-A
[20:13:53] [PASSED] Composite
[20:13:53] [PASSED] SVIDEO
[20:13:53] [PASSED] LVDS
[20:13:53] [PASSED] Component
[20:13:53] [PASSED] DIN
[20:13:53] [PASSED] DP
[20:13:53] [PASSED] HDMI-A
[20:13:53] [PASSED] HDMI-B
[20:13:53] [PASSED] TV
[20:13:53] [PASSED] eDP
[20:13:53] [PASSED] Virtual
[20:13:53] [PASSED] DSI
[20:13:53] [PASSED] DPI
[20:13:53] [PASSED] Writeback
[20:13:53] [PASSED] SPI
[20:13:53] [PASSED] USB
[20:13:53] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:13:53] =========== [PASSED] drm_connector_dynamic_init ============
[20:13:53] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:13:53] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:13:53] ======= drm_connector_dynamic_register (7 subtests) ========
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:13:53] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:13:53] ========= [PASSED] drm_connector_dynamic_register ==========
[20:13:53] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:13:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:13:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:13:53] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:13:53] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:13:53] ========== drm_test_get_tv_mode_from_name_valid ===========
[20:13:53] [PASSED] NTSC
[20:13:53] [PASSED] NTSC-443
[20:13:53] [PASSED] NTSC-J
[20:13:53] [PASSED] PAL
[20:13:53] [PASSED] PAL-M
[20:13:53] [PASSED] PAL-N
[20:13:53] [PASSED] SECAM
[20:13:53] [PASSED] Mono
[20:13:53] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:13:53] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:13:53] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:13:53] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:13:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:13:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:13:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:13:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:13:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:13:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:13:53] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[20:13:53] [PASSED] VIC 96
[20:13:53] [PASSED] VIC 97
[20:13:53] [PASSED] VIC 101
[20:13:53] [PASSED] VIC 102
[20:13:53] [PASSED] VIC 106
[20:13:53] [PASSED] VIC 107
[20:13:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:13:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:13:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:13:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:13:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:13:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:13:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:13:53] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:13:53] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[20:13:53] [PASSED] Automatic
[20:13:53] [PASSED] Full
[20:13:53] [PASSED] Limited 16:235
[20:13:53] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:13:53] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:13:53] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:13:53] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:13:53] === drm_test_drm_hdmi_connector_get_output_format_name ====
[20:13:53] [PASSED] RGB
[20:13:53] [PASSED] YUV 4:2:0
[20:13:53] [PASSED] YUV 4:2:2
[20:13:53] [PASSED] YUV 4:4:4
[20:13:53] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:13:53] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:13:53] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:13:53] ============= drm_damage_helper (21 subtests) ==============
[20:13:53] [PASSED] drm_test_damage_iter_no_damage
[20:13:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:13:53] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:13:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:13:53] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:13:53] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:13:53] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:13:53] [PASSED] drm_test_damage_iter_simple_damage
[20:13:53] [PASSED] drm_test_damage_iter_single_damage
[20:13:53] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:13:53] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:13:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:13:53] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:13:53] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:13:53] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:13:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:13:53] [PASSED] drm_test_damage_iter_damage
[20:13:53] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:13:53] [PASSED] drm_test_damage_iter_damage_one_outside
[20:13:53] [PASSED] drm_test_damage_iter_damage_src_moved
[20:13:53] [PASSED] drm_test_damage_iter_damage_not_visible
[20:13:53] ================ [PASSED] drm_damage_helper ================
[20:13:53] ============== drm_dp_mst_helper (3 subtests) ==============
[20:13:53] ============== drm_test_dp_mst_calc_pbn_mode ==============
[20:13:53] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:13:53] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:13:53] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:13:53] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:13:53] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:13:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:13:53] ============== drm_test_dp_mst_calc_pbn_div ===============
[20:13:53] [PASSED] Link rate 2000000 lane count 4
[20:13:53] [PASSED] Link rate 2000000 lane count 2
[20:13:53] [PASSED] Link rate 2000000 lane count 1
[20:13:53] [PASSED] Link rate 1350000 lane count 4
[20:13:53] [PASSED] Link rate 1350000 lane count 2
[20:13:53] [PASSED] Link rate 1350000 lane count 1
[20:13:53] [PASSED] Link rate 1000000 lane count 4
[20:13:53] [PASSED] Link rate 1000000 lane count 2
[20:13:53] [PASSED] Link rate 1000000 lane count 1
[20:13:53] [PASSED] Link rate 810000 lane count 4
[20:13:53] [PASSED] Link rate 810000 lane count 2
[20:13:53] [PASSED] Link rate 810000 lane count 1
[20:13:53] [PASSED] Link rate 540000 lane count 4
[20:13:53] [PASSED] Link rate 540000 lane count 2
[20:13:53] [PASSED] Link rate 540000 lane count 1
[20:13:53] [PASSED] Link rate 270000 lane count 4
[20:13:53] [PASSED] Link rate 270000 lane count 2
[20:13:53] [PASSED] Link rate 270000 lane count 1
[20:13:53] [PASSED] Link rate 162000 lane count 4
[20:13:53] [PASSED] Link rate 162000 lane count 2
[20:13:53] [PASSED] Link rate 162000 lane count 1
[20:13:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:13:53] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[20:13:53] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:13:53] [PASSED] DP_POWER_UP_PHY with port number
[20:13:53] [PASSED] DP_POWER_DOWN_PHY with port number
[20:13:53] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:13:53] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:13:53] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:13:53] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:13:53] [PASSED] DP_QUERY_PAYLOAD with port number
[20:13:53] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:13:53] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:13:53] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:13:53] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:13:53] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:13:53] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:13:53] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:13:53] [PASSED] DP_REMOTE_I2C_READ with port number
[20:13:53] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:13:53] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:13:53] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:13:53] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:13:53] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:13:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:13:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:13:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:13:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:13:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:13:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:13:53] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:13:53] ================ [PASSED] drm_dp_mst_helper ================
[20:13:53] ================== drm_exec (7 subtests) ===================
[20:13:53] [PASSED] sanitycheck
[20:13:53] [PASSED] test_lock
[20:13:53] [PASSED] test_lock_unlock
[20:13:53] [PASSED] test_duplicates
[20:13:53] [PASSED] test_prepare
[20:13:53] [PASSED] test_prepare_array
[20:13:53] [PASSED] test_multiple_loops
[20:13:53] ==================== [PASSED] drm_exec =====================
[20:13:53] =========== drm_format_helper_test (17 subtests) ===========
[20:13:53] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:13:53] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:13:53] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:13:53] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:13:53] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:13:53] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:13:53] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:13:53] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[20:13:53] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:13:53] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:13:53] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:13:53] ============== drm_test_fb_xrgb8888_to_mono ===============
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:13:53] ==================== drm_test_fb_swab =====================
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ================ [PASSED] drm_test_fb_swab =================
[20:13:53] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:13:53] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[20:13:53] [PASSED] single_pixel_source_buffer
[20:13:53] [PASSED] single_pixel_clip_rectangle
[20:13:53] [PASSED] well_known_colors
[20:13:53] [PASSED] destination_pitch
[20:13:53] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:13:53] ================= drm_test_fb_clip_offset =================
[20:13:53] [PASSED] pass through
[20:13:53] [PASSED] horizontal offset
[20:13:53] [PASSED] vertical offset
[20:13:53] [PASSED] horizontal and vertical offset
[20:13:53] [PASSED] horizontal offset (custom pitch)
[20:13:53] [PASSED] vertical offset (custom pitch)
[20:13:53] [PASSED] horizontal and vertical offset (custom pitch)
[20:13:53] ============= [PASSED] drm_test_fb_clip_offset =============
[20:13:53] =================== drm_test_fb_memcpy ====================
[20:13:53] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:13:53] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:13:53] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:13:53] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:13:53] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:13:53] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:13:53] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:13:53] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:13:53] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:13:53] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:13:53] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:13:53] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:13:53] =============== [PASSED] drm_test_fb_memcpy ================
[20:13:53] ============= [PASSED] drm_format_helper_test ==============
[20:13:53] ================= drm_format (18 subtests) =================
[20:13:53] [PASSED] drm_test_format_block_width_invalid
[20:13:53] [PASSED] drm_test_format_block_width_one_plane
[20:13:53] [PASSED] drm_test_format_block_width_two_plane
[20:13:53] [PASSED] drm_test_format_block_width_three_plane
[20:13:53] [PASSED] drm_test_format_block_width_tiled
[20:13:53] [PASSED] drm_test_format_block_height_invalid
[20:13:53] [PASSED] drm_test_format_block_height_one_plane
[20:13:53] [PASSED] drm_test_format_block_height_two_plane
[20:13:53] [PASSED] drm_test_format_block_height_three_plane
[20:13:53] [PASSED] drm_test_format_block_height_tiled
[20:13:53] [PASSED] drm_test_format_min_pitch_invalid
[20:13:53] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:13:53] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:13:53] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:13:53] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:13:53] [PASSED] drm_test_format_min_pitch_two_plane
[20:13:53] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:13:53] [PASSED] drm_test_format_min_pitch_tiled
[20:13:53] =================== [PASSED] drm_format ====================
[20:13:53] ============== drm_framebuffer (10 subtests) ===============
[20:13:53] ========== drm_test_framebuffer_check_src_coords ==========
[20:13:53] [PASSED] Success: source fits into fb
[20:13:53] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:13:53] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:13:53] [PASSED] Fail: overflowing fb with source width
[20:13:53] [PASSED] Fail: overflowing fb with source height
[20:13:53] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:13:53] [PASSED] drm_test_framebuffer_cleanup
[20:13:53] =============== drm_test_framebuffer_create ===============
[20:13:53] [PASSED] ABGR8888 normal sizes
[20:13:53] [PASSED] ABGR8888 max sizes
[20:13:53] [PASSED] ABGR8888 pitch greater than min required
[20:13:53] [PASSED] ABGR8888 pitch less than min required
[20:13:53] [PASSED] ABGR8888 Invalid width
[20:13:53] [PASSED] ABGR8888 Invalid buffer handle
[20:13:53] [PASSED] No pixel format
[20:13:53] [PASSED] ABGR8888 Width 0
[20:13:53] [PASSED] ABGR8888 Height 0
[20:13:53] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:13:53] [PASSED] ABGR8888 Large buffer offset
[20:13:53] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:13:53] [PASSED] ABGR8888 Invalid flag
[20:13:53] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:13:53] [PASSED] ABGR8888 Valid buffer modifier
[20:13:53] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:13:53] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:13:53] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:13:53] [PASSED] NV12 Normal sizes
[20:13:53] [PASSED] NV12 Max sizes
[20:13:53] [PASSED] NV12 Invalid pitch
[20:13:53] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:13:53] [PASSED] NV12 different modifier per-plane
[20:13:53] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:13:53] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:13:53] [PASSED] NV12 Modifier for inexistent plane
[20:13:53] [PASSED] NV12 Handle for inexistent plane
[20:13:53] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:13:53] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:13:53] [PASSED] YVU420 Normal sizes
[20:13:53] [PASSED] YVU420 Max sizes
[20:13:53] [PASSED] YVU420 Invalid pitch
[20:13:53] [PASSED] YVU420 Different pitches
[20:13:53] [PASSED] YVU420 Different buffer offsets/pitches
[20:13:53] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:13:53] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:13:53] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:13:53] [PASSED] YVU420 Valid modifier
[20:13:53] [PASSED] YVU420 Different modifiers per plane
[20:13:53] [PASSED] YVU420 Modifier for inexistent plane
[20:13:53] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:13:53] [PASSED] X0L2 Normal sizes
[20:13:53] [PASSED] X0L2 Max sizes
[20:13:53] [PASSED] X0L2 Invalid pitch
[20:13:53] [PASSED] X0L2 Pitch greater than minimum required
[20:13:53] [PASSED] X0L2 Handle for inexistent plane
[20:13:53] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:13:53] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:13:53] [PASSED] X0L2 Valid modifier
[20:13:53] [PASSED] X0L2 Modifier for inexistent plane
[20:13:53] =========== [PASSED] drm_test_framebuffer_create ===========
[20:13:53] [PASSED] drm_test_framebuffer_free
[20:13:53] [PASSED] drm_test_framebuffer_init
[20:13:53] [PASSED] drm_test_framebuffer_init_bad_format
[20:13:53] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:13:53] [PASSED] drm_test_framebuffer_lookup
[20:13:53] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:13:53] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:13:53] ================= [PASSED] drm_framebuffer =================
[20:13:53] ================ drm_gem_shmem (8 subtests) ================
[20:13:53] [PASSED] drm_gem_shmem_test_obj_create
[20:13:53] [PASSED] drm_gem_shmem_test_obj_create_private
[20:13:53] [PASSED] drm_gem_shmem_test_pin_pages
[20:13:53] [PASSED] drm_gem_shmem_test_vmap
[20:13:53] [PASSED] drm_gem_shmem_test_get_sg_table
[20:13:53] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:13:53] [PASSED] drm_gem_shmem_test_madvise
[20:13:53] [PASSED] drm_gem_shmem_test_purge
[20:13:53] ================== [PASSED] drm_gem_shmem ==================
[20:13:53] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[20:13:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:13:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:13:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:13:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:13:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:13:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:13:53] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[20:13:53] [PASSED] Automatic
[20:13:53] [PASSED] Full
[20:13:53] [PASSED] Limited 16:235
[20:13:53] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[20:13:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:13:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:13:53] [PASSED] drm_test_check_disable_connector
[20:13:53] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:13:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[20:13:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[20:13:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[20:13:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[20:13:53] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[20:13:53] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:13:53] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:13:53] [PASSED] drm_test_check_output_bpc_dvi
[20:13:53] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:13:53] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:13:53] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:13:53] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:13:53] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:13:53] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:13:53] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:13:53] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:13:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:13:53] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:13:53] [PASSED] drm_test_check_broadcast_rgb_value
[20:13:53] [PASSED] drm_test_check_bpc_8_value
[20:13:53] [PASSED] drm_test_check_bpc_10_value
[20:13:53] [PASSED] drm_test_check_bpc_12_value
[20:13:53] [PASSED] drm_test_check_format_value
[20:13:53] [PASSED] drm_test_check_tmds_char_value
[20:13:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:13:53] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[20:13:53] [PASSED] drm_test_check_mode_valid
[20:13:53] [PASSED] drm_test_check_mode_valid_reject
[20:13:53] [PASSED] drm_test_check_mode_valid_reject_rate
[20:13:53] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:13:53] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:13:53] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[20:13:53] [PASSED] drm_test_check_infoframes
[20:13:53] [PASSED] drm_test_check_reject_avi_infoframe
[20:13:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[20:13:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[20:13:53] [PASSED] drm_test_check_reject_audio_infoframe
[20:13:53] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[20:13:53] ================= drm_managed (2 subtests) =================
[20:13:53] [PASSED] drm_test_managed_release_action
[20:13:53] [PASSED] drm_test_managed_run_action
[20:13:53] =================== [PASSED] drm_managed ===================
[20:13:53] =================== drm_mm (6 subtests) ====================
[20:13:53] [PASSED] drm_test_mm_init
[20:13:53] [PASSED] drm_test_mm_debug
[20:13:53] [PASSED] drm_test_mm_align32
[20:13:53] [PASSED] drm_test_mm_align64
[20:13:53] [PASSED] drm_test_mm_lowest
[20:13:53] [PASSED] drm_test_mm_highest
[20:13:53] ===================== [PASSED] drm_mm ======================
[20:13:53] ============= drm_modes_analog_tv (5 subtests) =============
[20:13:53] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:13:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:13:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:13:53] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:13:53] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:13:53] =============== [PASSED] drm_modes_analog_tv ===============
[20:13:53] ============== drm_plane_helper (2 subtests) ===============
[20:13:53] =============== drm_test_check_plane_state ================
[20:13:53] [PASSED] clipping_simple
[20:13:53] [PASSED] clipping_rotate_reflect
[20:13:53] [PASSED] positioning_simple
[20:13:53] [PASSED] upscaling
[20:13:53] [PASSED] downscaling
[20:13:53] [PASSED] rounding1
[20:13:53] [PASSED] rounding2
[20:13:53] [PASSED] rounding3
[20:13:53] [PASSED] rounding4
[20:13:53] =========== [PASSED] drm_test_check_plane_state ============
[20:13:53] =========== drm_test_check_invalid_plane_state ============
[20:13:53] [PASSED] positioning_invalid
[20:13:53] [PASSED] upscaling_invalid
[20:13:53] [PASSED] downscaling_invalid
[20:13:53] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:13:53] ================ [PASSED] drm_plane_helper =================
[20:13:53] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:13:53] ====== drm_test_connector_helper_tv_get_modes_check =======
[20:13:53] [PASSED] None
[20:13:53] [PASSED] PAL
[20:13:53] [PASSED] NTSC
[20:13:53] [PASSED] Both, NTSC Default
[20:13:53] [PASSED] Both, PAL Default
[20:13:53] [PASSED] Both, NTSC Default, with PAL on command-line
[20:13:53] [PASSED] Both, PAL Default, with NTSC on command-line
[20:13:53] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:13:53] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:13:53] ================== drm_rect (9 subtests) ===================
[20:13:53] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:13:53] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:13:53] [PASSED] drm_test_rect_clip_scaled_clipped
[20:13:53] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:13:53] ================= drm_test_rect_intersect =================
[20:13:53] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:13:53] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:13:53] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:13:53] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:13:53] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:13:53] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:13:53] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:13:53] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:13:53] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:13:53] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:13:53] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:13:53] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:13:53] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:13:53] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:13:53] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:13:53] ============= [PASSED] drm_test_rect_intersect =============
[20:13:53] ================ drm_test_rect_calc_hscale ================
[20:13:53] [PASSED] normal use
[20:13:53] [PASSED] out of max range
[20:13:53] [PASSED] out of min range
[20:13:53] [PASSED] zero dst
[20:13:53] [PASSED] negative src
[20:13:53] [PASSED] negative dst
[20:13:53] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:13:53] ================ drm_test_rect_calc_vscale ================
[20:13:53] [PASSED] normal use
[20:13:53] [PASSED] out of max range
[20:13:53] [PASSED] out of min range
[20:13:53] [PASSED] zero dst
[20:13:53] [PASSED] negative src
[20:13:53] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[20:13:53] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:13:53] ================== drm_test_rect_rotate ===================
[20:13:53] [PASSED] reflect-x
[20:13:53] [PASSED] reflect-y
[20:13:53] [PASSED] rotate-0
[20:13:53] [PASSED] rotate-90
[20:13:53] [PASSED] rotate-180
[20:13:53] [PASSED] rotate-270
[20:13:53] ============== [PASSED] drm_test_rect_rotate ===============
[20:13:53] ================ drm_test_rect_rotate_inv =================
[20:13:53] [PASSED] reflect-x
[20:13:53] [PASSED] reflect-y
[20:13:53] [PASSED] rotate-0
[20:13:53] [PASSED] rotate-90
[20:13:53] [PASSED] rotate-180
[20:13:53] [PASSED] rotate-270
[20:13:53] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:13:53] ==================== [PASSED] drm_rect =====================
[20:13:53] ============ drm_sysfb_modeset_test (1 subtest) ============
[20:13:53] ============ drm_test_sysfb_build_fourcc_list =============
[20:13:53] [PASSED] no native formats
[20:13:53] [PASSED] XRGB8888 as native format
[20:13:53] [PASSED] remove duplicates
[20:13:53] [PASSED] convert alpha formats
[20:13:53] [PASSED] random formats
[20:13:53] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[20:13:53] ============= [PASSED] drm_sysfb_modeset_test ==============
[20:13:53] ================== drm_fixp (2 subtests) ===================
[20:13:53] [PASSED] drm_test_int2fixp
[20:13:53] [PASSED] drm_test_sm2fixp
[20:13:53] ==================== [PASSED] drm_fixp =====================
[20:13:53] ============================================================
[20:13:53] Testing complete. Ran 621 tests: passed: 621
[20:13:53] Elapsed time: 26.253s total, 1.718s configuring, 24.369s building, 0.131s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[20:13:53] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:13:55] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:14:04] Starting KUnit Kernel (1/1)...
[20:14:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:14:04] ================= ttm_device (5 subtests) ==================
[20:14:04] [PASSED] ttm_device_init_basic
[20:14:04] [PASSED] ttm_device_init_multiple
[20:14:04] [PASSED] ttm_device_fini_basic
[20:14:04] [PASSED] ttm_device_init_no_vma_man
[20:14:04] ================== ttm_device_init_pools ==================
[20:14:04] [PASSED] No DMA allocations, no DMA32 required
[20:14:04] [PASSED] DMA allocations, DMA32 required
[20:14:04] [PASSED] No DMA allocations, DMA32 required
[20:14:04] [PASSED] DMA allocations, no DMA32 required
[20:14:04] ============== [PASSED] ttm_device_init_pools ==============
[20:14:04] =================== [PASSED] ttm_device ====================
[20:14:04] ================== ttm_pool (8 subtests) ===================
[20:14:04] ================== ttm_pool_alloc_basic ===================
[20:14:04] [PASSED] One page
[20:14:04] [PASSED] More than one page
[20:14:04] [PASSED] Above the allocation limit
[20:14:04] [PASSED] One page, with coherent DMA mappings enabled
[20:14:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:14:04] ============== [PASSED] ttm_pool_alloc_basic ===============
[20:14:04] ============== ttm_pool_alloc_basic_dma_addr ==============
[20:14:04] [PASSED] One page
[20:14:04] [PASSED] More than one page
[20:14:04] [PASSED] Above the allocation limit
[20:14:04] [PASSED] One page, with coherent DMA mappings enabled
[20:14:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:14:04] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[20:14:04] [PASSED] ttm_pool_alloc_order_caching_match
[20:14:04] [PASSED] ttm_pool_alloc_caching_mismatch
[20:14:04] [PASSED] ttm_pool_alloc_order_mismatch
[20:14:04] [PASSED] ttm_pool_free_dma_alloc
[20:14:04] [PASSED] ttm_pool_free_no_dma_alloc
[20:14:04] [PASSED] ttm_pool_fini_basic
[20:14:04] ==================== [PASSED] ttm_pool =====================
[20:14:04] ================ ttm_resource (8 subtests) =================
[20:14:04] ================= ttm_resource_init_basic =================
[20:14:04] [PASSED] Init resource in TTM_PL_SYSTEM
[20:14:04] [PASSED] Init resource in TTM_PL_VRAM
[20:14:04] [PASSED] Init resource in a private placement
[20:14:04] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[20:14:04] ============= [PASSED] ttm_resource_init_basic =============
[20:14:04] [PASSED] ttm_resource_init_pinned
[20:14:04] [PASSED] ttm_resource_fini_basic
[20:14:04] [PASSED] ttm_resource_manager_init_basic
[20:14:04] [PASSED] ttm_resource_manager_usage_basic
[20:14:04] [PASSED] ttm_resource_manager_set_used_basic
[20:14:04] [PASSED] ttm_sys_man_alloc_basic
[20:14:04] [PASSED] ttm_sys_man_free_basic
[20:14:04] ================== [PASSED] ttm_resource ===================
[20:14:04] =================== ttm_tt (15 subtests) ===================
[20:14:04] ==================== ttm_tt_init_basic ====================
[20:14:04] [PASSED] Page-aligned size
[20:14:04] [PASSED] Extra pages requested
[20:14:04] ================ [PASSED] ttm_tt_init_basic ================
[20:14:04] [PASSED] ttm_tt_init_misaligned
[20:14:04] [PASSED] ttm_tt_fini_basic
[20:14:04] [PASSED] ttm_tt_fini_sg
[20:14:04] [PASSED] ttm_tt_fini_shmem
[20:14:04] [PASSED] ttm_tt_create_basic
[20:14:04] [PASSED] ttm_tt_create_invalid_bo_type
[20:14:04] [PASSED] ttm_tt_create_ttm_exists
[20:14:04] [PASSED] ttm_tt_create_failed
[20:14:04] [PASSED] ttm_tt_destroy_basic
[20:14:04] [PASSED] ttm_tt_populate_null_ttm
[20:14:04] [PASSED] ttm_tt_populate_populated_ttm
[20:14:04] [PASSED] ttm_tt_unpopulate_basic
[20:14:04] [PASSED] ttm_tt_unpopulate_empty_ttm
[20:14:04] [PASSED] ttm_tt_swapin_basic
[20:14:04] ===================== [PASSED] ttm_tt ======================
[20:14:04] =================== ttm_bo (14 subtests) ===================
[20:14:04] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[20:14:04] [PASSED] Cannot be interrupted and sleeps
[20:14:04] [PASSED] Cannot be interrupted, locks straight away
[20:14:04] [PASSED] Can be interrupted, sleeps
[20:14:04] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[20:14:04] [PASSED] ttm_bo_reserve_locked_no_sleep
[20:14:04] [PASSED] ttm_bo_reserve_no_wait_ticket
[20:14:04] [PASSED] ttm_bo_reserve_double_resv
[20:14:04] [PASSED] ttm_bo_reserve_interrupted
[20:14:04] [PASSED] ttm_bo_reserve_deadlock
[20:14:04] [PASSED] ttm_bo_unreserve_basic
[20:14:04] [PASSED] ttm_bo_unreserve_pinned
[20:14:04] [PASSED] ttm_bo_unreserve_bulk
[20:14:04] [PASSED] ttm_bo_fini_basic
[20:14:04] [PASSED] ttm_bo_fini_shared_resv
[20:14:04] [PASSED] ttm_bo_pin_basic
[20:14:04] [PASSED] ttm_bo_pin_unpin_resource
[20:14:04] [PASSED] ttm_bo_multiple_pin_one_unpin
[20:14:04] ===================== [PASSED] ttm_bo ======================
[20:14:04] ============== ttm_bo_validate (21 subtests) ===============
[20:14:04] ============== ttm_bo_init_reserved_sys_man ===============
[20:14:04] [PASSED] Buffer object for userspace
[20:14:04] [PASSED] Kernel buffer object
[20:14:04] [PASSED] Shared buffer object
[20:14:04] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[20:14:04] ============== ttm_bo_init_reserved_mock_man ==============
[20:14:04] [PASSED] Buffer object for userspace
[20:14:04] [PASSED] Kernel buffer object
[20:14:04] [PASSED] Shared buffer object
[20:14:04] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[20:14:04] [PASSED] ttm_bo_init_reserved_resv
[20:14:04] ================== ttm_bo_validate_basic ==================
[20:14:04] [PASSED] Buffer object for userspace
[20:14:04] [PASSED] Kernel buffer object
[20:14:04] [PASSED] Shared buffer object
[20:14:04] ============== [PASSED] ttm_bo_validate_basic ==============
[20:14:04] [PASSED] ttm_bo_validate_invalid_placement
[20:14:04] ============= ttm_bo_validate_same_placement ==============
[20:14:04] [PASSED] System manager
[20:14:04] [PASSED] VRAM manager
[20:14:04] ========= [PASSED] ttm_bo_validate_same_placement ==========
[20:14:04] [PASSED] ttm_bo_validate_failed_alloc
[20:14:04] [PASSED] ttm_bo_validate_pinned
[20:14:04] [PASSED] ttm_bo_validate_busy_placement
[20:14:04] ================ ttm_bo_validate_multihop =================
[20:14:04] [PASSED] Buffer object for userspace
[20:14:04] [PASSED] Kernel buffer object
[20:14:04] [PASSED] Shared buffer object
[20:14:04] ============ [PASSED] ttm_bo_validate_multihop =============
[20:14:04] ========== ttm_bo_validate_no_placement_signaled ==========
[20:14:04] [PASSED] Buffer object in system domain, no page vector
[20:14:04] [PASSED] Buffer object in system domain with an existing page vector
[20:14:04] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[20:14:04] ======== ttm_bo_validate_no_placement_not_signaled ========
[20:14:04] [PASSED] Buffer object for userspace
[20:14:04] [PASSED] Kernel buffer object
[20:14:04] [PASSED] Shared buffer object
[20:14:04] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[20:14:04] [PASSED] ttm_bo_validate_move_fence_signaled
[20:14:04] ========= ttm_bo_validate_move_fence_not_signaled =========
[20:14:04] [PASSED] Waits for GPU
[20:14:04] [PASSED] Tries to lock straight away
[20:14:04] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[20:14:04] [PASSED] ttm_bo_validate_happy_evict
[20:14:04] [PASSED] ttm_bo_validate_all_pinned_evict
[20:14:04] [PASSED] ttm_bo_validate_allowed_only_evict
[20:14:04] [PASSED] ttm_bo_validate_deleted_evict
[20:14:04] [PASSED] ttm_bo_validate_busy_domain_evict
[20:14:04] [PASSED] ttm_bo_validate_evict_gutting
[20:14:04] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[20:14:04] ================= [PASSED] ttm_bo_validate =================
[20:14:04] ============================================================
[20:14:04] Testing complete. Ran 101 tests: passed: 101
[20:14:04] Elapsed time: 11.360s total, 1.744s configuring, 9.399s building, 0.180s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 18+ messages in thread* ✗ Xe.CI.BAT: failure for Extra enabling patches for NVL-P (rev3)
2026-03-09 20:07 [PATCH v3 0/8] Extra enabling patches for NVL-P Gustavo Sousa
` (8 preceding siblings ...)
2026-03-09 20:14 ` ✓ CI.KUnit: success for Extra enabling patches for NVL-P (rev3) Patchwork
@ 2026-03-09 21:02 ` Patchwork
2026-03-09 22:03 ` Gustavo Sousa
9 siblings, 1 reply; 18+ messages in thread
From: Patchwork @ 2026-03-09 21:02 UTC (permalink / raw)
To: Gustavo Sousa; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 4340 bytes --]
== Series Details ==
Series: Extra enabling patches for NVL-P (rev3)
URL : https://patchwork.freedesktop.org/series/162666/
State : failure
== Summary ==
CI Bug Log - changes from xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c_BAT -> xe-pw-162666v3_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-162666v3_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-162666v3_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (14 -> 12)
------------------------------
Missing (2): bat-adlp-vm bat-ptl-vm
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-162666v3_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_module_load@load:
- bat-ptl-2: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-ptl-2/igt@xe_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-ptl-2/igt@xe_module_load@load.html
- bat-dg2-oem2: [PASS][3] -> [ABORT][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-dg2-oem2/igt@xe_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-dg2-oem2/igt@xe_module_load@load.html
- bat-atsm-2: [PASS][5] -> [ABORT][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-atsm-2/igt@xe_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-atsm-2/igt@xe_module_load@load.html
- bat-wcl-1: [PASS][7] -> [ABORT][8]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-wcl-1/igt@xe_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-wcl-1/igt@xe_module_load@load.html
- bat-ptl-1: [PASS][9] -> [ABORT][10]
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-ptl-1/igt@xe_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-ptl-1/igt@xe_module_load@load.html
- bat-wcl-2: [PASS][11] -> [ABORT][12]
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-wcl-2/igt@xe_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-wcl-2/igt@xe_module_load@load.html
- bat-bmg-2: [PASS][13] -> [ABORT][14]
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-bmg-2/igt@xe_module_load@load.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-bmg-2/igt@xe_module_load@load.html
- bat-bmg-3: [PASS][15] -> [ABORT][16]
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-bmg-3/igt@xe_module_load@load.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-bmg-3/igt@xe_module_load@load.html
- bat-bmg-1: [PASS][17] -> [ABORT][18]
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-bmg-1/igt@xe_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-bmg-1/igt@xe_module_load@load.html
- bat-adlp-7: [PASS][19] -> [ABORT][20]
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-adlp-7/igt@xe_module_load@load.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-adlp-7/igt@xe_module_load@load.html
Build changes
-------------
* Linux: xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c -> xe-pw-162666v3
IGT_8787: 8787
xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c: 50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c
xe-pw-162666v3: 162666v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/index.html
[-- Attachment #2: Type: text/html, Size: 4975 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: ✗ Xe.CI.BAT: failure for Extra enabling patches for NVL-P (rev3)
2026-03-09 21:02 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-03-09 22:03 ` Gustavo Sousa
2026-03-09 22:08 ` Matt Roper
0 siblings, 1 reply; 18+ messages in thread
From: Gustavo Sousa @ 2026-03-09 22:03 UTC (permalink / raw)
To: intel-xe; +Cc: Matt Roper, Michal Wajdeczko
Patchwork <patchwork@emeril.freedesktop.org> writes:
> == Series Details ==
>
> Series: Extra enabling patches for NVL-P (rev3)
> URL : https://patchwork.freedesktop.org/series/162666/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c_BAT -> xe-pw-162666v3_BAT
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with xe-pw-162666v3_BAT absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in xe-pw-162666v3_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Participating hosts (14 -> 12)
> ------------------------------
>
> Missing (2): bat-adlp-vm bat-ptl-vm
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in xe-pw-162666v3_BAT:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * igt@xe_module_load@load:
> - bat-ptl-2: [PASS][1] -> [ABORT][2]
> [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-ptl-2/igt@xe_module_load@load.html
> [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-ptl-2/igt@xe_module_load@load.html
> - bat-dg2-oem2: [PASS][3] -> [ABORT][4]
> [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-dg2-oem2/igt@xe_module_load@load.html
> [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-dg2-oem2/igt@xe_module_load@load.html
> - bat-atsm-2: [PASS][5] -> [ABORT][6]
> [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-atsm-2/igt@xe_module_load@load.html
> [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-atsm-2/igt@xe_module_load@load.html
> - bat-wcl-1: [PASS][7] -> [ABORT][8]
> [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-wcl-1/igt@xe_module_load@load.html
> [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-wcl-1/igt@xe_module_load@load.html
> - bat-ptl-1: [PASS][9] -> [ABORT][10]
> [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-ptl-1/igt@xe_module_load@load.html
> [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-ptl-1/igt@xe_module_load@load.html
> - bat-wcl-2: [PASS][11] -> [ABORT][12]
> [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-wcl-2/igt@xe_module_load@load.html
> [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-wcl-2/igt@xe_module_load@load.html
> - bat-bmg-2: [PASS][13] -> [ABORT][14]
> [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-bmg-2/igt@xe_module_load@load.html
> [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-bmg-2/igt@xe_module_load@load.html
> - bat-bmg-3: [PASS][15] -> [ABORT][16]
> [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-bmg-3/igt@xe_module_load@load.html
> [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-bmg-3/igt@xe_module_load@load.html
> - bat-bmg-1: [PASS][17] -> [ABORT][18]
> [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-bmg-1/igt@xe_module_load@load.html
> [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-bmg-1/igt@xe_module_load@load.html
> - bat-adlp-7: [PASS][19] -> [ABORT][20]
> [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-adlp-7/igt@xe_module_load@load.html
> [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-adlp-7/igt@xe_module_load@load.html
Oops. It appears we've hit a chicken-and-egg situation here. MMIO
functions depend on device workarounds to be already initialized; device
workarounds initialization depend on xe_sriov_probe_early(); which, in
turn, needs to use MMIO functions.
--
Gustavo Sousa
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: ✗ Xe.CI.BAT: failure for Extra enabling patches for NVL-P (rev3)
2026-03-09 22:03 ` Gustavo Sousa
@ 2026-03-09 22:08 ` Matt Roper
2026-03-09 22:24 ` Gustavo Sousa
0 siblings, 1 reply; 18+ messages in thread
From: Matt Roper @ 2026-03-09 22:08 UTC (permalink / raw)
To: Gustavo Sousa; +Cc: intel-xe, Michal Wajdeczko
On Mon, Mar 09, 2026 at 07:03:02PM -0300, Gustavo Sousa wrote:
> Patchwork <patchwork@emeril.freedesktop.org> writes:
>
> > == Series Details ==
> >
> > Series: Extra enabling patches for NVL-P (rev3)
> > URL : https://patchwork.freedesktop.org/series/162666/
> > State : failure
> >
> > == Summary ==
> >
> > CI Bug Log - changes from xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c_BAT -> xe-pw-162666v3_BAT
> > ====================================================
> >
> > Summary
> > -------
> >
> > **FAILURE**
> >
> > Serious unknown changes coming with xe-pw-162666v3_BAT absolutely need to be
> > verified manually.
> >
> > If you think the reported changes have nothing to do with the changes
> > introduced in xe-pw-162666v3_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
> > to document this new failure mode, which will reduce false positives in CI.
> >
> >
> >
> > Participating hosts (14 -> 12)
> > ------------------------------
> >
> > Missing (2): bat-adlp-vm bat-ptl-vm
> >
> > Possible new issues
> > -------------------
> >
> > Here are the unknown changes that may have been introduced in xe-pw-162666v3_BAT:
> >
> > ### IGT changes ###
> >
> > #### Possible regressions ####
> >
> > * igt@xe_module_load@load:
> > - bat-ptl-2: [PASS][1] -> [ABORT][2]
> > [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-ptl-2/igt@xe_module_load@load.html
> > [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-ptl-2/igt@xe_module_load@load.html
> > - bat-dg2-oem2: [PASS][3] -> [ABORT][4]
> > [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-dg2-oem2/igt@xe_module_load@load.html
> > [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-dg2-oem2/igt@xe_module_load@load.html
> > - bat-atsm-2: [PASS][5] -> [ABORT][6]
> > [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-atsm-2/igt@xe_module_load@load.html
> > [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-atsm-2/igt@xe_module_load@load.html
> > - bat-wcl-1: [PASS][7] -> [ABORT][8]
> > [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-wcl-1/igt@xe_module_load@load.html
> > [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-wcl-1/igt@xe_module_load@load.html
> > - bat-ptl-1: [PASS][9] -> [ABORT][10]
> > [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-ptl-1/igt@xe_module_load@load.html
> > [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-ptl-1/igt@xe_module_load@load.html
> > - bat-wcl-2: [PASS][11] -> [ABORT][12]
> > [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-wcl-2/igt@xe_module_load@load.html
> > [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-wcl-2/igt@xe_module_load@load.html
> > - bat-bmg-2: [PASS][13] -> [ABORT][14]
> > [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-bmg-2/igt@xe_module_load@load.html
> > [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-bmg-2/igt@xe_module_load@load.html
> > - bat-bmg-3: [PASS][15] -> [ABORT][16]
> > [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-bmg-3/igt@xe_module_load@load.html
> > [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-bmg-3/igt@xe_module_load@load.html
> > - bat-bmg-1: [PASS][17] -> [ABORT][18]
> > [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-bmg-1/igt@xe_module_load@load.html
> > [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-bmg-1/igt@xe_module_load@load.html
> > - bat-adlp-7: [PASS][19] -> [ABORT][20]
> > [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-adlp-7/igt@xe_module_load@load.html
> > [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-adlp-7/igt@xe_module_load@load.html
>
> Oops. It appears we've hit a chicken-and-egg situation here. MMIO
> functions depend on device workarounds to be already initialized; device
> workarounds initialization depend on xe_sriov_probe_early(); which, in
> turn, needs to use MMIO functions.
Ah, we do still have that early MMIO device workaround in
mmio_flush_pending_writes(). I looked for that before but missed it
while grep'ing.
A quick fix would be to drop the FUNC(xe_rtp_match_not_sriov_vf) rule
from the device workaround and add it as an extra condition in the
function itself. Then we wouldn't need to change the current placement
of device WA initialization. Then longer term we can look into allowing
device workarounds with additional rule capabilities at varying levels
of device/GT initialization.
Matt
>
> --
> Gustavo Sousa
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: ✗ Xe.CI.BAT: failure for Extra enabling patches for NVL-P (rev3)
2026-03-09 22:08 ` Matt Roper
@ 2026-03-09 22:24 ` Gustavo Sousa
0 siblings, 0 replies; 18+ messages in thread
From: Gustavo Sousa @ 2026-03-09 22:24 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-xe, Michal Wajdeczko
Matt Roper <matthew.d.roper@intel.com> writes:
> On Mon, Mar 09, 2026 at 07:03:02PM -0300, Gustavo Sousa wrote:
>> Patchwork <patchwork@emeril.freedesktop.org> writes:
>>
>> > == Series Details ==
>> >
>> > Series: Extra enabling patches for NVL-P (rev3)
>> > URL : https://patchwork.freedesktop.org/series/162666/
>> > State : failure
>> >
>> > == Summary ==
>> >
>> > CI Bug Log - changes from xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c_BAT -> xe-pw-162666v3_BAT
>> > ====================================================
>> >
>> > Summary
>> > -------
>> >
>> > **FAILURE**
>> >
>> > Serious unknown changes coming with xe-pw-162666v3_BAT absolutely need to be
>> > verified manually.
>> >
>> > If you think the reported changes have nothing to do with the changes
>> > introduced in xe-pw-162666v3_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
>> > to document this new failure mode, which will reduce false positives in CI.
>> >
>> >
>> >
>> > Participating hosts (14 -> 12)
>> > ------------------------------
>> >
>> > Missing (2): bat-adlp-vm bat-ptl-vm
>> >
>> > Possible new issues
>> > -------------------
>> >
>> > Here are the unknown changes that may have been introduced in xe-pw-162666v3_BAT:
>> >
>> > ### IGT changes ###
>> >
>> > #### Possible regressions ####
>> >
>> > * igt@xe_module_load@load:
>> > - bat-ptl-2: [PASS][1] -> [ABORT][2]
>> > [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-ptl-2/igt@xe_module_load@load.html
>> > [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-ptl-2/igt@xe_module_load@load.html
>> > - bat-dg2-oem2: [PASS][3] -> [ABORT][4]
>> > [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-dg2-oem2/igt@xe_module_load@load.html
>> > [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-dg2-oem2/igt@xe_module_load@load.html
>> > - bat-atsm-2: [PASS][5] -> [ABORT][6]
>> > [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-atsm-2/igt@xe_module_load@load.html
>> > [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-atsm-2/igt@xe_module_load@load.html
>> > - bat-wcl-1: [PASS][7] -> [ABORT][8]
>> > [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-wcl-1/igt@xe_module_load@load.html
>> > [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-wcl-1/igt@xe_module_load@load.html
>> > - bat-ptl-1: [PASS][9] -> [ABORT][10]
>> > [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-ptl-1/igt@xe_module_load@load.html
>> > [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-ptl-1/igt@xe_module_load@load.html
>> > - bat-wcl-2: [PASS][11] -> [ABORT][12]
>> > [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-wcl-2/igt@xe_module_load@load.html
>> > [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-wcl-2/igt@xe_module_load@load.html
>> > - bat-bmg-2: [PASS][13] -> [ABORT][14]
>> > [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-bmg-2/igt@xe_module_load@load.html
>> > [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-bmg-2/igt@xe_module_load@load.html
>> > - bat-bmg-3: [PASS][15] -> [ABORT][16]
>> > [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-bmg-3/igt@xe_module_load@load.html
>> > [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-bmg-3/igt@xe_module_load@load.html
>> > - bat-bmg-1: [PASS][17] -> [ABORT][18]
>> > [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-bmg-1/igt@xe_module_load@load.html
>> > [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-bmg-1/igt@xe_module_load@load.html
>> > - bat-adlp-7: [PASS][19] -> [ABORT][20]
>> > [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4683-50b85be0adadc4ab0b1e557627bebd7fdf1fcc3c/bat-adlp-7/igt@xe_module_load@load.html
>> > [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v3/bat-adlp-7/igt@xe_module_load@load.html
>>
>> Oops. It appears we've hit a chicken-and-egg situation here. MMIO
>> functions depend on device workarounds to be already initialized; device
>> workarounds initialization depend on xe_sriov_probe_early(); which, in
>> turn, needs to use MMIO functions.
>
> Ah, we do still have that early MMIO device workaround in
> mmio_flush_pending_writes(). I looked for that before but missed it
> while grep'ing.
>
> A quick fix would be to drop the FUNC(xe_rtp_match_not_sriov_vf) rule
> from the device workaround and add it as an extra condition in the
> function itself. Then we wouldn't need to change the current placement
> of device WA initialization. Then longer term we can look into allowing
> device workarounds with additional rule capabilities at varying levels
> of device/GT initialization.
Yep, this sounds good. I'll do that and add a FIXME comment on top as a
reminder that it needs to be put back into the workaround's rules.
--
Gustavo Sousa
^ permalink raw reply [flat|nested] 18+ messages in thread