From: Lars Povlsen <lars.povlsen@microchip.com>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Lars Povlsen <lars.povlsen@microchip.com>,
Serge Semin <fancer.lancer@gmail.com>,
Mark Brown <broonie@kernel.org>, SoC Team <soc@kernel.org>,
<devicetree@vger.kernel.org>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
<linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 02/10] spi: dw: Add support for RX sample delay register
Date: Tue, 9 Jun 2020 12:04:26 +0200 [thread overview]
Message-ID: <87k10gimhh.fsf@soft-dev15.microsemi.net> (raw)
In-Reply-To: <20200602193931.vl36k3c6uyiaizah@mobilestation>
Serge Semin writes:
> On Wed, May 13, 2020 at 04:00:23PM +0200, Lars Povlsen wrote:
>> This add support for the RX_SAMPLE_DLY register. If enabled in the
>> Designware IP, it allows tuning of the rx data signal by means of an
>> internal rx sample fifo.
>>
>> The register is located at offset 0xf0, and if the option is not
>> enabled in the IP, changing the register will have no effect.
>>
>> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
>> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
>> ---
>> drivers/spi/spi-dw.c | 7 +++++++
>> drivers/spi/spi-dw.h | 2 ++
>> 2 files changed, 9 insertions(+)
>>
>> diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
>> index e572eb34a3c1a..32997f28fa5bb 100644
>> --- a/drivers/spi/spi-dw.c
>> +++ b/drivers/spi/spi-dw.c
>> @@ -81,6 +81,9 @@ static ssize_t dw_spi_show_regs(struct file *file, char __user *user_buf,
>> "DMATDLR: \t0x%08x\n", dw_readl(dws, DW_SPI_DMATDLR));
>> len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
>> "DMARDLR: \t0x%08x\n", dw_readl(dws, DW_SPI_DMARDLR));
>
>> + len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
>> + "RX_SAMPLE_DLY: \t0x%08x\n",
>> + dw_readl(dws, DW_SPI_RX_SAMPLE_DLY));
>
> debugfs_reg32 interface is now utilized in the driver to dump the registers
> state. So this will have to be converted to just a new entry in the
> dw_spi_dbgfs_regs array.
>
Ok, I'll have a look at this.
>> len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
>> "=================================\n");
>>
>> @@ -315,6 +318,10 @@ static int dw_spi_transfer_one(struct spi_controller *master,
>> spi_set_clk(dws, chip->clk_div);
>> }
>>
>
>> + /* Apply RX sample delay, iff requested (nonzero) */
>
> s/iff/if
>
>> + if (dws->rx_sample_dly)
>> + dw_writel(dws, DW_SPI_RX_SAMPLE_DLY, dws->rx_sample_dly);
>> +
>> dws->n_bytes = DIV_ROUND_UP(transfer->bits_per_word, BITS_PER_BYTE);
>> dws->dma_width = DIV_ROUND_UP(transfer->bits_per_word, BITS_PER_BYTE);
>>
>> diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
>> index 1bf5713e047d3..ed6e47b3f50da 100644
>> --- a/drivers/spi/spi-dw.h
>> +++ b/drivers/spi/spi-dw.h
>> @@ -31,6 +31,7 @@
>> #define DW_SPI_IDR 0x58
>> #define DW_SPI_VERSION 0x5c
>> #define DW_SPI_DR 0x60
>> +#define DW_SPI_RX_SAMPLE_DLY 0xf0
>> #define DW_SPI_CS_OVERRIDE 0xf4
>>
>> /* Bit fields in CTRLR0 */
>> @@ -111,6 +112,7 @@ struct dw_spi {
>>
>> int cs_override;
>> u32 reg_io_width; /* DR I/O width in bytes */
>
>> + u8 rx_sample_dly; /* RX fifo tuning (option) */
>
> This doesn't seem like a good place for this parameter. The sample delay is
> SPI-slave specific. So as I see it, the parameter should be moved to the
> chip_data.
>
Yes, I got that in other comments, and you are right I guess.
I will apply that approach of having rx_sample_dly per SPI slave.
---Lars
> -Sergey
>
>> u16 bus_num;
>> u16 num_cs; /* supported slave numbers */
>> void (*set_cs)(struct spi_device *spi, bool enable);
>> --
>> 2.26.2
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Lars Povlsen,
Microchip
WARNING: multiple messages have this Message-ID (diff)
From: Lars Povlsen <lars.povlsen@microchip.com>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: devicetree@vger.kernel.org,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
linux-kernel@vger.kernel.org,
Serge Semin <fancer.lancer@gmail.com>,
linux-spi@vger.kernel.org, SoC Team <soc@kernel.org>,
Mark Brown <broonie@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
Lars Povlsen <lars.povlsen@microchip.com>
Subject: Re: [PATCH 02/10] spi: dw: Add support for RX sample delay register
Date: Tue, 9 Jun 2020 12:04:26 +0200 [thread overview]
Message-ID: <87k10gimhh.fsf@soft-dev15.microsemi.net> (raw)
In-Reply-To: <20200602193931.vl36k3c6uyiaizah@mobilestation>
Serge Semin writes:
> On Wed, May 13, 2020 at 04:00:23PM +0200, Lars Povlsen wrote:
>> This add support for the RX_SAMPLE_DLY register. If enabled in the
>> Designware IP, it allows tuning of the rx data signal by means of an
>> internal rx sample fifo.
>>
>> The register is located at offset 0xf0, and if the option is not
>> enabled in the IP, changing the register will have no effect.
>>
>> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
>> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
>> ---
>> drivers/spi/spi-dw.c | 7 +++++++
>> drivers/spi/spi-dw.h | 2 ++
>> 2 files changed, 9 insertions(+)
>>
>> diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
>> index e572eb34a3c1a..32997f28fa5bb 100644
>> --- a/drivers/spi/spi-dw.c
>> +++ b/drivers/spi/spi-dw.c
>> @@ -81,6 +81,9 @@ static ssize_t dw_spi_show_regs(struct file *file, char __user *user_buf,
>> "DMATDLR: \t0x%08x\n", dw_readl(dws, DW_SPI_DMATDLR));
>> len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
>> "DMARDLR: \t0x%08x\n", dw_readl(dws, DW_SPI_DMARDLR));
>
>> + len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
>> + "RX_SAMPLE_DLY: \t0x%08x\n",
>> + dw_readl(dws, DW_SPI_RX_SAMPLE_DLY));
>
> debugfs_reg32 interface is now utilized in the driver to dump the registers
> state. So this will have to be converted to just a new entry in the
> dw_spi_dbgfs_regs array.
>
Ok, I'll have a look at this.
>> len += scnprintf(buf + len, SPI_REGS_BUFSIZE - len,
>> "=================================\n");
>>
>> @@ -315,6 +318,10 @@ static int dw_spi_transfer_one(struct spi_controller *master,
>> spi_set_clk(dws, chip->clk_div);
>> }
>>
>
>> + /* Apply RX sample delay, iff requested (nonzero) */
>
> s/iff/if
>
>> + if (dws->rx_sample_dly)
>> + dw_writel(dws, DW_SPI_RX_SAMPLE_DLY, dws->rx_sample_dly);
>> +
>> dws->n_bytes = DIV_ROUND_UP(transfer->bits_per_word, BITS_PER_BYTE);
>> dws->dma_width = DIV_ROUND_UP(transfer->bits_per_word, BITS_PER_BYTE);
>>
>> diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
>> index 1bf5713e047d3..ed6e47b3f50da 100644
>> --- a/drivers/spi/spi-dw.h
>> +++ b/drivers/spi/spi-dw.h
>> @@ -31,6 +31,7 @@
>> #define DW_SPI_IDR 0x58
>> #define DW_SPI_VERSION 0x5c
>> #define DW_SPI_DR 0x60
>> +#define DW_SPI_RX_SAMPLE_DLY 0xf0
>> #define DW_SPI_CS_OVERRIDE 0xf4
>>
>> /* Bit fields in CTRLR0 */
>> @@ -111,6 +112,7 @@ struct dw_spi {
>>
>> int cs_override;
>> u32 reg_io_width; /* DR I/O width in bytes */
>
>> + u8 rx_sample_dly; /* RX fifo tuning (option) */
>
> This doesn't seem like a good place for this parameter. The sample delay is
> SPI-slave specific. So as I see it, the parameter should be moved to the
> chip_data.
>
Yes, I got that in other comments, and you are right I guess.
I will apply that approach of having rx_sample_dly per SPI slave.
---Lars
> -Sergey
>
>> u16 bus_num;
>> u16 num_cs; /* supported slave numbers */
>> void (*set_cs)(struct spi_device *spi, bool enable);
>> --
>> 2.26.2
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Lars Povlsen,
Microchip
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-06-09 10:04 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-13 14:00 [PATCH 00/10] spi: Adding support for Microchip Sparx5 SoC Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 01/10] spi: dw: Add support for polled operation via no IRQ specified in DT Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 14:20 ` Mark Brown
2020-05-14 13:04 ` Serge Semin
2020-05-14 13:04 ` Serge Semin
2020-05-15 9:11 ` Lars Povlsen
2020-05-15 9:11 ` Lars Povlsen
2020-05-13 14:37 ` Mark Brown
2020-05-19 10:21 ` Lars Povlsen
2020-05-19 10:21 ` Lars Povlsen
2020-05-13 14:55 ` Andy Shevchenko
2020-05-13 14:55 ` Andy Shevchenko
2020-05-19 10:25 ` Lars Povlsen
2020-05-19 10:25 ` Lars Povlsen
2020-06-02 19:10 ` Serge Semin
2020-06-02 19:10 ` Serge Semin
2020-06-09 9:13 ` Lars Povlsen
2020-06-09 9:13 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 02/10] spi: dw: Add support for RX sample delay register Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-06-02 19:39 ` Serge Semin
2020-06-02 19:39 ` Serge Semin
2020-06-09 10:04 ` Lars Povlsen [this message]
2020-06-09 10:04 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 03/10] spi: dw: Add support for client driver memory operations Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 04/10] dt-bindings: spi: Add bindings for spi-dw-mchp Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 14:52 ` Mark Brown
2020-05-19 11:47 ` Lars Povlsen
2020-05-19 11:47 ` Lars Povlsen
2020-05-19 11:58 ` Mark Brown
2020-05-19 12:10 ` Lars Povlsen
2020-05-19 12:10 ` Lars Povlsen
2020-06-02 19:49 ` Serge Semin
2020-06-02 19:49 ` Serge Semin
2020-06-09 10:27 ` Lars Povlsen
2020-06-09 10:27 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 05/10] spi: spi-dw-mmio: Spin off MSCC platforms into spi-dw-mchp Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 15:18 ` Mark Brown
2020-05-19 12:05 ` Lars Povlsen
2020-05-19 12:05 ` Lars Povlsen
2020-06-02 21:12 ` Serge Semin
2020-06-02 21:12 ` Serge Semin
2020-06-10 14:28 ` Lars Povlsen
2020-06-10 14:28 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 06/10] dt-bindings: spi: spi-dw-mchp: Add Sparx5 support Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 15:25 ` Mark Brown
2020-06-02 23:07 ` Serge Semin
2020-06-02 23:07 ` Serge Semin
2020-06-10 12:27 ` Lars Povlsen
2020-06-10 12:27 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 07/10] " Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-14 10:25 ` Mark Brown
2020-05-19 9:29 ` Lars Povlsen
2020-05-19 9:29 ` Lars Povlsen
2020-06-02 23:22 ` Serge Semin
2020-06-02 23:22 ` Serge Semin
2020-05-13 14:00 ` [PATCH 08/10] arm64: dts: sparx5: Add SPI controller Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 09/10] arm64: dts: sparx5: Add spi-nor support Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 10/10] arm64: dts: sparx5: Add spi-nand devices Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-29 16:21 ` [PATCH 00/10] spi: Adding support for Microchip Sparx5 SoC Serge Semin
2020-05-29 16:21 ` Serge Semin
2020-06-02 8:18 ` Lars Povlsen
2020-06-02 8:18 ` Lars Povlsen
2020-06-02 8:21 ` Serge Semin
2020-06-02 8:21 ` Serge Semin
2020-06-02 9:56 ` Mark Brown
2020-06-02 23:44 ` Serge Semin
2020-06-02 23:44 ` Serge Semin
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