From: Lars Povlsen <lars.povlsen@microchip.com>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Lars Povlsen <lars.povlsen@microchip.com>,
Serge Semin <fancer.lancer@gmail.com>,
Mark Brown <broonie@kernel.org>, SoC Team <soc@kernel.org>,
<devicetree@vger.kernel.org>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
<linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 01/10] spi: dw: Add support for polled operation via no IRQ specified in DT
Date: Tue, 9 Jun 2020 11:13:50 +0200 [thread overview]
Message-ID: <87lfkwiott.fsf@soft-dev15.microsemi.net> (raw)
In-Reply-To: <20200602191025.ywo77nslrgswh6sw@mobilestation>
Serge Semin writes:
> On Wed, May 13, 2020 at 04:00:22PM +0200, Lars Povlsen wrote:
>> With this change a SPI controller can be added without having a IRQ
>> associated, and causing all transfers to be polled. For SPI controllers
>> without DMA, this can significantly improve performance by less
>> interrupt handling overhead.
>>
>> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
>> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
>> ---
>> drivers/spi/spi-dw.c | 21 +++++++++++++--------
>> 1 file changed, 13 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
>> index 31e3f866d11a7..e572eb34a3c1a 100644
>> --- a/drivers/spi/spi-dw.c
>> +++ b/drivers/spi/spi-dw.c
>> @@ -19,6 +19,8 @@
>> #include <linux/debugfs.h>
>> #endif
>>
>
>> +#define VALID_IRQ(i) (i >= 0)
>
> Mark and Andy are right. It is a good candidate to be in a generic IRQ-related
> code as Anyd suggested:
>
>> > drivers/rtc/rtc-cmos.c:95:#define is_valid_irq(n) ((n) > 0)
>> > Candidate to be in include/linux/irq.h ?
>
> So if you feel like to author additional useful patch integrated into the
> kernel, this one is a good chance for it.
>
Yeah, but with the poll_transfer() gone below, I think I'll settle on
just getting this into the current framework. Optimization (as this is)
has less priority. I'll put this on the back burner.
>> +
>> /* Slave spi_dev related */
>> struct chip_data {
>> u8 tmode; /* TR/TO/RO/EEPROM */
>> @@ -359,7 +361,7 @@ static int dw_spi_transfer_one(struct spi_controller *master,
>> spi_enable_chip(dws, 1);
>> return ret;
>> }
>> - } else if (!chip->poll_mode) {
>> + } else if (!chip->poll_mode && VALID_IRQ(dws->irq)) {
>> txlevel = min_t(u16, dws->fifo_len / 2, dws->len / dws->n_bytes);
>> dw_writel(dws, DW_SPI_TXFLTR, txlevel);
>>
>> @@ -379,7 +381,7 @@ static int dw_spi_transfer_one(struct spi_controller *master,
>> return ret;
>> }
>>
>> - if (chip->poll_mode)
>> + if (chip->poll_mode || !VALID_IRQ(dws->irq))
>> return poll_transfer(dws);
>
> Please note. The chip->poll and the poll_transfer() methods've been discarded
> from the driver, since commit 1ceb09717e98 ("spi: dw: remove cs_control and
> poll_mode members from chip_data"). So you gonna have to get the
> poll_transfer-like method back.
>
> -Sergey
>
>>
>> return 1;
>> @@ -487,11 +489,13 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
>>
>> spi_controller_set_devdata(master, dws);
>>
>> - ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dev_name(dev),
>> - master);
>> - if (ret < 0) {
>> - dev_err(dev, "can not get IRQ\n");
>> - goto err_free_master;
>> + if (VALID_IRQ(dws->irq)) {
>> + ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED,
>> + dev_name(dev), master);
>> + if (ret < 0) {
>> + dev_err(dev, "can not get IRQ\n");
>> + goto err_free_master;
>> + }
>> }
>>
>> master->use_gpio_descriptors = true;
>> @@ -539,7 +543,8 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
>> if (dws->dma_ops && dws->dma_ops->dma_exit)
>> dws->dma_ops->dma_exit(dws);
>> spi_enable_chip(dws, 0);
>> - free_irq(dws->irq, master);
>> + if (VALID_IRQ(dws->irq))
>> + free_irq(dws->irq, master);
>> err_free_master:
>> spi_controller_put(master);
>> return ret;
>> --
>> 2.26.2
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Lars Povlsen,
Microchip
WARNING: multiple messages have this Message-ID (diff)
From: Lars Povlsen <lars.povlsen@microchip.com>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: devicetree@vger.kernel.org,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
linux-kernel@vger.kernel.org,
Serge Semin <fancer.lancer@gmail.com>,
linux-spi@vger.kernel.org, SoC Team <soc@kernel.org>,
Mark Brown <broonie@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
Lars Povlsen <lars.povlsen@microchip.com>
Subject: Re: [PATCH 01/10] spi: dw: Add support for polled operation via no IRQ specified in DT
Date: Tue, 9 Jun 2020 11:13:50 +0200 [thread overview]
Message-ID: <87lfkwiott.fsf@soft-dev15.microsemi.net> (raw)
In-Reply-To: <20200602191025.ywo77nslrgswh6sw@mobilestation>
Serge Semin writes:
> On Wed, May 13, 2020 at 04:00:22PM +0200, Lars Povlsen wrote:
>> With this change a SPI controller can be added without having a IRQ
>> associated, and causing all transfers to be polled. For SPI controllers
>> without DMA, this can significantly improve performance by less
>> interrupt handling overhead.
>>
>> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
>> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
>> ---
>> drivers/spi/spi-dw.c | 21 +++++++++++++--------
>> 1 file changed, 13 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
>> index 31e3f866d11a7..e572eb34a3c1a 100644
>> --- a/drivers/spi/spi-dw.c
>> +++ b/drivers/spi/spi-dw.c
>> @@ -19,6 +19,8 @@
>> #include <linux/debugfs.h>
>> #endif
>>
>
>> +#define VALID_IRQ(i) (i >= 0)
>
> Mark and Andy are right. It is a good candidate to be in a generic IRQ-related
> code as Anyd suggested:
>
>> > drivers/rtc/rtc-cmos.c:95:#define is_valid_irq(n) ((n) > 0)
>> > Candidate to be in include/linux/irq.h ?
>
> So if you feel like to author additional useful patch integrated into the
> kernel, this one is a good chance for it.
>
Yeah, but with the poll_transfer() gone below, I think I'll settle on
just getting this into the current framework. Optimization (as this is)
has less priority. I'll put this on the back burner.
>> +
>> /* Slave spi_dev related */
>> struct chip_data {
>> u8 tmode; /* TR/TO/RO/EEPROM */
>> @@ -359,7 +361,7 @@ static int dw_spi_transfer_one(struct spi_controller *master,
>> spi_enable_chip(dws, 1);
>> return ret;
>> }
>> - } else if (!chip->poll_mode) {
>> + } else if (!chip->poll_mode && VALID_IRQ(dws->irq)) {
>> txlevel = min_t(u16, dws->fifo_len / 2, dws->len / dws->n_bytes);
>> dw_writel(dws, DW_SPI_TXFLTR, txlevel);
>>
>> @@ -379,7 +381,7 @@ static int dw_spi_transfer_one(struct spi_controller *master,
>> return ret;
>> }
>>
>> - if (chip->poll_mode)
>> + if (chip->poll_mode || !VALID_IRQ(dws->irq))
>> return poll_transfer(dws);
>
> Please note. The chip->poll and the poll_transfer() methods've been discarded
> from the driver, since commit 1ceb09717e98 ("spi: dw: remove cs_control and
> poll_mode members from chip_data"). So you gonna have to get the
> poll_transfer-like method back.
>
> -Sergey
>
>>
>> return 1;
>> @@ -487,11 +489,13 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
>>
>> spi_controller_set_devdata(master, dws);
>>
>> - ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dev_name(dev),
>> - master);
>> - if (ret < 0) {
>> - dev_err(dev, "can not get IRQ\n");
>> - goto err_free_master;
>> + if (VALID_IRQ(dws->irq)) {
>> + ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED,
>> + dev_name(dev), master);
>> + if (ret < 0) {
>> + dev_err(dev, "can not get IRQ\n");
>> + goto err_free_master;
>> + }
>> }
>>
>> master->use_gpio_descriptors = true;
>> @@ -539,7 +543,8 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
>> if (dws->dma_ops && dws->dma_ops->dma_exit)
>> dws->dma_ops->dma_exit(dws);
>> spi_enable_chip(dws, 0);
>> - free_irq(dws->irq, master);
>> + if (VALID_IRQ(dws->irq))
>> + free_irq(dws->irq, master);
>> err_free_master:
>> spi_controller_put(master);
>> return ret;
>> --
>> 2.26.2
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Lars Povlsen,
Microchip
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-06-09 9:13 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-13 14:00 [PATCH 00/10] spi: Adding support for Microchip Sparx5 SoC Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 01/10] spi: dw: Add support for polled operation via no IRQ specified in DT Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 14:20 ` Mark Brown
2020-05-14 13:04 ` Serge Semin
2020-05-14 13:04 ` Serge Semin
2020-05-15 9:11 ` Lars Povlsen
2020-05-15 9:11 ` Lars Povlsen
2020-05-13 14:37 ` Mark Brown
2020-05-19 10:21 ` Lars Povlsen
2020-05-19 10:21 ` Lars Povlsen
2020-05-13 14:55 ` Andy Shevchenko
2020-05-13 14:55 ` Andy Shevchenko
2020-05-19 10:25 ` Lars Povlsen
2020-05-19 10:25 ` Lars Povlsen
2020-06-02 19:10 ` Serge Semin
2020-06-02 19:10 ` Serge Semin
2020-06-09 9:13 ` Lars Povlsen [this message]
2020-06-09 9:13 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 02/10] spi: dw: Add support for RX sample delay register Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-06-02 19:39 ` Serge Semin
2020-06-02 19:39 ` Serge Semin
2020-06-09 10:04 ` Lars Povlsen
2020-06-09 10:04 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 03/10] spi: dw: Add support for client driver memory operations Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 04/10] dt-bindings: spi: Add bindings for spi-dw-mchp Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 14:52 ` Mark Brown
2020-05-19 11:47 ` Lars Povlsen
2020-05-19 11:47 ` Lars Povlsen
2020-05-19 11:58 ` Mark Brown
2020-05-19 12:10 ` Lars Povlsen
2020-05-19 12:10 ` Lars Povlsen
2020-06-02 19:49 ` Serge Semin
2020-06-02 19:49 ` Serge Semin
2020-06-09 10:27 ` Lars Povlsen
2020-06-09 10:27 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 05/10] spi: spi-dw-mmio: Spin off MSCC platforms into spi-dw-mchp Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 15:18 ` Mark Brown
2020-05-19 12:05 ` Lars Povlsen
2020-05-19 12:05 ` Lars Povlsen
2020-06-02 21:12 ` Serge Semin
2020-06-02 21:12 ` Serge Semin
2020-06-10 14:28 ` Lars Povlsen
2020-06-10 14:28 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 06/10] dt-bindings: spi: spi-dw-mchp: Add Sparx5 support Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 15:25 ` Mark Brown
2020-06-02 23:07 ` Serge Semin
2020-06-02 23:07 ` Serge Semin
2020-06-10 12:27 ` Lars Povlsen
2020-06-10 12:27 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 07/10] " Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-14 10:25 ` Mark Brown
2020-05-19 9:29 ` Lars Povlsen
2020-05-19 9:29 ` Lars Povlsen
2020-06-02 23:22 ` Serge Semin
2020-06-02 23:22 ` Serge Semin
2020-05-13 14:00 ` [PATCH 08/10] arm64: dts: sparx5: Add SPI controller Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 09/10] arm64: dts: sparx5: Add spi-nor support Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-13 14:00 ` [PATCH 10/10] arm64: dts: sparx5: Add spi-nand devices Lars Povlsen
2020-05-13 14:00 ` Lars Povlsen
2020-05-29 16:21 ` [PATCH 00/10] spi: Adding support for Microchip Sparx5 SoC Serge Semin
2020-05-29 16:21 ` Serge Semin
2020-06-02 8:18 ` Lars Povlsen
2020-06-02 8:18 ` Lars Povlsen
2020-06-02 8:21 ` Serge Semin
2020-06-02 8:21 ` Serge Semin
2020-06-02 9:56 ` Mark Brown
2020-06-02 23:44 ` Serge Semin
2020-06-02 23:44 ` Serge Semin
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