[PATCH for-7.0 v2 0/2] change ivshmem endianness to LITTLE_ENDIAN

[PATCH for-7.0 v2 0/2] change ivshmem endianness to LITTLE_ENDIAN

[Daniel Henrique Barboza]

Hi,

This small series fixes an issue reported in Gitlab [1] that
affects PowerPC big-endian and little-endian and probably all
other big-endians in the wild that might use 'ivshmem'.

It's not clear to me who is the maintainer/responsible for this device
(MAINTAINERS doesn't seem to have any 'ivhshmem' entries nor someone
that looks upon all hw/misc/* files) so I didn't add any CC in that
regard. 'qemu-ppc' is being copied for awareness since they are the
folks that are most likely being impacted by the bug.

[1] https://gitlab.com/qemu-project/qemu/-/issues/168

Changes in v2:
- fixed 'endianess' occurrences to 'endianness' in patch 1
- fixed spell errors and added Thomas' ack in patch 2
- added a "for-7.0" marker in the subject
- v1 link: https://lists.gnu.org/archive/html/qemu-devel/2021-11/msg04716.html


Daniel Henrique Barboza (2):
  ivshmem.c: change endianness to LITTLE_ENDIAN
  ivshmem-test.c: enable test_ivshmem_server for ppc64 arch

 hw/misc/ivshmem.c          | 2 +-
 tests/qtest/ivshmem-test.c | 5 +----
 2 files changed, 2 insertions(+), 5 deletions(-)

-- 
2.31.1

[PATCH for-7.0 v2 1/2] ivshmem.c: change endianness to LITTLE_ENDIAN

[Daniel Henrique Barboza]

The ivshmem device, as with most PCI devices, uses little endian byte
order. However, the endianness of its mmio_ops is marked as
DEVICE_NATIVE_ENDIAN. This presents not only the usual problems with big
endian hosts but also with PowerPC little endian hosts as well, since
the Power architecture in QEMU uses big endian hardware (XIVE controller,
PCI Host Bridges, etc) even if the host is in little endian byte order.

As it is today, the IVPosition of the device will be byte swapped when
running in Power BE and LE. This can be seen by changing the existing
qtest 'ivshmem-test' to run in ppc64 hosts and printing the IVPOSITION
regs in test_ivshmem_server() right after the VM ids assert. For x86_64
the VM id values read are '0' and '1', for ppc64 (tested in a Power8
RHEL 7.9 BE server) and ppc64le (tested in a Power9 RHEL 8.6 LE server)
the ids will be '0' and '0x1000000'.

Change this device to LITTLE_ENDIAN fixes the issue for Power hosts of
both endianness, and every other big-endian architecture that might use
this device, without impacting x86 users.

Fixes: cb06608e17f8 ("ivshmem: convert to memory API")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/168
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
 hw/misc/ivshmem.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c
index 1ba4a98377..299837e5c1 100644
--- a/hw/misc/ivshmem.c
+++ b/hw/misc/ivshmem.c
@@ -243,7 +243,7 @@ static uint64_t ivshmem_io_read(void *opaque, hwaddr addr,
 static const MemoryRegionOps ivshmem_mmio_ops = {
     .read = ivshmem_io_read,
     .write = ivshmem_io_write,
-    .endianness = DEVICE_NATIVE_ENDIAN,
+    .endianness = DEVICE_LITTLE_ENDIAN,
     .impl = {
         .min_access_size = 4,
         .max_access_size = 4,
-- 
2.31.1

Re: [PATCH for-7.0 v2 1/2] ivshmem.c: change endianness to LITTLE_ENDIAN

[Philippe Mathieu-Daudé]

On 11/24/21 10:29, Daniel Henrique Barboza wrote:
> The ivshmem device, as with most PCI devices, uses little endian byte
> order. However, the endianness of its mmio_ops is marked as
> DEVICE_NATIVE_ENDIAN. This presents not only the usual problems with big
> endian hosts but also with PowerPC little endian hosts as well, since
> the Power architecture in QEMU uses big endian hardware (XIVE controller,
> PCI Host Bridges, etc) even if the host is in little endian byte order.

Maybe mention commit f7a199b2b44 ("ivshmem: use little-endian
int64_t for the protocol")?

> As it is today, the IVPosition of the device will be byte swapped when
> running in Power BE and LE. This can be seen by changing the existing
> qtest 'ivshmem-test' to run in ppc64 hosts and printing the IVPOSITION
> regs in test_ivshmem_server() right after the VM ids assert. For x86_64
> the VM id values read are '0' and '1', for ppc64 (tested in a Power8
> RHEL 7.9 BE server) and ppc64le (tested in a Power9 RHEL 8.6 LE server)
> the ids will be '0' and '0x1000000'.
> 
> Change this device to LITTLE_ENDIAN fixes the issue for Power hosts of
> both endianness, and every other big-endian architecture that might use
> this device, without impacting x86 users.
> 
> Fixes: cb06608e17f8 ("ivshmem: convert to memory API")
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/168
> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> ---
>  hw/misc/ivshmem.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c
> index 1ba4a98377..299837e5c1 100644
> --- a/hw/misc/ivshmem.c
> +++ b/hw/misc/ivshmem.c
> @@ -243,7 +243,7 @@ static uint64_t ivshmem_io_read(void *opaque, hwaddr addr,
>  static const MemoryRegionOps ivshmem_mmio_ops = {
>      .read = ivshmem_io_read,
>      .write = ivshmem_io_write,
> -    .endianness = DEVICE_NATIVE_ENDIAN,
> +    .endianness = DEVICE_LITTLE_ENDIAN,
>      .impl = {
>          .min_access_size = 4,
>          .max_access_size = 4,
> 

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Re: [PATCH for-7.0 v2 1/2] ivshmem.c: change endianness to LITTLE_ENDIAN

[Daniel Henrique Barboza]

On 11/24/21 08:28, Philippe Mathieu-Daudé wrote:
> On 11/24/21 10:29, Daniel Henrique Barboza wrote:
>> The ivshmem device, as with most PCI devices, uses little endian byte
>> order. However, the endianness of its mmio_ops is marked as
>> DEVICE_NATIVE_ENDIAN. This presents not only the usual problems with big
>> endian hosts but also with PowerPC little endian hosts as well, since
>> the Power architecture in QEMU uses big endian hardware (XIVE controller,
>> PCI Host Bridges, etc) even if the host is in little endian byte order.
> 
> Maybe mention commit f7a199b2b44 ("ivshmem: use little-endian
> int64_t for the protocol")?


Good point. I'll send a v3.

> 
>> As it is today, the IVPosition of the device will be byte swapped when
>> running in Power BE and LE. This can be seen by changing the existing
>> qtest 'ivshmem-test' to run in ppc64 hosts and printing the IVPOSITION
>> regs in test_ivshmem_server() right after the VM ids assert. For x86_64
>> the VM id values read are '0' and '1', for ppc64 (tested in a Power8
>> RHEL 7.9 BE server) and ppc64le (tested in a Power9 RHEL 8.6 LE server)
>> the ids will be '0' and '0x1000000'.
>>
>> Change this device to LITTLE_ENDIAN fixes the issue for Power hosts of
>> both endianness, and every other big-endian architecture that might use
>> this device, without impacting x86 users.
>>
>> Fixes: cb06608e17f8 ("ivshmem: convert to memory API")
>> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/168
>> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
>> ---
>>   hw/misc/ivshmem.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c
>> index 1ba4a98377..299837e5c1 100644
>> --- a/hw/misc/ivshmem.c
>> +++ b/hw/misc/ivshmem.c
>> @@ -243,7 +243,7 @@ static uint64_t ivshmem_io_read(void *opaque, hwaddr addr,
>>   static const MemoryRegionOps ivshmem_mmio_ops = {
>>       .read = ivshmem_io_read,
>>       .write = ivshmem_io_write,
>> -    .endianness = DEVICE_NATIVE_ENDIAN,
>> +    .endianness = DEVICE_LITTLE_ENDIAN,
>>       .impl = {
>>           .min_access_size = 4,
>>           .max_access_size = 4,
>>
> 
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>


Thanks!


Daniel

> 

Re: [PATCH for-7.0 v2 1/2] ivshmem.c: change endianness to LITTLE_ENDIAN

[Markus Armbruster]

Philippe Mathieu-Daudé <philmd@redhat.com> writes:

> On 11/24/21 10:29, Daniel Henrique Barboza wrote:
>> The ivshmem device, as with most PCI devices, uses little endian byte
>> order. However, the endianness of its mmio_ops is marked as
>> DEVICE_NATIVE_ENDIAN. This presents not only the usual problems with big
>> endian hosts but also with PowerPC little endian hosts as well, since
>> the Power architecture in QEMU uses big endian hardware (XIVE controller,
>> PCI Host Bridges, etc) even if the host is in little endian byte order.
>
> Maybe mention commit f7a199b2b44 ("ivshmem: use little-endian
> int64_t for the protocol")?

"The protocol" is the interface between ivshmem-doorbell device (client)
and ivshmem server.  This commit is about the interface between
ivshmem-* device and the guest.  The two interfaces are about as related
as SSH and DNS: software exists that uses both.

Mentioning f7a199b2b44 feels superfluous to me.

[...]

Re: [PATCH for-7.0 v2 1/2] ivshmem.c: change endianness to LITTLE_ENDIAN

[Daniel Henrique Barboza]

On 11/24/21 09:55, Markus Armbruster wrote:
> Philippe Mathieu-Daudé <philmd@redhat.com> writes:
> 
>> On 11/24/21 10:29, Daniel Henrique Barboza wrote:
>>> The ivshmem device, as with most PCI devices, uses little endian byte
>>> order. However, the endianness of its mmio_ops is marked as
>>> DEVICE_NATIVE_ENDIAN. This presents not only the usual problems with big
>>> endian hosts but also with PowerPC little endian hosts as well, since
>>> the Power architecture in QEMU uses big endian hardware (XIVE controller,
>>> PCI Host Bridges, etc) even if the host is in little endian byte order.
>>
>> Maybe mention commit f7a199b2b44 ("ivshmem: use little-endian
>> int64_t for the protocol")?
> 
> "The protocol" is the interface between ivshmem-doorbell device (client)
> and ivshmem server.  This commit is about the interface between
> ivshmem-* device and the guest.  The two interfaces are about as related
> as SSH and DNS: software exists that uses both.
> 

Yeah, I was about to reply asking what's the relevance of how client-server
communicates and the problem I'm trying to fix. It really seems a problem
with the commit I mentioned in the "Fixes" tag that introduced the memory API
with native endian instead of little endian.

Let's keep the commit msg as is. Thanks,


Daniel


> Mentioning f7a199b2b44 feels superfluous to me.
> 
> [...]
> 

[PATCH for-7.0 v2 2/2] ivshmem-test.c: enable test_ivshmem_server for ppc64 arch

[Daniel Henrique Barboza]

This test, if enabled by hand, was failing when the ivhsmem device was
being declared as DEVICE_NATIVE_ENDIAN with the following error:

/ppc64/ivshmem/pair: OK
/ppc64/ivshmem/server:
**
ERROR:/home/danielhb/qemu/tests/qtest/ivshmem-test.c:367:test_ivshmem_server:
assertion failed (ret != 0): (0 != 0)
Aborted

After the endianness change done in the previous patch, we can verify in
both a a Power 9 little-endian host and in a Power 8 big-endian host
that this test is now passing:

$ QTEST_QEMU_BINARY=./ppc64-softmmu/qemu-system-ppc64 ./tests/qtest/ivshmem-test -m slow
/ppc64/ivshmem/single: OK
/ppc64/ivshmem/hotplug: OK
/ppc64/ivshmem/memdev: OK
/ppc64/ivshmem/pair: OK
/ppc64/ivshmem/server: OK

Let's keep it that way by officially enabling it for ppc64.

Acked-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
 tests/qtest/ivshmem-test.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/tests/qtest/ivshmem-test.c b/tests/qtest/ivshmem-test.c
index dfa69424ed..fe94dd3b96 100644
--- a/tests/qtest/ivshmem-test.c
+++ b/tests/qtest/ivshmem-test.c
@@ -463,7 +463,6 @@ static gchar *mktempshm(int size, int *fd)
 int main(int argc, char **argv)
 {
     int ret, fd;
-    const char *arch = qtest_get_arch();
     gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
 
     g_test_init(&argc, &argv, NULL);
@@ -488,9 +487,7 @@ int main(int argc, char **argv)
     qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
     if (g_test_slow()) {
         qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
-        if (strcmp(arch, "ppc64") != 0) {
-            qtest_add_func("/ivshmem/server", test_ivshmem_server);
-        }
+        qtest_add_func("/ivshmem/server", test_ivshmem_server);
     }
 
 out:
-- 
2.31.1

Re: [PATCH for-7.0 v2 2/2] ivshmem-test.c: enable test_ivshmem_server for ppc64 arch

[Philippe Mathieu-Daudé]

On 11/24/21 10:29, Daniel Henrique Barboza wrote:
> This test, if enabled by hand, was failing when the ivhsmem device was
> being declared as DEVICE_NATIVE_ENDIAN with the following error:
> 
> /ppc64/ivshmem/pair: OK
> /ppc64/ivshmem/server:
> **
> ERROR:/home/danielhb/qemu/tests/qtest/ivshmem-test.c:367:test_ivshmem_server:
> assertion failed (ret != 0): (0 != 0)
> Aborted
> 
> After the endianness change done in the previous patch, we can verify in
> both a a Power 9 little-endian host and in a Power 8 big-endian host
> that this test is now passing:
> 
> $ QTEST_QEMU_BINARY=./ppc64-softmmu/qemu-system-ppc64 ./tests/qtest/ivshmem-test -m slow
> /ppc64/ivshmem/single: OK
> /ppc64/ivshmem/hotplug: OK
> /ppc64/ivshmem/memdev: OK
> /ppc64/ivshmem/pair: OK
> /ppc64/ivshmem/server: OK
> 
> Let's keep it that way by officially enabling it for ppc64.
> 
> Acked-by: Thomas Huth <thuth@redhat.com>
> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> ---
>  tests/qtest/ivshmem-test.c | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Re: [PATCH for-7.0 v2 0/2] change ivshmem endianness to LITTLE_ENDIAN

[Cédric Le Goater]

On 11/24/21 10:29, Daniel Henrique Barboza wrote:
> Hi,
> 
> This small series fixes an issue reported in Gitlab [1] that
> affects PowerPC big-endian and little-endian and probably all
> other big-endians in the wild that might use 'ivshmem'.
> 
> It's not clear to me who is the maintainer/responsible for this device
> (MAINTAINERS doesn't seem to have any 'ivhshmem' entries nor someone
> that looks upon all hw/misc/* files) so I didn't add any CC in that
> regard. 'qemu-ppc' is being copied for awareness since they are the
> folks that are most likely being impacted by the bug.
> 
> [1] https://gitlab.com/qemu-project/qemu/-/issues/168


Applied to ppc-next.

Thanks,

C.