From: gregory.clement@bootlin.com (Gregory CLEMENT)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 06/17] irqchip/irq-mvebu-icu: switch to regmap
Date: Mon, 30 Apr 2018 14:42:01 +0200 [thread overview]
Message-ID: <87muxkc1d2.fsf@bootlin.com> (raw)
In-Reply-To: <20180421135537.24716-7-miquel.raynal@bootlin.com> (Miquel Raynal's message of "Sat, 21 Apr 2018 15:55:26 +0200")
Hi Miquel,
On sam., avril 21 2018, Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> The ICU DT nodes have now the 'syscon' compatible, we can switch to
> regmap before splitting the code to support multiple platform devices to
> be probed (one for the ICU, one per interrupt group).
>
How do you handle the case when you receive an old dtb (without the
syscon compatible) ?
Gregory
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/irqchip/irq-mvebu-icu.c | 37 ++++++++++++++++++++-----------------
> 1 file changed, 20 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/irqchip/irq-mvebu-icu.c b/drivers/irqchip/irq-mvebu-icu.c
> index 5af2520445c4..580586240781 100644
> --- a/drivers/irqchip/irq-mvebu-icu.c
> +++ b/drivers/irqchip/irq-mvebu-icu.c
> @@ -18,6 +18,8 @@
> #include <linux/of_irq.h>
> #include <linux/of_platform.h>
> #include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/mfd/syscon.h>
>
> #include <dt-bindings/interrupt-controller/mvebu-icu.h>
>
> @@ -40,7 +42,7 @@
>
> struct mvebu_icu {
> struct irq_chip irq_chip;
> - void __iomem *base;
> + struct regmap *regmap;
> struct irq_domain *domain;
> struct device *dev;
> };
> @@ -69,7 +71,7 @@ static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
> icu_int = 0;
> }
>
> - writel_relaxed(icu_int, icu->base + ICU_INT_CFG(d->hwirq));
> + regmap_write(icu->regmap, ICU_INT_CFG(d->hwirq), icu_int);
>
> /*
> * The SATA unit has 2 ports, and a dedicated ICU entry per
> @@ -81,10 +83,10 @@ static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
> * configured (regardless of which port is actually in use).
> */
> if (d->hwirq == ICU_SATA0_ICU_ID || d->hwirq == ICU_SATA1_ICU_ID) {
> - writel_relaxed(icu_int,
> - icu->base + ICU_INT_CFG(ICU_SATA0_ICU_ID));
> - writel_relaxed(icu_int,
> - icu->base + ICU_INT_CFG(ICU_SATA1_ICU_ID));
> + regmap_write(icu->regmap, ICU_INT_CFG(ICU_SATA0_ICU_ID),
> + icu_int);
> + regmap_write(icu->regmap, ICU_INT_CFG(ICU_SATA1_ICU_ID),
> + icu_int);
> }
> }
>
> @@ -208,12 +210,13 @@ static int mvebu_icu_probe(struct platform_device *pdev)
>
> icu->dev = &pdev->dev;
>
> + icu->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, NULL);
> + if (IS_ERR(icu->regmap))
> + return PTR_ERR(icu->regmap);
> +
> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> - icu->base = devm_ioremap_resource(&pdev->dev, res);
> - if (IS_ERR(icu->base)) {
> - dev_err(&pdev->dev, "Failed to map icu base address.\n");
> - return PTR_ERR(icu->base);
> - }
> + if (!res)
> + return -ENODEV;
>
> icu->irq_chip.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
> "ICU.%x",
> @@ -247,10 +250,10 @@ static int mvebu_icu_probe(struct platform_device *pdev)
> return ret;
>
> /* Set Clear/Set ICU SPI message address in AP */
> - writel_relaxed(upper_32_bits(setspi), icu->base + ICU_SETSPI_NSR_AH);
> - writel_relaxed(lower_32_bits(setspi), icu->base + ICU_SETSPI_NSR_AL);
> - writel_relaxed(upper_32_bits(clrspi), icu->base + ICU_CLRSPI_NSR_AH);
> - writel_relaxed(lower_32_bits(clrspi), icu->base + ICU_CLRSPI_NSR_AL);
> + regmap_write(icu->regmap, ICU_SETSPI_NSR_AH, upper_32_bits(setspi));
> + regmap_write(icu->regmap, ICU_SETSPI_NSR_AL, lower_32_bits(setspi));
> + regmap_write(icu->regmap, ICU_CLRSPI_NSR_AH, upper_32_bits(clrspi));
> + regmap_write(icu->regmap, ICU_CLRSPI_NSR_AL, lower_32_bits(clrspi));
>
> /*
> * Clean all ICU interrupts with type SPI_NSR, required to
> @@ -259,11 +262,11 @@ static int mvebu_icu_probe(struct platform_device *pdev)
> for (i = 0 ; i < ICU_MAX_IRQS ; i++) {
> u32 icu_int, icu_grp;
>
> - icu_int = readl(icu->base + ICU_INT_CFG(i));
> + regmap_read(icu->regmap, ICU_INT_CFG(i), &icu_int);
> icu_grp = icu_int >> ICU_GROUP_SHIFT;
>
> if (icu_grp == ICU_GRP_NSR)
> - writel_relaxed(0x0, icu->base + ICU_INT_CFG(i));
> + regmap_write(icu->regmap, ICU_INT_CFG(i), 0);
> }
>
> icu->domain =
> --
> 2.14.1
>
--
Gregory Clement, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com
WARNING: multiple messages have this Message-ID (diff)
From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Mark Rutland <mark.rutland@arm.com>, Andrew Lunn <andrew@lunn.ch>,
Jason Cooper <jason@lakedaemon.net>,
devicetree@vger.kernel.org, Marc Zyngier <marc.zyngier@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Hanna Hawa <hannah@marvell.com>, Haim Boot <hayim@marvell.com>,
Will Deacon <will.deacon@arm.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Nadav Haklai <nadavh@marvell.com>,
Antoine Tenart <antoine.tenart@bootlin.com>,
Rob Herring <robh+dt@kernel.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Thomas Gleixner <tglx@linutronix.de>,
linux-arm-kernel@lists.infradead.org,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH 06/17] irqchip/irq-mvebu-icu: switch to regmap
Date: Mon, 30 Apr 2018 14:42:01 +0200 [thread overview]
Message-ID: <87muxkc1d2.fsf@bootlin.com> (raw)
In-Reply-To: <20180421135537.24716-7-miquel.raynal@bootlin.com> (Miquel Raynal's message of "Sat, 21 Apr 2018 15:55:26 +0200")
Hi Miquel,
On sam., avril 21 2018, Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> The ICU DT nodes have now the 'syscon' compatible, we can switch to
> regmap before splitting the code to support multiple platform devices to
> be probed (one for the ICU, one per interrupt group).
>
How do you handle the case when you receive an old dtb (without the
syscon compatible) ?
Gregory
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/irqchip/irq-mvebu-icu.c | 37 ++++++++++++++++++++-----------------
> 1 file changed, 20 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/irqchip/irq-mvebu-icu.c b/drivers/irqchip/irq-mvebu-icu.c
> index 5af2520445c4..580586240781 100644
> --- a/drivers/irqchip/irq-mvebu-icu.c
> +++ b/drivers/irqchip/irq-mvebu-icu.c
> @@ -18,6 +18,8 @@
> #include <linux/of_irq.h>
> #include <linux/of_platform.h>
> #include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/mfd/syscon.h>
>
> #include <dt-bindings/interrupt-controller/mvebu-icu.h>
>
> @@ -40,7 +42,7 @@
>
> struct mvebu_icu {
> struct irq_chip irq_chip;
> - void __iomem *base;
> + struct regmap *regmap;
> struct irq_domain *domain;
> struct device *dev;
> };
> @@ -69,7 +71,7 @@ static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
> icu_int = 0;
> }
>
> - writel_relaxed(icu_int, icu->base + ICU_INT_CFG(d->hwirq));
> + regmap_write(icu->regmap, ICU_INT_CFG(d->hwirq), icu_int);
>
> /*
> * The SATA unit has 2 ports, and a dedicated ICU entry per
> @@ -81,10 +83,10 @@ static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
> * configured (regardless of which port is actually in use).
> */
> if (d->hwirq == ICU_SATA0_ICU_ID || d->hwirq == ICU_SATA1_ICU_ID) {
> - writel_relaxed(icu_int,
> - icu->base + ICU_INT_CFG(ICU_SATA0_ICU_ID));
> - writel_relaxed(icu_int,
> - icu->base + ICU_INT_CFG(ICU_SATA1_ICU_ID));
> + regmap_write(icu->regmap, ICU_INT_CFG(ICU_SATA0_ICU_ID),
> + icu_int);
> + regmap_write(icu->regmap, ICU_INT_CFG(ICU_SATA1_ICU_ID),
> + icu_int);
> }
> }
>
> @@ -208,12 +210,13 @@ static int mvebu_icu_probe(struct platform_device *pdev)
>
> icu->dev = &pdev->dev;
>
> + icu->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, NULL);
> + if (IS_ERR(icu->regmap))
> + return PTR_ERR(icu->regmap);
> +
> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> - icu->base = devm_ioremap_resource(&pdev->dev, res);
> - if (IS_ERR(icu->base)) {
> - dev_err(&pdev->dev, "Failed to map icu base address.\n");
> - return PTR_ERR(icu->base);
> - }
> + if (!res)
> + return -ENODEV;
>
> icu->irq_chip.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
> "ICU.%x",
> @@ -247,10 +250,10 @@ static int mvebu_icu_probe(struct platform_device *pdev)
> return ret;
>
> /* Set Clear/Set ICU SPI message address in AP */
> - writel_relaxed(upper_32_bits(setspi), icu->base + ICU_SETSPI_NSR_AH);
> - writel_relaxed(lower_32_bits(setspi), icu->base + ICU_SETSPI_NSR_AL);
> - writel_relaxed(upper_32_bits(clrspi), icu->base + ICU_CLRSPI_NSR_AH);
> - writel_relaxed(lower_32_bits(clrspi), icu->base + ICU_CLRSPI_NSR_AL);
> + regmap_write(icu->regmap, ICU_SETSPI_NSR_AH, upper_32_bits(setspi));
> + regmap_write(icu->regmap, ICU_SETSPI_NSR_AL, lower_32_bits(setspi));
> + regmap_write(icu->regmap, ICU_CLRSPI_NSR_AH, upper_32_bits(clrspi));
> + regmap_write(icu->regmap, ICU_CLRSPI_NSR_AL, lower_32_bits(clrspi));
>
> /*
> * Clean all ICU interrupts with type SPI_NSR, required to
> @@ -259,11 +262,11 @@ static int mvebu_icu_probe(struct platform_device *pdev)
> for (i = 0 ; i < ICU_MAX_IRQS ; i++) {
> u32 icu_int, icu_grp;
>
> - icu_int = readl(icu->base + ICU_INT_CFG(i));
> + regmap_read(icu->regmap, ICU_INT_CFG(i), &icu_int);
> icu_grp = icu_int >> ICU_GROUP_SHIFT;
>
> if (icu_grp == ICU_GRP_NSR)
> - writel_relaxed(0x0, icu->base + ICU_INT_CFG(i));
> + regmap_write(icu->regmap, ICU_INT_CFG(i), 0);
> }
>
> icu->domain =
> --
> 2.14.1
>
--
Gregory Clement, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com
next prev parent reply other threads:[~2018-04-30 12:42 UTC|newest]
Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-21 13:55 [PATCH 00/17] Add System Error Interrupt support to Armada SoCs Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-21 13:55 ` [PATCH 01/17] dt-bindings/interrupt-controller: fix Marvell ICU length in the example Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-27 20:16 ` Rob Herring
2018-04-27 20:16 ` Rob Herring
2018-04-30 13:44 ` Thomas Petazzoni
2018-04-30 13:44 ` Thomas Petazzoni
2018-04-21 13:55 ` [PATCH 02/17] arm64: dts: marvell: fix CP110 ICU node size Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-30 12:38 ` Gregory CLEMENT
2018-04-30 12:38 ` Gregory CLEMENT
2018-04-30 13:44 ` Thomas Petazzoni
2018-04-30 13:44 ` Thomas Petazzoni
2018-04-21 13:55 ` [PATCH 03/17] arm64: dts: marvell: add syscon compatible to CP110 ICU node Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-30 13:45 ` Thomas Petazzoni
2018-04-30 13:45 ` Thomas Petazzoni
2018-04-21 13:55 ` [PATCH 04/17] irqchip/irq-mvebu-icu: fix wrong user data retrieval Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-30 13:49 ` Thomas Petazzoni
2018-04-30 13:49 ` Thomas Petazzoni
2018-05-03 14:57 ` Miquel Raynal
2018-05-03 14:57 ` Miquel Raynal
2018-04-21 13:55 ` [PATCH 05/17] irqchip/irq-mvebu-icu: clarify the reset operation of configured interrupts Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-30 13:51 ` Thomas Petazzoni
2018-04-30 13:51 ` Thomas Petazzoni
2018-04-21 13:55 ` [PATCH 06/17] irqchip/irq-mvebu-icu: switch to regmap Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-30 12:42 ` Gregory CLEMENT [this message]
2018-04-30 12:42 ` Gregory CLEMENT
2018-04-30 13:53 ` Thomas Petazzoni
2018-04-30 13:53 ` Thomas Petazzoni
2018-05-03 15:05 ` Miquel Raynal
2018-05-03 15:05 ` Miquel Raynal
2018-04-30 13:58 ` Thomas Petazzoni
2018-04-30 13:58 ` Thomas Petazzoni
2018-04-21 13:55 ` [PATCH 07/17] irqchip/irq-mvebu-icu: make irq_domain local Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-05-02 8:02 ` Thomas Petazzoni
2018-05-02 8:02 ` Thomas Petazzoni
2018-04-21 13:55 ` [PATCH 08/17] irqchip/irq-mvebu-icu: disociate ICU and NSR Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-05-02 8:03 ` Thomas Petazzoni
2018-05-02 8:03 ` Thomas Petazzoni
2018-04-21 13:55 ` [PATCH 09/17] irqchip/irq-mvebu-icu: support ICU subnodes Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-05-02 8:13 ` Thomas Petazzoni
2018-05-02 8:13 ` Thomas Petazzoni
2018-05-04 8:32 ` Miquel Raynal
2018-05-04 8:32 ` Miquel Raynal
2018-04-21 13:55 ` [PATCH 10/17] irqchip/irq-mvebu-sei: add new driver for Marvell SEI Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-05-02 9:17 ` Thomas Petazzoni
2018-05-02 9:17 ` Thomas Petazzoni
2018-05-02 15:56 ` Thomas Petazzoni
2018-05-02 15:56 ` Thomas Petazzoni
2018-05-18 13:22 ` Miquel Raynal
2018-05-18 13:22 ` Miquel Raynal
2018-04-21 13:55 ` [PATCH 11/17] arm64: marvell: enable SEI driver Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-30 13:01 ` Gregory CLEMENT
2018-04-30 13:01 ` Gregory CLEMENT
2018-04-21 13:55 ` [PATCH 12/17] irqchip/irq-mvebu-icu: add support for System Error Interrupts (SEI) Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-21 13:55 ` [PATCH 13/17] dt-bindings/interrupt-controller: update Marvell ICU bindings Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-27 20:47 ` Rob Herring
2018-04-27 20:47 ` Rob Herring
2018-04-28 10:42 ` Miquel Raynal
2018-04-28 10:42 ` Miquel Raynal
2018-04-28 10:50 ` Thomas Petazzoni
2018-04-28 10:50 ` Thomas Petazzoni
2018-04-21 13:55 ` [PATCH 14/17] dt-bindings/interrupt-controller: add description for Marvell SEI node Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-27 20:50 ` Rob Herring
2018-04-27 20:50 ` Rob Herring
2018-04-28 10:48 ` Miquel Raynal
2018-04-28 10:48 ` Miquel Raynal
2018-04-30 14:09 ` Rob Herring
2018-04-30 14:09 ` Rob Herring
2018-05-18 14:48 ` Miquel Raynal
2018-05-18 14:48 ` Miquel Raynal
2018-04-30 14:24 ` Thomas Petazzoni
2018-04-30 14:24 ` Thomas Petazzoni
2018-04-21 13:55 ` [PATCH 15/17] arm64: dts: marvell: add AP806 SEI subnode Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-21 13:55 ` [PATCH 16/17] arm64: dts: marvell: use new bindings for CP110 interrupts Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
2018-04-21 13:55 ` [PATCH 17/17] arm64: dts: marvell: add CP110 ICU SEI subnode Miquel Raynal
2018-04-21 13:55 ` Miquel Raynal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87muxkc1d2.fsf@bootlin.com \
--to=gregory.clement@bootlin.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.