From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, patches@linaro.org,
Richard Henderson <rth@twiddle.net>,
Paolo Bonzini <pbonzini@redhat.com>, Peter Xu <peterx@redhat.com>,
Eric Auger <eric.auger@redhat.com>
Subject: Re: [PATCH v2 09/13] hw/core/or-irq: Support more than 16 inputs to an OR gate
Date: Thu, 14 Jun 2018 19:24:44 +0100 [thread overview]
Message-ID: <87sh5pz0nn.fsf@linaro.org> (raw)
In-Reply-To: <20180604152941.20374-10-peter.maydell@linaro.org>
Peter Maydell <peter.maydell@linaro.org> writes:
> For the IoTKit MPC support, we need to wire together the
> interrupt outputs of 17 MPCs; this exceeds the current
> value of MAX_OR_LINES. Increase MAX_OR_LINES to 32 (which
> should be enough for anyone).
>
> The tricky part is retaining the migration compatibility for
> existing OR gates; we add a subsection which is only used
> for larger OR gates, and define it such that we can freely
> increase MAX_OR_LINES in future (or even move to a dynamically
> allocated levels[] array without an upper size limit) without
> breaking compatibility.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> include/hw/or-irq.h | 5 ++++-
> hw/core/or-irq.c | 39 +++++++++++++++++++++++++++++++++++++--
> 2 files changed, 41 insertions(+), 3 deletions(-)
>
> diff --git a/include/hw/or-irq.h b/include/hw/or-irq.h
> index 3f6fc1b58a4..5a31e5a1881 100644
> --- a/include/hw/or-irq.h
> +++ b/include/hw/or-irq.h
> @@ -31,7 +31,10 @@
>
> #define TYPE_OR_IRQ "or-irq"
>
> -#define MAX_OR_LINES 16
> +/* This can safely be increased if necessary without breaking
> + * migration compatibility (as long as it remains greater than 15).
> + */
> +#define MAX_OR_LINES 32
>
> typedef struct OrIRQState qemu_or_irq;
>
> diff --git a/hw/core/or-irq.c b/hw/core/or-irq.c
> index f9d76c46415..a86901b673c 100644
> --- a/hw/core/or-irq.c
> +++ b/hw/core/or-irq.c
> @@ -66,14 +66,49 @@ static void or_irq_init(Object *obj)
> qdev_init_gpio_out(DEVICE(obj), &s->out_irq, 1);
> }
>
> +/* The original version of this device had a fixed 16 entries in its
> + * VMState array; devices with more inputs than this need to
> + * migrate the extra lines via a subsection.
> + * The subsection migrates as much of the levels[] array as is needed
> + * (including repeating the first 16 elements), to avoid the awkwardness
> + * of splitting it in two to meet the requirements of VMSTATE_VARRAY_UINT16.
> + */
> +#define OLD_MAX_OR_LINES 16
> +#if MAX_OR_LINES < OLD_MAX_OR_LINES
> +#error MAX_OR_LINES must be at least 16 for migration compatibility
> +#endif
> +
> +static bool vmstate_extras_needed(void *opaque)
> +{
> + qemu_or_irq *s = OR_IRQ(opaque);
> +
> + return s->num_lines >= OLD_MAX_OR_LINES;
> +}
> +
> +static const VMStateDescription vmstate_or_irq_extras = {
> + .name = "or-irq-extras",
> + .version_id = 1,
> + .minimum_version_id = 1,
> + .needed = vmstate_extras_needed,
> + .fields = (VMStateField[]) {
> + VMSTATE_VARRAY_UINT16_UNSAFE(levels, qemu_or_irq, num_lines, 0,
> + vmstate_info_bool, bool),
> + VMSTATE_END_OF_LIST(),
> + },
> +};
> +
> static const VMStateDescription vmstate_or_irq = {
> .name = TYPE_OR_IRQ,
> .version_id = 1,
> .minimum_version_id = 1,
> .fields = (VMStateField[]) {
> - VMSTATE_BOOL_ARRAY(levels, qemu_or_irq, MAX_OR_LINES),
> + VMSTATE_BOOL_SUB_ARRAY(levels, qemu_or_irq, 0, OLD_MAX_OR_LINES),
> VMSTATE_END_OF_LIST(),
> - }
> + },
> + .subsections = (const VMStateDescription*[]) {
> + &vmstate_or_irq_extras,
> + NULL
> + },
> };
>
> static Property or_irq_properties[] = {
--
Alex Bennée
WARNING: multiple messages have this Message-ID (diff)
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, patches@linaro.org,
Richard Henderson <rth@twiddle.net>,
Paolo Bonzini <pbonzini@redhat.com>, Peter Xu <peterx@redhat.com>,
Eric Auger <eric.auger@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v2 09/13] hw/core/or-irq: Support more than 16 inputs to an OR gate
Date: Thu, 14 Jun 2018 19:24:44 +0100 [thread overview]
Message-ID: <87sh5pz0nn.fsf@linaro.org> (raw)
In-Reply-To: <20180604152941.20374-10-peter.maydell@linaro.org>
Peter Maydell <peter.maydell@linaro.org> writes:
> For the IoTKit MPC support, we need to wire together the
> interrupt outputs of 17 MPCs; this exceeds the current
> value of MAX_OR_LINES. Increase MAX_OR_LINES to 32 (which
> should be enough for anyone).
>
> The tricky part is retaining the migration compatibility for
> existing OR gates; we add a subsection which is only used
> for larger OR gates, and define it such that we can freely
> increase MAX_OR_LINES in future (or even move to a dynamically
> allocated levels[] array without an upper size limit) without
> breaking compatibility.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> include/hw/or-irq.h | 5 ++++-
> hw/core/or-irq.c | 39 +++++++++++++++++++++++++++++++++++++--
> 2 files changed, 41 insertions(+), 3 deletions(-)
>
> diff --git a/include/hw/or-irq.h b/include/hw/or-irq.h
> index 3f6fc1b58a4..5a31e5a1881 100644
> --- a/include/hw/or-irq.h
> +++ b/include/hw/or-irq.h
> @@ -31,7 +31,10 @@
>
> #define TYPE_OR_IRQ "or-irq"
>
> -#define MAX_OR_LINES 16
> +/* This can safely be increased if necessary without breaking
> + * migration compatibility (as long as it remains greater than 15).
> + */
> +#define MAX_OR_LINES 32
>
> typedef struct OrIRQState qemu_or_irq;
>
> diff --git a/hw/core/or-irq.c b/hw/core/or-irq.c
> index f9d76c46415..a86901b673c 100644
> --- a/hw/core/or-irq.c
> +++ b/hw/core/or-irq.c
> @@ -66,14 +66,49 @@ static void or_irq_init(Object *obj)
> qdev_init_gpio_out(DEVICE(obj), &s->out_irq, 1);
> }
>
> +/* The original version of this device had a fixed 16 entries in its
> + * VMState array; devices with more inputs than this need to
> + * migrate the extra lines via a subsection.
> + * The subsection migrates as much of the levels[] array as is needed
> + * (including repeating the first 16 elements), to avoid the awkwardness
> + * of splitting it in two to meet the requirements of VMSTATE_VARRAY_UINT16.
> + */
> +#define OLD_MAX_OR_LINES 16
> +#if MAX_OR_LINES < OLD_MAX_OR_LINES
> +#error MAX_OR_LINES must be at least 16 for migration compatibility
> +#endif
> +
> +static bool vmstate_extras_needed(void *opaque)
> +{
> + qemu_or_irq *s = OR_IRQ(opaque);
> +
> + return s->num_lines >= OLD_MAX_OR_LINES;
> +}
> +
> +static const VMStateDescription vmstate_or_irq_extras = {
> + .name = "or-irq-extras",
> + .version_id = 1,
> + .minimum_version_id = 1,
> + .needed = vmstate_extras_needed,
> + .fields = (VMStateField[]) {
> + VMSTATE_VARRAY_UINT16_UNSAFE(levels, qemu_or_irq, num_lines, 0,
> + vmstate_info_bool, bool),
> + VMSTATE_END_OF_LIST(),
> + },
> +};
> +
> static const VMStateDescription vmstate_or_irq = {
> .name = TYPE_OR_IRQ,
> .version_id = 1,
> .minimum_version_id = 1,
> .fields = (VMStateField[]) {
> - VMSTATE_BOOL_ARRAY(levels, qemu_or_irq, MAX_OR_LINES),
> + VMSTATE_BOOL_SUB_ARRAY(levels, qemu_or_irq, 0, OLD_MAX_OR_LINES),
> VMSTATE_END_OF_LIST(),
> - }
> + },
> + .subsections = (const VMStateDescription*[]) {
> + &vmstate_or_irq_extras,
> + NULL
> + },
> };
>
> static Property or_irq_properties[] = {
--
Alex Bennée
next prev parent reply other threads:[~2018-06-14 18:24 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-04 15:29 [PATCH v2 00/13] iommu: support txattrs, support TCG execution, implement TZ MPC Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-04 15:29 ` [PATCH v2 01/13] iommu: Add IOMMU index concept to IOMMU API Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-14 18:21 ` Alex Bennée
2018-06-14 18:21 ` [Qemu-devel] " Alex Bennée
2018-06-04 15:29 ` [PATCH v2 02/13] iommu: Add IOMMU index argument to notifier APIs Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-14 18:21 ` Alex Bennée
2018-06-14 18:21 ` [Qemu-devel] " Alex Bennée
2018-06-04 15:29 ` [PATCH v2 03/13] iommu: Add IOMMU index argument to translate method Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-04 15:29 ` [PATCH v2 04/13] exec.c: Handle IOMMUs in address_space_translate_for_iotlb() Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-14 18:23 ` Alex Bennée
2018-06-14 18:23 ` [Qemu-devel] " Alex Bennée
2018-06-04 15:29 ` [PATCH v2 05/13] hw/misc/tz-mpc.c: Implement the Arm TrustZone Memory Protection Controller Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-14 20:12 ` Auger Eric
2018-06-14 20:12 ` [Qemu-devel] " Auger Eric
2018-06-15 7:10 ` Auger Eric
2018-06-15 8:53 ` Peter Maydell
2018-06-15 13:23 ` Auger Eric
2018-06-04 15:29 ` [PATCH v2 06/13] hw/misc/tz-mpc.c: Implement registers Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-14 20:14 ` Auger Eric
2018-06-14 20:14 ` [Qemu-devel] " Auger Eric
2018-06-15 8:59 ` Peter Maydell
2018-06-15 8:59 ` [Qemu-devel] " Peter Maydell
2018-06-14 20:36 ` Auger Eric
2018-06-14 20:36 ` [Qemu-devel] " Auger Eric
2018-06-15 9:04 ` Peter Maydell
2018-06-15 9:04 ` [Qemu-devel] " Peter Maydell
2018-06-15 13:24 ` Auger Eric
2018-06-15 13:24 ` [Qemu-devel] " Auger Eric
2018-06-15 7:23 ` Auger Eric
2018-06-15 7:23 ` [Qemu-devel] " Auger Eric
2018-06-15 9:05 ` Peter Maydell
2018-06-15 9:05 ` [Qemu-devel] " Peter Maydell
2018-06-04 15:29 ` [PATCH v2 07/13] hw/misc/tz-mpc.c: Implement correct blocked-access behaviour Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-14 20:40 ` Auger Eric
2018-06-04 15:29 ` [PATCH v2 08/13] hw/misc/tz_mpc.c: Honour the BLK_LUT settings in translate Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-15 7:31 ` Auger Eric
2018-06-15 16:07 ` Peter Maydell
2018-06-15 16:09 ` Peter Maydell
2018-06-18 7:45 ` Auger Eric
2018-06-04 15:29 ` [PATCH v2 09/13] hw/core/or-irq: Support more than 16 inputs to an OR gate Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-14 18:24 ` Alex Bennée [this message]
2018-06-14 18:24 ` Alex Bennée
2018-06-04 15:29 ` [PATCH v2 10/13] hw/misc/iotkit-secctl.c: Implement SECMPCINTSTATUS Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-04 15:29 ` [PATCH v2 11/13] hw/arm/iotkit: Instantiate MPC Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-04 15:29 ` [PATCH v2 12/13] hw/arm/iotkit: Wire up MPC interrupt lines Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-04 15:29 ` [PATCH v2 13/13] hw/arm/mps2-tz.c: Instantiate MPCs Peter Maydell
2018-06-04 15:29 ` [Qemu-devel] " Peter Maydell
2018-06-04 16:33 ` [Qemu-devel] [PATCH v2 00/13] iommu: support txattrs, support TCG execution, implement TZ MPC no-reply
2018-06-05 7:39 ` Peter Xu
2018-06-05 7:39 ` [Qemu-devel] " Peter Xu
2018-06-05 9:13 ` Peter Maydell
2018-06-05 9:13 ` [Qemu-devel] " Peter Maydell
2018-06-05 13:25 ` Peter Xu
2018-06-05 13:25 ` [Qemu-devel] " Peter Xu
2018-06-14 16:51 ` Peter Maydell
2018-06-15 12:45 ` Peter Maydell
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