From: Gregory CLEMENT <gregory.clement@free-electrons.com>
To: Henrik Juul Pedersen <hjp@liab.dk>
Cc: Andrew Lunn <andrew@lunn.ch>, Jason Cooper <jason@lakedaemon.net>,
Emil Vesterdahl <emil@liab.dk>,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH] pinctrl: Fix armada-37xx pmic pin group numbering
Date: Mon, 06 Nov 2017 17:09:07 +0100 [thread overview]
Message-ID: <87shdr75jw.fsf@free-electrons.com> (raw)
In-Reply-To: <CABQZ+_QYDE9k31ywvHqSEsNPjsnGQHMd0oCyErKFAT1PpETkEg@mail.gmail.com> (Henrik Juul Pedersen's message of "Mon, 6 Nov 2017 17:02:58 +0100")
Hi Henrik,
On lun., nov. 06 2017, Henrik Juul Pedersen <hjp@liab.dk> wrote:
> Fix pin numbering in Marvell ARMADA 37xx pincontroller.
>
> The pmic0 and pmic1 pin groups start on pins 6 and 7 respectively.
>
> Signed-off-by: Henrik Juul Pedersen <hjp@liab.dk>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
when applying the patch, we should also add:
Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support
for Armada 37xx")
Cc: <stable@vger.kernel.org>
Thanks,
Gregory
> ---
> drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> index 71b94474..e223fac2 100644
> --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> @@ -157,8 +157,8 @@ static struct armada_37xx_pin_group
> armada_37xx_nb_groups[] = {
> PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"),
> PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"),
> PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"),
> - PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"),
> - PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"),
> + PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"),
> + PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"),
> PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
> PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"),
> PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"),
> --
> 2.14.1
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: gregory.clement@free-electrons.com (Gregory CLEMENT)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] pinctrl: Fix armada-37xx pmic pin group numbering
Date: Mon, 06 Nov 2017 17:09:07 +0100 [thread overview]
Message-ID: <87shdr75jw.fsf@free-electrons.com> (raw)
In-Reply-To: <CABQZ+_QYDE9k31ywvHqSEsNPjsnGQHMd0oCyErKFAT1PpETkEg@mail.gmail.com> (Henrik Juul Pedersen's message of "Mon, 6 Nov 2017 17:02:58 +0100")
Hi Henrik,
On lun., nov. 06 2017, Henrik Juul Pedersen <hjp@liab.dk> wrote:
> Fix pin numbering in Marvell ARMADA 37xx pincontroller.
>
> The pmic0 and pmic1 pin groups start on pins 6 and 7 respectively.
>
> Signed-off-by: Henrik Juul Pedersen <hjp@liab.dk>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
when applying the patch, we should also add:
Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support
for Armada 37xx")
Cc: <stable@vger.kernel.org>
Thanks,
Gregory
> ---
> drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> index 71b94474..e223fac2 100644
> --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> @@ -157,8 +157,8 @@ static struct armada_37xx_pin_group
> armada_37xx_nb_groups[] = {
> PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"),
> PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"),
> PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"),
> - PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"),
> - PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"),
> + PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"),
> + PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"),
> PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
> PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"),
> PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"),
> --
> 2.14.1
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
next prev parent reply other threads:[~2017-11-06 16:09 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-06 16:02 [PATCH] pinctrl: Fix armada-37xx pmic pin group numbering Henrik Juul Pedersen
2017-11-06 16:02 ` Henrik Juul Pedersen
2017-11-06 16:09 ` Gregory CLEMENT [this message]
2017-11-06 16:09 ` Gregory CLEMENT
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87shdr75jw.fsf@free-electrons.com \
--to=gregory.clement@free-electrons.com \
--cc=andrew@lunn.ch \
--cc=emil@liab.dk \
--cc=hjp@liab.dk \
--cc=jason@lakedaemon.net \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-gpio@vger.kernel.org \
--cc=sebastian.hesselbarth@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.