From: Jani Nikula <jani.nikula@linux.intel.com>
To: Daniel Vetter <daniel.vetter@intel.com>
Cc: David Airlie <airlied@linux.ie>,
intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org,
Nicholas Mc Guire <hofrat@osadl.org>
Subject: Re: [PATCH V2] drm/i915: relax uncritical udelay_range()
Date: Fri, 16 Dec 2016 11:25:14 +0200 [thread overview]
Message-ID: <87shpons3p.fsf@intel.com> (raw)
In-Reply-To: <1481853578-19834-1-git-send-email-hofrat@osadl.org>
On Fri, 16 Dec 2016, Nicholas Mc Guire <hofrat@osadl.org> wrote:
> udelay_range(1, 2) is inefficient and as discussions with Jani Nikula
> <jani.nikula@linux.intel.com> unnecessary here. This replaces this
> tight setting with a relaxed delay of min=20 and max=50 which helps
> the hrtimer subsystem optimize timer handling.
>
> Fixes: commit be4fc046bed3 ("drm/i915: add VLV DSI PLL Calculations")
> Link: http://lkml.org/lkml/2016/12/15/147
> Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Pushed to drm-intel-next-queued, thanks for the patch.
BR,
Jani.
> ---
>
> V2: use relaxed uslee_range() rather than udelay
> fix documentation of changed timings
>
> Problem found by coccinelle:
>
> Patch was compile tested with: x86_64_defconfig (implies CONFIG_DRM_I915)
>
> Patch is against 4.9.0 (localversion-next is next-20161215)
>
> drivers/gpu/drm/i915/intel_dsi_pll.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index 56eff60..d210bc4 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -156,8 +156,10 @@ static void vlv_enable_dsi_pll(struct intel_encoder *encoder,
> vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL,
> config->dsi_pll.ctrl & ~DSI_PLL_VCO_EN);
>
> - /* wait at least 0.5 us after ungating before enabling VCO */
> - usleep_range(1, 10);
> + /* wait at least 0.5 us after ungating before enabling VCO,
> + * allow hrtimer subsystem optimization by relaxing timing
> + */
> + usleep_range(10, 50);
>
> vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, config->dsi_pll.ctrl);
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Nicholas Mc Guire <hofrat@osadl.org>,
Daniel Vetter <daniel.vetter@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>,
ymohanma <yogesh.mohan.marimuthu@intel.com>,
David Airlie <airlied@linux.ie>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org,
Nicholas Mc Guire <hofrat@osadl.org>
Subject: Re: [PATCH V2] drm/i915: relax uncritical udelay_range()
Date: Fri, 16 Dec 2016 11:25:14 +0200 [thread overview]
Message-ID: <87shpons3p.fsf@intel.com> (raw)
In-Reply-To: <1481853578-19834-1-git-send-email-hofrat@osadl.org>
On Fri, 16 Dec 2016, Nicholas Mc Guire <hofrat@osadl.org> wrote:
> udelay_range(1, 2) is inefficient and as discussions with Jani Nikula
> <jani.nikula@linux.intel.com> unnecessary here. This replaces this
> tight setting with a relaxed delay of min=20 and max=50 which helps
> the hrtimer subsystem optimize timer handling.
>
> Fixes: commit be4fc046bed3 ("drm/i915: add VLV DSI PLL Calculations")
> Link: http://lkml.org/lkml/2016/12/15/147
> Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Pushed to drm-intel-next-queued, thanks for the patch.
BR,
Jani.
> ---
>
> V2: use relaxed uslee_range() rather than udelay
> fix documentation of changed timings
>
> Problem found by coccinelle:
>
> Patch was compile tested with: x86_64_defconfig (implies CONFIG_DRM_I915)
>
> Patch is against 4.9.0 (localversion-next is next-20161215)
>
> drivers/gpu/drm/i915/intel_dsi_pll.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index 56eff60..d210bc4 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -156,8 +156,10 @@ static void vlv_enable_dsi_pll(struct intel_encoder *encoder,
> vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL,
> config->dsi_pll.ctrl & ~DSI_PLL_VCO_EN);
>
> - /* wait at least 0.5 us after ungating before enabling VCO */
> - usleep_range(1, 10);
> + /* wait at least 0.5 us after ungating before enabling VCO,
> + * allow hrtimer subsystem optimization by relaxing timing
> + */
> + usleep_range(10, 50);
>
> vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, config->dsi_pll.ctrl);
--
Jani Nikula, Intel Open Source Technology Center
next prev parent reply other threads:[~2016-12-16 9:25 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-16 1:59 [PATCH V2] drm/i915: relax uncritical udelay_range() Nicholas Mc Guire
2016-12-16 1:59 ` Nicholas Mc Guire
2016-12-16 2:15 ` ✓ Fi.CI.BAT: success for " Patchwork
2016-12-16 9:25 ` Jani Nikula [this message]
2016-12-16 9:25 ` [PATCH V2] " Jani Nikula
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