[PATCH] drm/i915: Remove pre-production pooled-EU w/a for Broxton

[PATCH] drm/i915: Remove pre-production pooled-EU w/a for Broxton

[Chris Wilson]

WaEnablePooledEuFor2x6 only applies to preproduction models, unsupported
since commit 0102ba1fd8af ("drm/i915: Add early BXT sdv to the list of
preproduction machines").

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_device_info.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 78bf7374fbdd..f609cfb7f1b2 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -235,16 +235,6 @@ static void gen9_sseu_info_init(struct drm_i915_private *dev_priv)
 #define IS_SS_DISABLED(ss)	(!(sseu->subslice_mask & BIT(ss)))
 		info->has_pooled_eu = hweight8(sseu->subslice_mask) == 3;
 
-		/*
-		 * There is a HW issue in 2x6 fused down parts that requires
-		 * Pooled EU to be enabled as a WA. The pool configuration
-		 * changes depending upon which subslice is fused down. This
-		 * doesn't affect if the device has all 3 subslices enabled.
-		 */
-		/* WaEnablePooledEuFor2x6:bxt */
-		info->has_pooled_eu |= (hweight8(sseu->subslice_mask) == 2 &&
-					IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST));
-
 		sseu->min_eu_in_pool = 0;
 		if (info->has_pooled_eu) {
 			if (IS_SS_DISABLED(2) || IS_SS_DISABLED(0))
-- 
2.15.0

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✓ Fi.CI.BAT: success for drm/i915: Remove pre-production pooled-EU w/a for Broxton

[Patchwork]

== Series Details ==

Series: drm/i915: Remove pre-production pooled-EU w/a for Broxton
URL   : https://patchwork.freedesktop.org/series/33781/
State : success

== Summary ==

Series 33781v1 drm/i915: Remove pre-production pooled-EU w/a for Broxton
https://patchwork.freedesktop.org/api/1.0/series/33781/revisions/1/mbox/

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:442s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:447s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:379s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:548s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:278s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:498s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:514s
fi-byt-j1900     total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  time:501s
fi-byt-n2820     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:491s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:429s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:262s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:543s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:428s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:438s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:429s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:478s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:462s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:480s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:530s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:476s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:538s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:569s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:455s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:552s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:561s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:513s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:494s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:462s
fi-snb-2520m     total:246  pass:212  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:426s
Blacklisted hosts:
fi-cfl-s         total:289  pass:254  dwarn:3   dfail:0   fail:0   skip:32  time:537s
fi-cnl-y         total:289  pass:261  dwarn:0   dfail:0   fail:1   skip:27  time:547s

712af85519b2fa0639951273649ec6f2fe98f595 drm-tip: 2017y-11m-14d-12h-27m-40s UTC integration manifest
023cf2b7bb5d drm/i915: Remove pre-production pooled-EU w/a for Broxton

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7116/
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✓ Fi.CI.IGT: success for drm/i915: Remove pre-production pooled-EU w/a for Broxton

[Patchwork]

== Series Details ==

Series: drm/i915: Remove pre-production pooled-EU w/a for Broxton
URL   : https://patchwork.freedesktop.org/series/33781/
State : success

== Summary ==

Test kms_busy:
        Subgroup extended-modeset-hang-newfb-with-reset-render-b:
                dmesg-warn -> PASS       (shard-hsw) fdo#103038
Test kms_setmode:
        Subgroup basic:
                pass       -> FAIL       (shard-hsw) fdo#99912

fdo#103038 https://bugs.freedesktop.org/show_bug.cgi?id=103038
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hsw        total:2584 pass:1472 dwarn:2   dfail:1   fail:10  skip:1099 time:9517s
Blacklisted hosts:
shard-apl        total:2565 pass:1599 dwarn:4   dfail:0   fail:25  skip:936 time:12856s
shard-kbl        total:2522 pass:1632 dwarn:51  dfail:1   fail:24  skip:812 time:10258s
shard-snb        total:2584 pass:1203 dwarn:1   dfail:1   fail:13  skip:1366 time:7752s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7116/shards.html
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Re: [PATCH] drm/i915: Remove pre-production pooled-EU w/a for Broxton

[David Weinehall]

On Tue, Nov 14, 2017 at 01:51:16PM +0000, Chris Wilson wrote:
> WaEnablePooledEuFor2x6 only applies to preproduction models, unsupported
> since commit 0102ba1fd8af ("drm/i915: Add early BXT sdv to the list of
> preproduction machines").
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_device_info.c | 10 ----------
>  1 file changed, 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 78bf7374fbdd..f609cfb7f1b2 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -235,16 +235,6 @@ static void gen9_sseu_info_init(struct drm_i915_private *dev_priv)
>  #define IS_SS_DISABLED(ss)	(!(sseu->subslice_mask & BIT(ss)))
>  		info->has_pooled_eu = hweight8(sseu->subslice_mask) == 3;
>  
> -		/*
> -		 * There is a HW issue in 2x6 fused down parts that requires
> -		 * Pooled EU to be enabled as a WA. The pool configuration
> -		 * changes depending upon which subslice is fused down. This
> -		 * doesn't affect if the device has all 3 subslices enabled.
> -		 */
> -		/* WaEnablePooledEuFor2x6:bxt */
> -		info->has_pooled_eu |= (hweight8(sseu->subslice_mask) == 2 &&
> -					IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST));
> -
>  		sseu->min_eu_in_pool = 0;
>  		if (info->has_pooled_eu) {
>  			if (IS_SS_DISABLED(2) || IS_SS_DISABLED(0))
> -- 
> 2.15.0
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [PATCH] drm/i915: Remove pre-production pooled-EU w/a for Broxton

[Chris Wilson]

Quoting David Weinehall (2017-11-15 18:01:41)
> On Tue, Nov 14, 2017 at 01:51:16PM +0000, Chris Wilson wrote:
> > WaEnablePooledEuFor2x6 only applies to preproduction models, unsupported
> > since commit 0102ba1fd8af ("drm/i915: Add early BXT sdv to the list of
> > preproduction machines").
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> 
> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>

Ta, hope your sdp is ok in the bin ;)

Any volunteers for IS_GLK_REVID, IS_KBL_REVID ?

I see one IS_SKL_REVID that can easily be removed.
-Chris
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Re: [PATCH] drm/i915: Remove pre-production pooled-EU w/a for Broxton

[Jani Nikula]

On Wed, 15 Nov 2017, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> Quoting David Weinehall (2017-11-15 18:01:41)
>> On Tue, Nov 14, 2017 at 01:51:16PM +0000, Chris Wilson wrote:
>> > WaEnablePooledEuFor2x6 only applies to preproduction models, unsupported
>> > since commit 0102ba1fd8af ("drm/i915: Add early BXT sdv to the list of
>> > preproduction machines").
>> > 
>> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> > Cc: Jani Nikula <jani.nikula@intel.com>
>> 
>> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
>
> Ta, hope your sdp is ok in the bin ;)
>
> Any volunteers for IS_GLK_REVID, IS_KBL_REVID ?
>
> I see one IS_SKL_REVID that can easily be removed.

Need to know what the first shipped rev was. For example with bxt we
apparently can't remove some of the rev checks.

Seems like we should add more checks to intel_detect_preproduction_hw()
too.

BR,
Jani.

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Re: [PATCH] drm/i915: Remove pre-production pooled-EU w/a for Broxton

[Rodrigo Vivi]

On Thu, Nov 16, 2017 at 09:22:23AM +0000, Jani Nikula wrote:
> On Wed, 15 Nov 2017, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> > Quoting David Weinehall (2017-11-15 18:01:41)
> >> On Tue, Nov 14, 2017 at 01:51:16PM +0000, Chris Wilson wrote:
> >> > WaEnablePooledEuFor2x6 only applies to preproduction models, unsupported
> >> > since commit 0102ba1fd8af ("drm/i915: Add early BXT sdv to the list of
> >> > preproduction machines").
> >> > 
> >> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> >> > Cc: Jani Nikula <jani.nikula@intel.com>
> >> 
> >> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
> >
> > Ta, hope your sdp is ok in the bin ;)
> >
> > Any volunteers for IS_GLK_REVID, IS_KBL_REVID ?
> >
> > I see one IS_SKL_REVID that can easily be removed.
> 
> Need to know what the first shipped rev was. For example with bxt we
> apparently can't remove some of the rev checks.
> 
> Seems like we should add more checks to intel_detect_preproduction_hw()
> too.

With the IS_*_REVID in place I'd advocate to leave the workarounds around.

I understand that codes get cleaner if we remove them from here,
but usually previous pre-prod workarounds are useful reference for
new platforms power-on...

Thanks,
Rodrigo.

> 
> BR,
> Jani.
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center
> _______________________________________________
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Re: [PATCH] drm/i915: Remove pre-production pooled-EU w/a for Broxton

[Jani Nikula]

On Thu, 16 Nov 2017, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Thu, Nov 16, 2017 at 09:22:23AM +0000, Jani Nikula wrote:
>> On Wed, 15 Nov 2017, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>> > Quoting David Weinehall (2017-11-15 18:01:41)
>> >> On Tue, Nov 14, 2017 at 01:51:16PM +0000, Chris Wilson wrote:
>> >> > WaEnablePooledEuFor2x6 only applies to preproduction models, unsupported
>> >> > since commit 0102ba1fd8af ("drm/i915: Add early BXT sdv to the list of
>> >> > preproduction machines").
>> >> > 
>> >> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> >> > Cc: Jani Nikula <jani.nikula@intel.com>
>> >> 
>> >> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
>> >
>> > Ta, hope your sdp is ok in the bin ;)
>> >
>> > Any volunteers for IS_GLK_REVID, IS_KBL_REVID ?
>> >
>> > I see one IS_SKL_REVID that can easily be removed.
>> 
>> Need to know what the first shipped rev was. For example with bxt we
>> apparently can't remove some of the rev checks.
>> 
>> Seems like we should add more checks to intel_detect_preproduction_hw()
>> too.
>
> With the IS_*_REVID in place I'd advocate to leave the workarounds around.
>
> I understand that codes get cleaner if we remove them from here,
> but usually previous pre-prod workarounds are useful reference for
> new platforms power-on...

Perhaps for the gen-1, but not older.

BR,
Jani.

>
> Thanks,
> Rodrigo.
>
>> 
>> BR,
>> Jani.
>> 
>> -- 
>> Jani Nikula, Intel Open Source Technology Center
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Re: [PATCH] drm/i915: Remove pre-production pooled-EU w/a for Broxton

[Chris Wilson]

Quoting Jani Nikula (2017-11-17 07:44:08)
> On Thu, 16 Nov 2017, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> > On Thu, Nov 16, 2017 at 09:22:23AM +0000, Jani Nikula wrote:
> >> On Wed, 15 Nov 2017, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> >> > Quoting David Weinehall (2017-11-15 18:01:41)
> >> >> On Tue, Nov 14, 2017 at 01:51:16PM +0000, Chris Wilson wrote:
> >> >> > WaEnablePooledEuFor2x6 only applies to preproduction models, unsupported
> >> >> > since commit 0102ba1fd8af ("drm/i915: Add early BXT sdv to the list of
> >> >> > preproduction machines").
> >> >> > 
> >> >> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> >> >> > Cc: Jani Nikula <jani.nikula@intel.com>
> >> >> 
> >> >> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
> >> >
> >> > Ta, hope your sdp is ok in the bin ;)
> >> >
> >> > Any volunteers for IS_GLK_REVID, IS_KBL_REVID ?
> >> >
> >> > I see one IS_SKL_REVID that can easily be removed.
> >> 
> >> Need to know what the first shipped rev was. For example with bxt we
> >> apparently can't remove some of the rev checks.
> >> 
> >> Seems like we should add more checks to intel_detect_preproduction_hw()
> >> too.
> >
> > With the IS_*_REVID in place I'd advocate to leave the workarounds around.
> >
> > I understand that codes get cleaner if we remove them from here,
> > but usually previous pre-prod workarounds are useful reference for
> > new platforms power-on...
> 
> Perhaps for the gen-1, but not older.

That seems like a reasonably policy.

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 57dfaf04d819..0be79cf993fa 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -833,6 +833,11 @@ static void i915_workqueues_cleanup(struct drm_i915_private *dev_priv)
  * We don't keep the workarounds for pre-production hardware, so we expect our
  * driver to fail on these machines in one way or another. A little warning on
  * dmesg may help both the user and the bug triagers.
+ *
+ * Our policy for removing workarounds is to keep the current gen workarounds
+ * as a guide to the bring-up of the next gen (workarounds have a habit of
+ * persisting). Anything older than that should be removed along with the
+ * complications they introduce.
  */
 static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
 {

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Re: [PATCH] drm/i915: Remove pre-production pooled-EU w/a for Broxton

[Jani Nikula]

On Fri, 17 Nov 2017, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> That seems like a reasonably policy.
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 57dfaf04d819..0be79cf993fa 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -833,6 +833,11 @@ static void i915_workqueues_cleanup(struct drm_i915_private *dev_priv)
>   * We don't keep the workarounds for pre-production hardware, so we expect our
>   * driver to fail on these machines in one way or another. A little warning on
>   * dmesg may help both the user and the bug triagers.
> + *
> + * Our policy for removing workarounds is to keep the current gen workarounds
> + * as a guide to the bring-up of the next gen (workarounds have a habit of
> + * persisting). Anything older than that should be removed along with the
> + * complications they introduce.
>   */

Ack for putting that in a patch and merging.

BR,
Jani.

>  static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
>  {
>

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Re: [PATCH] drm/i915: Remove pre-production pooled-EU w/a for Broxton

[David Weinehall]

On Wed, Nov 15, 2017 at 06:06:53PM +0000, Chris Wilson wrote:
> Quoting David Weinehall (2017-11-15 18:01:41)
> > On Tue, Nov 14, 2017 at 01:51:16PM +0000, Chris Wilson wrote:
> > > WaEnablePooledEuFor2x6 only applies to preproduction models, unsupported
> > > since commit 0102ba1fd8af ("drm/i915: Add early BXT sdv to the list of
> > > preproduction machines").
> > > 
> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > Cc: Jani Nikula <jani.nikula@intel.com>
> > 
> > Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
> 
> Ta, hope your sdp is ok in the bin ;)
> 
> Any volunteers for IS_GLK_REVID, IS_KBL_REVID ?

I don't think we should workarounds for pre-production GLK hardware
until there's actually production GLK hardware available :)


Kind regards, David
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