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From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>,
	Martin Peres <martin.peres@linux.intel.com>,
	Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	stable@vger.kernel.org
Subject: Re: [PATCH 3/6] drm/i915: Perform GGTT restore much earlier during resume
Date: Tue, 10 Sep 2019 13:39:38 +0300	[thread overview]
Message-ID: <87y2ywsadx.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20190909110011.8958-4-chris@chris-wilson.co.uk>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> As soon as we re-enable the various functions within the HW, they may go
> off and read data via a GGTT offset. Hence, if we have not yet restored
> the GGTT PTE before then, they may read and even *write* random locations
> in memory.
>
> Detected by DMAR faults during resume.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Martin Peres <martin.peres@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: stable@vger.kernel.org

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/gem/i915_gem_pm.c    | 3 ---
>  drivers/gpu/drm/i915/i915_drv.c           | 5 +++++
>  drivers/gpu/drm/i915/selftests/i915_gem.c | 6 ++++++
>  3 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> index b3993d24b83d..9b1129aaacfe 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> @@ -242,9 +242,6 @@ void i915_gem_resume(struct drm_i915_private *i915)
>  	mutex_lock(&i915->drm.struct_mutex);
>  	intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
>  
> -	i915_gem_restore_gtt_mappings(i915);
> -	i915_gem_restore_fences(i915);
> -
>  	if (i915_gem_init_hw(i915))
>  		goto err_wedged;
>  
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 7b2c81a8bbaa..1af4eba968c0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1877,6 +1877,11 @@ static int i915_drm_resume(struct drm_device *dev)
>  	if (ret)
>  		DRM_ERROR("failed to re-enable GGTT\n");
>  
> +	mutex_lock(&dev_priv->drm.struct_mutex);
> +	i915_gem_restore_gtt_mappings(dev_priv);
> +	i915_gem_restore_fences(dev_priv);
> +	mutex_unlock(&dev_priv->drm.struct_mutex);
> +
>  	intel_csr_ucode_resume(dev_priv);
>  
>  	i915_restore_state(dev_priv);
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c
> index bb6dd54a6ff3..37593831b539 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
> @@ -118,6 +118,12 @@ static void pm_resume(struct drm_i915_private *i915)
>  	with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
>  		intel_gt_sanitize(&i915->gt, false);
>  		i915_gem_sanitize(i915);
> +
> +		mutex_lock(&i915->drm.struct_mutex);
> +		i915_gem_restore_gtt_mappings(i915);
> +		i915_gem_restore_fences(i915);
> +		mutex_unlock(&i915->drm.struct_mutex);
> +
>  		i915_gem_resume(i915);
>  	}
>  }
> -- 
> 2.23.0

WARNING: multiple messages have this Message-ID (diff)
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>,
	Martin Peres <martin.peres@linux.intel.com>,
	Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	stable@vger.kernel.org
Subject: Re: [PATCH 3/6] drm/i915: Perform GGTT restore much earlier during resume
Date: Tue, 10 Sep 2019 13:39:38 +0300	[thread overview]
Message-ID: <87y2ywsadx.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20190909110011.8958-4-chris@chris-wilson.co.uk>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> As soon as we re-enable the various functions within the HW, they may go
> off and read data via a GGTT offset. Hence, if we have not yet restored
> the GGTT PTE before then, they may read and even *write* random locations
> in memory.
>
> Detected by DMAR faults during resume.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Martin Peres <martin.peres@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: stable@vger.kernel.org

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/gem/i915_gem_pm.c    | 3 ---
>  drivers/gpu/drm/i915/i915_drv.c           | 5 +++++
>  drivers/gpu/drm/i915/selftests/i915_gem.c | 6 ++++++
>  3 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> index b3993d24b83d..9b1129aaacfe 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> @@ -242,9 +242,6 @@ void i915_gem_resume(struct drm_i915_private *i915)
>  	mutex_lock(&i915->drm.struct_mutex);
>  	intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
>  
> -	i915_gem_restore_gtt_mappings(i915);
> -	i915_gem_restore_fences(i915);
> -
>  	if (i915_gem_init_hw(i915))
>  		goto err_wedged;
>  
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 7b2c81a8bbaa..1af4eba968c0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1877,6 +1877,11 @@ static int i915_drm_resume(struct drm_device *dev)
>  	if (ret)
>  		DRM_ERROR("failed to re-enable GGTT\n");
>  
> +	mutex_lock(&dev_priv->drm.struct_mutex);
> +	i915_gem_restore_gtt_mappings(dev_priv);
> +	i915_gem_restore_fences(dev_priv);
> +	mutex_unlock(&dev_priv->drm.struct_mutex);
> +
>  	intel_csr_ucode_resume(dev_priv);
>  
>  	i915_restore_state(dev_priv);
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c
> index bb6dd54a6ff3..37593831b539 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
> @@ -118,6 +118,12 @@ static void pm_resume(struct drm_i915_private *i915)
>  	with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
>  		intel_gt_sanitize(&i915->gt, false);
>  		i915_gem_sanitize(i915);
> +
> +		mutex_lock(&i915->drm.struct_mutex);
> +		i915_gem_restore_gtt_mappings(i915);
> +		i915_gem_restore_fences(i915);
> +		mutex_unlock(&i915->drm.struct_mutex);
> +
>  		i915_gem_resume(i915);
>  	}
>  }
> -- 
> 2.23.0

  reply	other threads:[~2019-09-10 10:39 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-09 11:00 Enable iommu on gfx by default Chris Wilson
2019-09-09 11:00 ` [PATCH 1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel Chris Wilson
2019-09-10 10:57   ` Matthew Auld
2019-09-09 11:00 ` [PATCH 2/6] drm/i915/selftests: Tighten the timeout testing for partial mmaps Chris Wilson
2019-09-09 11:00 ` [PATCH 3/6] drm/i915: Perform GGTT restore much earlier during resume Chris Wilson
2019-09-10 10:39   ` Mika Kuoppala [this message]
2019-09-10 10:39     ` Mika Kuoppala
2019-09-09 11:00 ` [PATCH 4/6] drm/i915: Force compilation with intel-iommu for CI validation Chris Wilson
2019-09-09 16:32   ` kbuild test robot
2019-09-09 19:55   ` kbuild test robot
2019-09-09 11:00 ` [PATCH 5/6] iommu/intel: Declare Broadwell igfx dmar support snafu Chris Wilson
2019-09-10 10:42   ` Mika Kuoppala
2019-09-11  5:51   ` Lu Baolu
2019-09-11 10:38   ` Joerg Roedel
2019-09-09 11:00 ` [PATCH 6/6] iommu/intel: Ignore igfx_off Chris Wilson
2019-09-09 16:07 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915/selftests: Take runtime wakeref for igt_ggtt_lowlevel Patchwork
2019-09-09 16:34 ` ✗ Fi.CI.BAT: failure " Patchwork

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