From: "Keith Packard" <keithp@keithp.com>
To: Palmer Dabbelt <palmerdabbelt@google.com>,
Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, riku.voipio@iki.fi, laurent@vivier.eu,
Alistair Francis <Alistair.Francis@wdc.com>,
sagark@eecs.berkeley.edu,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
qemu-riscv@nongnu.org
Subject: Re: [PATCH] riscv: Add semihosting support [v4]
Date: Sat, 07 Mar 2020 11:44:34 -0800 [thread overview]
Message-ID: <87zhcsymot.fsf@keithp.org> (raw)
In-Reply-To: <mhng-e399eb36-5106-485c-972c-db2610e42dff@palmerdabbelt-glaptop1>
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Palmer Dabbelt <palmerdabbelt@google.com> writes:
> I think, more concretely, the issues here are:
>
> * The only mention of "semihosting" in the RISC-V specification is in the
> commentary, which is not considered a normative part of the
> specification.
Ok, we're starting the process of creating a 'real' RISC-V semihosting
spec. This references the existing 2.0 version of the ARM semihosting
specification, defining only the RISC-V specific details necessary.
I've created a public github repository containing this work; that is
likely to eventually move over to the RISC-V github repository.
https://github.com/keith-packard/riscv-semihosting-spec/
The goal is to enable RISC-V semihosting implementations that share most
of the underlying details with existing ARM semihosting implemenations.
--
-keith
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WARNING: multiple messages have this Message-ID (diff)
From: "Keith Packard" via <qemu-devel@nongnu.org>
To: Palmer Dabbelt <palmerdabbelt@google.com>,
Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, riku.voipio@iki.fi, laurent@vivier.eu,
Alistair Francis <Alistair.Francis@wdc.com>,
sagark@eecs.berkeley.edu,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
qemu-riscv@nongnu.org
Subject: Re: [PATCH] riscv: Add semihosting support [v4]
Date: Sat, 07 Mar 2020 11:44:34 -0800 [thread overview]
Message-ID: <87zhcsymot.fsf@keithp.org> (raw)
In-Reply-To: <mhng-e399eb36-5106-485c-972c-db2610e42dff@palmerdabbelt-glaptop1>
[-- Attachment #1: Type: text/plain, Size: 848 bytes --]
Palmer Dabbelt <palmerdabbelt@google.com> writes:
> I think, more concretely, the issues here are:
>
> * The only mention of "semihosting" in the RISC-V specification is in the
> commentary, which is not considered a normative part of the
> specification.
Ok, we're starting the process of creating a 'real' RISC-V semihosting
spec. This references the existing 2.0 version of the ARM semihosting
specification, defining only the RISC-V specific details necessary.
I've created a public github repository containing this work; that is
likely to eventually move over to the RISC-V github repository.
https://github.com/keith-packard/riscv-semihosting-spec/
The goal is to enable RISC-V semihosting implementations that share most
of the underlying details with existing ARM semihosting implemenations.
--
-keith
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next prev parent reply other threads:[~2020-03-07 19:44 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-28 23:32 [PATCH] riscv: Add semihosting support [v4] Keith Packard
2020-01-28 23:32 ` Keith Packard via
2020-01-29 15:58 ` Peter Maydell
2020-01-29 15:58 ` Peter Maydell
2020-01-29 16:45 ` Keith Packard
2020-01-29 16:45 ` Keith Packard via
2020-01-29 18:06 ` Jonathan Behrens
2020-01-29 18:06 ` Jonathan Behrens
2020-01-30 10:54 ` Peter Maydell
2020-01-30 10:54 ` Peter Maydell
2020-01-30 11:38 ` Palmer Dabbelt
2020-01-30 12:01 ` Peter Maydell
2020-01-30 12:01 ` Peter Maydell
2020-04-06 5:24 ` [PATCH] riscv: Add semihosting support [v5] Keith Packard
2020-04-06 5:24 ` Keith Packard via
2020-03-07 19:44 ` Keith Packard [this message]
2020-03-07 19:44 ` [PATCH] riscv: Add semihosting support [v4] Keith Packard via
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