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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>, Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	intel-gfx@lists.freedesktop.org, "Goel,
	Akash" <akash.goel@intel.com>,
	stable@vger.kernel.org
Subject: Re: [PATCH] drm/i915: Set the map-and-fenceable flag for preallocated objects
Date: Thu, 27 Aug 2015 11:36:01 +0300	[thread overview]
Message-ID: <87zj1dw2ku.fsf@intel.com> (raw)
In-Reply-To: <20150826130659.GP1367@phenom.ffwll.local>

On Wed, 26 Aug 2015, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Wed, Aug 26, 2015 at 12:55:57PM +0100, Chris Wilson wrote:
>> As we mark the preallocated objects as bound, we should also flag them
>> correctly as being map-and-fenceable (if appropriate!) so that latter
>> users do not get confused and try and rebind the pinned vma in order to
>> get a map-and-fenceable binding.
>> 
>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: "Goel, Akash" <akash.goel@intel.com>
>> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
>> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
>> Cc: stable@vger.kernel.org
>
> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> Jani, can you please pick up both? And some bugzilla references for either
> would be great too - Chris?

Both pushed to drm-intel-next-fixes. Thanks for the patches and review.

BR,
Jani.

>
> Oh and does patch 1 fix the execlist resume troubles? Execlist having
> bigger contexts might be enough explanations for the apparent regression.
>
> And can we igt patch 1 somehow? E.g. with memory pressure plus doing an
> mmap on the legacy fbdev ...
> -Daniel
>
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h     |  1 +
>>  drivers/gpu/drm/i915/i915_gem.c     | 43 +++++++++++++++++++++----------------
>>  drivers/gpu/drm/i915/i915_gem_gtt.c |  1 +
>>  3 files changed, 26 insertions(+), 19 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 55611d81ec6c..ec731e6db126 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -2798,6 +2798,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
>>  
>>  int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level,
>>  		  u32 flags);
>> +void __i915_vma_set_map_and_fenceable(struct i915_vma *vma);
>>  int __must_check i915_vma_unbind(struct i915_vma *vma);
>>  int i915_gem_object_put_pages(struct drm_i915_gem_object *obj);
>>  void i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv);
>> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
>> index 407b6b3576ae..39571e67f9a5 100644
>> --- a/drivers/gpu/drm/i915/i915_gem.c
>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>> @@ -3980,6 +3980,29 @@ i915_vma_misplaced(struct i915_vma *vma, uint32_t alignment, uint64_t flags)
>>  	return false;
>>  }
>>  
>> +void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
>> +{
>> +	struct drm_i915_gem_object *obj = vma->obj;
>> +	bool mappable, fenceable;
>> +	u32 fence_size, fence_alignment;
>> +
>> +	fence_size = i915_gem_get_gtt_size(obj->base.dev,
>> +					   obj->base.size,
>> +					   obj->tiling_mode);
>> +	fence_alignment = i915_gem_get_gtt_alignment(obj->base.dev,
>> +						     obj->base.size,
>> +						     obj->tiling_mode,
>> +						     true);
>> +
>> +	fenceable = (vma->node.size == fence_size &&
>> +		     (vma->node.start & (fence_alignment - 1)) == 0);
>> +
>> +	mappable = (vma->node.start + fence_size <=
>> +		    to_i915(obj->base.dev)->gtt.mappable_end);
>> +
>> +	obj->map_and_fenceable = mappable && fenceable;
>> +}
>> +
>>  static int
>>  i915_gem_object_do_pin(struct drm_i915_gem_object *obj,
>>  		       struct i915_address_space *vm,
>> @@ -4047,25 +4070,7 @@ i915_gem_object_do_pin(struct drm_i915_gem_object *obj,
>>  
>>  	if (ggtt_view && ggtt_view->type == I915_GGTT_VIEW_NORMAL &&
>>  	    (bound ^ vma->bound) & GLOBAL_BIND) {
>> -		bool mappable, fenceable;
>> -		u32 fence_size, fence_alignment;
>> -
>> -		fence_size = i915_gem_get_gtt_size(obj->base.dev,
>> -						   obj->base.size,
>> -						   obj->tiling_mode);
>> -		fence_alignment = i915_gem_get_gtt_alignment(obj->base.dev,
>> -							     obj->base.size,
>> -							     obj->tiling_mode,
>> -							     true);
>> -
>> -		fenceable = (vma->node.size == fence_size &&
>> -			     (vma->node.start & (fence_alignment - 1)) == 0);
>> -
>> -		mappable = (vma->node.start + fence_size <=
>> -			    dev_priv->gtt.mappable_end);
>> -
>> -		obj->map_and_fenceable = mappable && fenceable;
>> -
>> +		__i915_vma_set_map_and_fenceable(vma);
>>  		WARN_ON(flags & PIN_MAPPABLE && !obj->map_and_fenceable);
>>  	}
>>  
>> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> index 4a76807143b1..112d84c32257 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> @@ -2586,6 +2586,7 @@ static int i915_gem_setup_global_gtt(struct drm_device *dev,
>>  			return ret;
>>  		}
>>  		vma->bound |= GLOBAL_BIND;
>> +		__i915_vma_set_map_and_fenceable(vma);
>>  	}
>>  
>>  	/* Clear any non-preallocated blocks */
>> -- 
>> 2.5.0
>> 
>
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>, Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	intel-gfx@lists.freedesktop.org, stable@vger.kernel.org, "Goel\,
	Akash" <akash.goel@intel.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Set the map-and-fenceable flag for preallocated objects
Date: Thu, 27 Aug 2015 11:36:01 +0300	[thread overview]
Message-ID: <87zj1dw2ku.fsf@intel.com> (raw)
In-Reply-To: <20150826130659.GP1367@phenom.ffwll.local>

On Wed, 26 Aug 2015, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Wed, Aug 26, 2015 at 12:55:57PM +0100, Chris Wilson wrote:
>> As we mark the preallocated objects as bound, we should also flag them
>> correctly as being map-and-fenceable (if appropriate!) so that latter
>> users do not get confused and try and rebind the pinned vma in order to
>> get a map-and-fenceable binding.
>> 
>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: "Goel, Akash" <akash.goel@intel.com>
>> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
>> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
>> Cc: stable@vger.kernel.org
>
> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> Jani, can you please pick up both? And some bugzilla references for either
> would be great too - Chris?

Both pushed to drm-intel-next-fixes. Thanks for the patches and review.

BR,
Jani.

>
> Oh and does patch 1 fix the execlist resume troubles? Execlist having
> bigger contexts might be enough explanations for the apparent regression.
>
> And can we igt patch 1 somehow? E.g. with memory pressure plus doing an
> mmap on the legacy fbdev ...
> -Daniel
>
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h     |  1 +
>>  drivers/gpu/drm/i915/i915_gem.c     | 43 +++++++++++++++++++++----------------
>>  drivers/gpu/drm/i915/i915_gem_gtt.c |  1 +
>>  3 files changed, 26 insertions(+), 19 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 55611d81ec6c..ec731e6db126 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -2798,6 +2798,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
>>  
>>  int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level,
>>  		  u32 flags);
>> +void __i915_vma_set_map_and_fenceable(struct i915_vma *vma);
>>  int __must_check i915_vma_unbind(struct i915_vma *vma);
>>  int i915_gem_object_put_pages(struct drm_i915_gem_object *obj);
>>  void i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv);
>> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
>> index 407b6b3576ae..39571e67f9a5 100644
>> --- a/drivers/gpu/drm/i915/i915_gem.c
>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>> @@ -3980,6 +3980,29 @@ i915_vma_misplaced(struct i915_vma *vma, uint32_t alignment, uint64_t flags)
>>  	return false;
>>  }
>>  
>> +void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
>> +{
>> +	struct drm_i915_gem_object *obj = vma->obj;
>> +	bool mappable, fenceable;
>> +	u32 fence_size, fence_alignment;
>> +
>> +	fence_size = i915_gem_get_gtt_size(obj->base.dev,
>> +					   obj->base.size,
>> +					   obj->tiling_mode);
>> +	fence_alignment = i915_gem_get_gtt_alignment(obj->base.dev,
>> +						     obj->base.size,
>> +						     obj->tiling_mode,
>> +						     true);
>> +
>> +	fenceable = (vma->node.size == fence_size &&
>> +		     (vma->node.start & (fence_alignment - 1)) == 0);
>> +
>> +	mappable = (vma->node.start + fence_size <=
>> +		    to_i915(obj->base.dev)->gtt.mappable_end);
>> +
>> +	obj->map_and_fenceable = mappable && fenceable;
>> +}
>> +
>>  static int
>>  i915_gem_object_do_pin(struct drm_i915_gem_object *obj,
>>  		       struct i915_address_space *vm,
>> @@ -4047,25 +4070,7 @@ i915_gem_object_do_pin(struct drm_i915_gem_object *obj,
>>  
>>  	if (ggtt_view && ggtt_view->type == I915_GGTT_VIEW_NORMAL &&
>>  	    (bound ^ vma->bound) & GLOBAL_BIND) {
>> -		bool mappable, fenceable;
>> -		u32 fence_size, fence_alignment;
>> -
>> -		fence_size = i915_gem_get_gtt_size(obj->base.dev,
>> -						   obj->base.size,
>> -						   obj->tiling_mode);
>> -		fence_alignment = i915_gem_get_gtt_alignment(obj->base.dev,
>> -							     obj->base.size,
>> -							     obj->tiling_mode,
>> -							     true);
>> -
>> -		fenceable = (vma->node.size == fence_size &&
>> -			     (vma->node.start & (fence_alignment - 1)) == 0);
>> -
>> -		mappable = (vma->node.start + fence_size <=
>> -			    dev_priv->gtt.mappable_end);
>> -
>> -		obj->map_and_fenceable = mappable && fenceable;
>> -
>> +		__i915_vma_set_map_and_fenceable(vma);
>>  		WARN_ON(flags & PIN_MAPPABLE && !obj->map_and_fenceable);
>>  	}
>>  
>> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> index 4a76807143b1..112d84c32257 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> @@ -2586,6 +2586,7 @@ static int i915_gem_setup_global_gtt(struct drm_device *dev,
>>  			return ret;
>>  		}
>>  		vma->bound |= GLOBAL_BIND;
>> +		__i915_vma_set_map_and_fenceable(vma);
>>  	}
>>  
>>  	/* Clear any non-preallocated blocks */
>> -- 
>> 2.5.0
>> 
>
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center

  parent reply	other threads:[~2015-08-27  8:36 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-25 16:48 [PATCH] drm/i915: Pin the ifbdev for the info->system_base GGTT mmapping Chris Wilson
2015-08-26  8:23 ` Deepak
2015-10-02 22:16   ` Boyer, Wayne
2015-10-06  8:25     ` Daniel Vetter
2015-10-07 18:34       ` Wayne Boyer
2015-10-07 18:34         ` Wayne Boyer
2015-10-08  9:07         ` Chris Wilson
2015-10-08 14:45           ` Jesse Barnes
2015-10-08 14:45             ` Jesse Barnes
2015-10-08 20:50           ` Wayne Boyer
2015-10-09  9:11             ` Chris Wilson
2015-10-09 12:00               ` Jani Nikula
2015-10-09 12:00                 ` [Intel-gfx] " Jani Nikula
2015-10-23 21:17             ` Dave Gordon
2015-10-30 16:18               ` Daniel Vetter
2015-10-30 17:17                 ` Chris Wilson
2015-10-25 14:34             ` Lukas Wunner
2015-10-25 14:34               ` [Intel-gfx] " Lukas Wunner
2015-10-25 14:53             ` Lukas Wunner
2015-10-25 14:53               ` [Intel-gfx] " Lukas Wunner
2015-08-26 11:55 ` [PATCH] drm/i915: Set the map-and-fenceable flag for preallocated objects Chris Wilson
2015-08-26 13:06   ` Daniel Vetter
2015-08-26 13:08     ` Daniel Vetter
2015-08-26 13:08       ` Daniel Vetter
2015-08-26 13:51     ` Chris Wilson
2015-08-27  8:36     ` Jani Nikula [this message]
2015-08-27  8:36       ` [Intel-gfx] " Jani Nikula
2015-08-27 16:19       ` Jesse Barnes
2015-08-27 16:19         ` [Intel-gfx] " Jesse Barnes
2015-08-27 16:36         ` Chris Wilson
2015-08-28  7:00           ` Jani Nikula
2015-08-28  7:00             ` [Intel-gfx] " Jani Nikula
2015-08-30 18:28   ` shuang.he

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